CSCI 2150
Spring 2001 Final Exam -- Answers

The following is the answer key to the Spring 2001 CSCI 2150 Final Exam. In some cases, where the HTML does not prohibit it, I've elaborated on the process to get to the answers.

1. What does the segment/pointer register combination CS:IP point to?
   
   Answer: The code segment:instruction pointer points to the next instruction to execute.
   
   
2. What does the segment/pointer register combination SS:SP point to?
   
   Answer: The stack segment:stack pointer points to the memory address of the top of the stack.
   
   
3. If DS equals 2500₁₆ and DI equals 1234₁₆, what physical address does DS:DI represent?
   
   Answer: Begin by shifting the segment register DS 4 bit positions to the left and "back-filling" with zeros. This gives us 25000₁₆. Then add the result of this operation to the index register DI. This gives us:
   
   25000₁₆ + 1234₁₆ = 26234₁₆
   
   
4. Assume AX=2354₁₆, BX=AFC3₁₆, and CX=0034₁₆. After the following code is executed, what would AX, BX, and CX contain?
   
   PUSH AX
PUSH BX
PUSH CX
POP BX
POP AX
POP CX

   Answer: Remember that PUSH and POP are stack operations, PUSH storing onto the stack and POP removing from the stack. In addition, remember that the stack is a "first-in-last-out" buffer, so the numbers come off the stack in the opposite order from when they went in. Therefore, the code PUSH AX, PUSH BX, and PUSH CX pushed the numbers into the stack in the order 2354₁₆, AFC3₁₆, then 0034₁₆. The numbers will then come off in the order 0034₁₆, AFC3₁₆, then 2354₁₆. Therefore, since the code POP's BX first, BX is loaded with 0034₁₆, then POP's AX, AX is loaded with AFC3₁₆, the last POP's CX, CX is loaded with 2354₁₆. Therefore, the answer is:
   
   AX=AFC3₁₆
   BX=0034₁₆
   CX=2354₁₆
   
   
5. What are the two types of information stored in memory?
   
   Answer: Code and data
   
   
6. If the zero flag is set to zero, what will the processor do if it encounters the instruction JA  LABEL?
   
   Answer: D -- it will jump to address LABEL depending on the value of the carry flag.
   
   
7. True or False: The following two pieces of code have the same end result.
   
   MOV   AX,[1234h]

and

MOV   BX,1234h
MOV   AX,[BX]

Answer: True
   
   
8. If AX=FFFF₁₆ and the instruction INC AX is executed, what would ZF and SF equal?
   
   Answer: Since incrementing FFFF₁₆ would set AX equal to 0000₁₆, then the zero flag would be set indicating the result equaled zero and the sign flag would be cleared indicating the result was not negative.
   
   
9. List all of the 16-bit general purpose/computation registers of the 8086 processor.
   
   Answer: AX, BX, CX, and DX
   
   
10. On an 80286 processor, how many address lines are used to access memory using the MOV command?
    
    Answer: This command uses the memory bus interface, so it uses all 20 address lines.
    
    
11. On an 80x86 processor, how many address lines are used to access memory using the IN command?
    
    Answer: This command uses the I/O bus interface, so it only uses 16 address lines.
    
    
12. On an 80x86 processor, which of the following lines are used to write data to an I/O port?
    
    Answer: D -- ^IOWC
    
    
13. If an RS232 serial port is set up to have odd parity, what would the parity bit equal if we sent the binary value 10110110?
    
    Answer: 0 -- There are five 1's which represents an odd number of ones. Therefore, no additional 1 in the parity is needed for odd parity.
    
    
14. If it takes 2 x 10^-3 seconds (2 milliseconds) to transmit one bit across a serial interface, what is the baud rate?
    
    Answer: 1/(2 x 10^-3 seconds) = 500 bits per second = 500 BAUD
    
    
15. List two of the three benefits of programming in assembly language that we discussed in class.
    
    Answer:
    
    • Gives the programmer full access to all of the processor resources
    • It can always be optimized to run faster than compiled code
    • It can always be optimized to be more compact than compiled code
    
    
16. If a processor takes 3 cycles to execute any instruction (fetch, decode, execute), how many cycles would a pipelined processor save over a non-pipelined processor to execute 10 instructions?
    
    Answer:
    
    non-piplined = 3 cycles/instruction * 10 instructions = 30 cycles
    
    piplined = 2 initial cycles + 1 cycles/instruction * 10 instructions = 2 + 10 = 12 cycles
    
    Difference = 30 cycles - 12 cycles = 18 cycles
    
    
17. List an advantage we discussed in class of interrupt-driven I/O.
    
    Answer: Remember that polling I/O takes time away from the processor. The processor must stop what it's doing to check the input or output devices. This takes time. Interrupt driven allows the input or output device to ask for service thereby saving the processor a great deal of time. The effect is to make the processor do the same amount of work alot faster.
    
    
18. List two of the three uses we discussed in class of the stack.
    
    Answer:
    
    
    • Temporary storage of variables or data
    • Passing data to subroutines/functions
    • Remembering the processor's state during interrupts
19. If the baud rate is 28,800 bits per second across a link with 1 stop bit, odd parity, and 8 data bits, how many data bits per second are being transmitted?
    
    Answer:
    
    data bits per second = BAUD rate * (number of data bits/number of frame bits)
data bits per second = 28,800 * (8 data bits/(8 data bits + 1 stop bit + 1 parity bit + 1 start bit))
data bits per second = 28,800 * (8 bits/11 bits)
data bits per second = 20,945 data bits per second


20. What is the purpose of having a logic '1' = -12 volts and a logic '0' = +12 volts on an RS232 link?
    
    Answer: After signals pass across long distances, they decrease in strength. 0 volt and 5 volt signals make it difficult to distinguish a logic '1' from a logic '0' after this decrease. Using +12 volts and -12 volts makes it so that we can use 0 volts as a cut-off to distinguish a '1' from a '0'. This allows for much greater signal attenuation.
    
    
21. Assume the code in the table below is executed in order on the 80x86, each instruction depending on the result of the previous one. For each instruction, identify which registers and flags are affected and enter the new value if you know what it is. (Just put an 'X' in the box if it's impossible to know the new value.) Use the memory contents shown in the chart below if necessary.
    
    Memory:  DS:0123₁₆ = 34₁₆  DS:0124₁₆ = 12₁₆  DS:0125₁₆ = AC₁₆  DS:0126₁₆ = 3F₁₆ Answer:

Questions 22, 23, and 24 are based on the following RS232 signal sent with 8 data bits and odd parity.

22. What is the binary value being transmitted in this signal? (5 points)
    
    Answer: Based on the fact that the signal has 8 data bits and odd parity, bit positions 3 through 10 are the data bits. They are also sent in reverse order of significance, bit position 3 being the least significant and bit position 10 being the most significant. Therefore, the binary value being sent is 00011001₂ which equals 19₁₆.
    
    
23. Is the parity bit correct? (3 points)
    
    Answer: The sum of bits from bit position 3 to the parity bit, bit position 11 is 4, an even number. Therfore, since the parity is supposed to be odd, the parity bit is incorrect.
    
    
24. Would the answer to question 25 change if the RS232 signal was set for 7 data bits? (2 points)
    
    Answer: If the signal was for seven data bits, then the parity would be calculated for the data (bit positions 3 through 9) and the parity bit (bit position 10). This sum is 3, an odd number. Therfore, since the parity is supposed to be odd, the parity bit is correct.
    
    
25. Classify each of the following characteristics as RS232 serial (R), USB (U), GPIB (G), or SCSI (S). (2 points each)
    
    Answer:
    
    R -- Serial point-to-point communications
    S -- One of its up to 8 devices must be the controller
    G -- Can have at most 15 active devices on a single connection
    U -- Contains power supply lines in a four conductor connection
    
    

Created by David Tarnoff for use by his sections of CSCI 2150.