Adder, Subtractor

Summary:
These functions add or subtract two inputs, X and Y, to form the sum Z. The width of 
all three signals is controlled by Width.  The type of the adder is controlled by
"AdderType".  The adder is always optimized for minimum possible delay.  The Adder
function optionally allows a 1-bit carry input (CI) to added to X and Y.

Function:
    Z=X+Y   (Adder, CarryIn not selected)
    Z=X+Y+CI (Adder, CarryIn selected)
    Z=X-Y   (Subtractor)

Signals:
    Z: Width wide output
    X,Y: Width wide inputs
    CI: 1-bit carry input (Adder with CarryIn selected)
    CO: 1-bit carry output (Adder with CarryOut selected)

Parameters:
    Name: actual module name
    Width: width of the X,Y and Z signals
    AdderType: type of the adder to build (cla, fastcla, clsa, csa)
    CarryIn: compute X+Y+CI when selected, X+Y when deselected (Adder only)
    CarryOut: generate carry output selected, X+Y when deselected (Adder only)

Verilog Usage: 
    Name(X,Y,Z); (not Adder or CarryIn and CarryOut not selected)
    Name(X,Y,CI,CO,Z); (Adder, CarryIn and CarryOut selected)
    Name(X,Y,CI,Z); (Adder, CarryIn only selected)
    Name(X,Y,CO,Z); (Adder, CarryOut only selected)


Version: $Id: Subtractor.help,v 1.1 1997/06/26 20:16:34 peterr Exp $