Dedicated to the support, open exchange and dissemination of in-development standards from
EDA Industry Working Groups
The Electronic Design Automation (EDA) and Electronic Computer-Aided Design (ECAD) one-stop resource on the WWW!
(with an historical focus on HDL's due to our origin and sponsors)

Sponsored by

Stanford University
About this server

( green groups appear to be dormant)  ( italicized groups are of interest but not hosted at this site)

HDL Open Source Models, etc.
GPL / Open Source EDA / HDL Tools
Other EDA / CAD Groups

IEEE Design Automation Standards Committee (DASC)
  • P1076 Standard VHDL Language Reference Manual (VASG)
    • VHDL-200x: the next revision
    • Issues Screening and Analysis Committee (ISAC)
    • VHDL Programming Language Interface Task Force (VHPI)
  • P1076.1 Standard VHDL Analog and Mixed-Signal Extensions (VHDL-AMS)
  • P1076.1.1 Standard VHDL Analog and Mixed-Signal Extensions - Packages for Multiple Energy Domain Support (StdPkgs)
  • P1076.4 Standard VITAL ASIC (Application Specific Integrated Circuit) Modeling Specification (VITAL)
  • P1076.6 Standard for VHDL Register Transfer Level (RTL) Synthesis (SIWG)
  • P1364.1 Standard for Verilog Register Transfer Level Synthesis (VLOG-Synth)
  • P1481 Standard for Integrated Circuit (IC) Open Library Architecture (OLA) (IEEE1481R)
  • P1499 Standard Interface for Hardware Description Models of Electronic Components (OMF)
  • P1603 Standard for an Advanced Library Format (ALF) Describing Integrated Circuit (IC) Technology, Cells, and Blocks (ALF)
  • P1647 Standard for the Functional Verification Language 'e' (eWG)
  • P1666 Standard System C Language Reference Manual (systemc) [cosponsored with IEEE-SA CAG]
  • P1685 SPIRIT XML Standard for IP Description (IEEE-1685)
  • P1735 Design Intellectual Property (IP) Encryption and Rights Management. (IEEE-1735)
  • SystemVerilog Working Group
    • P1800 SystemVerilog: Unified Hardware Design, Specification and Verification Language (SV-IEEE1800) [cosponsored with IEEE-SA CAG]
    • P1364 Standard for Verilog Hardware Description Language (IEEEVerilog)
  • P1850 Standard for PSL: Property Specification Language (IEEE-1850) [cosponsored with IEEE-SA CAG]
Government Electronics and Information Technology Association (GEIA)
a sector of the Electronics Industries Alliance (EIA),
formerly the EIA Electronic Information Group - (EIG)
  • Compact Modeling Council (CMC)
  • I/O Buffer Information Specification (IBIS): ANSI/EIA-656
      (see also IBIS
  • Rule Augmented Interconnect Layout (RAIL
  • Computer Aided Software Engineering (CASE)
  • Electronic Data Interchange Format (EDIF) (The link is no longer valid.)

The Virtual Library EE page is a good source of links to other electrical engineering design resources.

EDA Industry Standing Conferences
  • HDL Conference (HDLCON)
  • International Forum on Design Languages ( FDL))
  • Design Automation Conference (DAC)
  • Design Automation & Test  in Europe (DATE)
  • Asian & Pacific Design Automation Conference (ASPDAC)
  • International Symposium on Physical Design (ISPD)
  • DesignCON (DesignCON)

Copyright (c) 1994-2006 by Accellera, last edited: 06/14/06 at 1:40 PDT