1. Welcome to the OVI Architectural Language Committee

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    The Architectural Language Technical Committee (ALC) has been created under the auspices of Open Verilog International (OVI) with the charter to develop, update and promote System-On-Chip Co-Design Language for the electronic industry.

  2. OVI Architectural Language Committee Members
    3. Sun Microsystems Infineon Technologies National Semiconductor Lavalogic
    Co-Design Cadence Motorola Verisity
    CAD-WORX C-level CynApps Meropa
    Improv Systems Simulation Magic FTTI Modelsim
    Mentor Graphics      

    Chairman : Vassilios Gerousis, Infineon Technologies.

    Email: Vassilios.Gerousis@Infineon.com

    Phone: (49 89) 23 42 13 42

    Email access to ALC = alc@eda.org

  3. CHARTER

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    Develop an architectural / algorithmic language standard with verification and analysis orientation. The language will cover the co-design space to allow modeling and verification of architectures and allow progressive refinement from abstract layer to implementation model. We will also identify the appropriate links to Verilog/VHDL and recommend possible language enhancement to enable this link.

    OVI ALC was established in June 1998. We plan to provide THE "ONLY REAL OPEN" Industry Standard by June 2000.

  4. Language Proposals
OVI ALC will base the language standard on commercial EDA capabilities. Four EDA companies offered their LRM based on OVI open standards rules. This includes no licensing and no patents on the language. The ownership of the standard will belong to OVI and then eventually will be transferred to IEEE.

The following languages and respective companies will be evaluated for the OVI Architectural Language standard:

  1. CYNLIB from CynApps.
  2. Java from Lavalogic.
  3. C-level.
  4. Simulation Magic.
  1. Architectural Language Goals
The current goals of the architectural language are:
  1. The language should allow modeling of behavior that is independent of software and hardware implementation. The semantics of the language will allow efficient partitioning, mapping and optimization to both hardware and software.
  2. The language should allow architectural exploration, performance modeling.
  3. The language should allow progressive refinement from and abstract model to an implementation model. The implementation model will allow partitioning into software and hardware and will allow behavioral synthesis to a lower level detailed model (gate and assembly code).
  4. The language should be designed with synthesis and formal verification requirements.
  5. The language should be based on an existing commercial language.
The ALC committee has developed a requirement document that defines in the language requirements. We are adding formal semantics to the requirements to allow us to move into the selection and extension of one the above donated languages.
  1. DRAFTS AND ALC MINUTES
  1. Requirements Document version 1.5 (provided on requests).
  2. ALC draft semantics (Now available to registered group members).
ALC Minutes will be installed soon for downloads.
  1. Current Status
The committee is in the evaluation phase of potential languages to be given to us by five commercial EDA vendors. We will select an architectural language by December 1999 and use it as a strawman for OVI architectural language standard. The target date for first OVI standard approval is June 2000.