Advanced EDA Benchmark Datasets

How to join the Benchmarks Mailing List	About the eda.org web site
Sources of Benchmarks and Design Examples	Activities and Events
Presentations and Reports	Contacts

Introduction:

The working group on Advanced EDA Benchmark Datasets is concerned with the acquisition and dissemination of industrial design examples for use in research and tool evaluation. This working group is an activity of the IEEE Circuits and Systems (CAS) CANDE Technical Committee.

Working Group Objectives:

Acquire large, representative designs from industry for use as design examples and benchmarks
Assist industrial contributors with the task of removing proprietary information from their designs.
Develop a repository of advanced design examples, which can be used freely by anyone.
Encourage uniform reporting of results and good scientific discipline in benchmarking.
Publicize the availability of good design examples and benchmarks worldwide.

Sources of Benchmark Circuits and Design Examples

We would like to provide a complete, up-to-date listing of useful benchmarks and design examples on this site. If you know of sites we do not list below, please send us a URL so we can add them to our list.

From Miroslav Velev at CMU: I would like to point you to a collection of (very challenging) benchmarks, available in CNF, ISCAS and BLIF formats from my web page: They can be used for SAT-checking, BDD heuristics optimization, ATPG, etc.

ISPD98 Circuit Partitioning Benchmark suite
Design for Testability and Automatic Test Pattern Generation: ITC Benchmarks:
Formal Verification Benchmarks from the University of Texas.
Design of Experiments, circuit equivalence classes, and collaborative benchmarking: Collaborative Benchmarking Laboratory
CMU DSP Vertical Benchmark project.
Standards-driven Test-data Environment for Electronic Design STEED Project
Interesting VHDL examples: The Hamburg VHDL Archive
Wolfgang Mueller's collection of public literature and public VHDL models/packages
Sun Microsystems Community Source program.

Activities, Events, and Related Topics of Interest:

Electronic Design Process Workshop, April 8-10, 2001

Metrics project at Gigascale Silicon Research Center

Presentations and Reports

CANDE-99 Status Report

The slides presented by Justin Harlow at CANDE 99 are available as a PowerPoint 97 file or a PDF file.

ICCAD-98 Benchmarks Workshop Report

A complete report on the ICCAD workshop is available as a Microsoft Word 7.0 document here.
A PDF version of the report is available here. Complete presentation materials of the speakers are available as PDF files below. Please note: These materials are the property of the authors, and should not be reproduced or distributed without express consent of the author.

Chuck Alpert, IBM
Herman Schmit, CMU
Roberto Landrau, Mitre Corporation
Nikil Dutt, UC Irvine
Jason Cong, UCLA
Hilary Kahn, U Manchester
Andrew Kahng, UCLA
Scott Davidson, Sun Microsystems

Join the Email List:

To join the email list for this IEEE CAS benchmark acquisition working group, send an email to this address with only the following text in the message: subscribe benchmrk (that's not a typo; there is no "a" in the group name).The list is moderated in an effort to minimize spam, so the moderator will add you to the list when you are determined to be legitimate.

About the eda.org machine

There are many groups with repositories and email exploders on the VHDL International Users' Forum (VIUF) Internet Services (VIIS) System. For more information about the VIIS supported features and access mechanisms (such as email, Internet or public dial-up), click here.

Group Sysop/Chair:

Steve Grout

DATC Benchmarks Chair:

Justin Harlow

Last update: 12 Feb 2001 JEH

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