Turns out IEEE-1481 (DCL) supports mulitple voltage
rails, and ultimately these voltages may be set on
a per/cell basis. That's a mechanism for modeling
"voltage islands". The standard also includes PDEF
which looks like it might cover this under the power
section and its kind of a back-annotation thing.
dcd::operating_conditions really didn't get into
this when were working on the DAC stuff. but at a
minimum I think we're going to need to set multiple
"named" voltages.
Bob