Here's some crude notes on things to look at in IEEE-1481
or some of the OLA work. I mostly didn't want to loose them.
Somewhere along the line we probably ought to look at how
DCDL works, or doesn't, with these standards.....
Bob
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- Process [ WC, BC, Nom ] Chip to Chip variation
|
1481 Calc Mode --+ (in the standard data structure)
- Temperature --> Number AppGetCurrentTemp
- Rails --> Number AppGetCurrentRailVoltage
- OP-Range --> Number AppGetCurrentOPRange
--> Commercial 0 - 100
--> Military -35 - 125
- Process Variation ( OLA ) On Chip variation
Min Early - Max Late "Slow Chip"
Max Early - Min Late "Fast Chip"
- dcpmSetCurrentProcessPoint ( OLA )
***** From a conversation with Jim Engel 09/01/99
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-- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- IBM Microelectronics Division ASIC Synthesis and Timing Team -------------------------------- -------------------------------- Bob Dilly 802-769-7786 dilly@btv.ibm.com IBM - Dept G46V - MS 863K Essex Junction, VT 05452-4299 tie 446-7786 / dilly@btv.vnet