Buffer Issue Resolution Documents (BIRD)

ID# Issue Title Requester Date
Submitted
Date
Accepted
99.1 AMS Language Versions Arpad Muranyi, Intel Corp. June 10, 2005 , July 15, 2005 August 5, 2005
98 Gate Modulation Effect (table format) Arpad Muranyi, Intel Corp. May 20, 2005 , PENDING
97.2 Gate Modulation Effect Arpad Muranyi, Intel Corp. March 4, 2005 , April 22, 2005, May 25, 2005 PENDING
96 [Model Spec] and [Receiver Thresholds] Ordering Randy Wolff, Micron Technology, Inc. December 29, 2004 February 18, 2005
95.6 Power Integrity Analysis using IBIS Syed Huq, Vinu Arumugham and Zhiping Yang, Cisco Systems; Bob Ross, Teraspeed Consulting Group December 13, 2004 , Jan. 28, 2005, March 8, 2005, March 29, 2005, April 19, 2005 PENDING
94.2 Clarifications on [Diff Pin] Parameters Arpad Muranyi, Intel Corp. February 22, 2005 , March 4, 2005; July 15, 2005 PENDING
93.1 Model and Signal Name Limit Extension Michael Mirmak, Intel Corp. November 5, 2004 , November 21, 2004 December 10, 2004
92.1 Multiple Terminator and Series Elements under [Model] Michael Mirmak, Intel Corp. November 2, 2004 , November 21, 2004 January 28, 2005
91.3 Multi-lingual Logic States Clarification Ian Dodd and John Angulo, Mentor Graphics Corp. August 26, 2004 , October 4, 2004; October 26, 2004 November 19, 2004
90.2 Multiple A_to_D Subparameters Clarification Bob Ross, Teraspeed Consulting Group August 17, 2004 , September 1, 2004, September 22, 2004 October 29, 2004
89.1 Keyword Hierarchy Tree Michael Mirmak, Intel Corporation April 5, 2004 , May 11, 2004 June 4, 2004
88.3 Driver Schedule Initialization Bob Ross, Teraspeed Consulting Group; Arpad Muranyi, Intel March 9, 2004 , June 11, 2004, June 18, 2004, June 21, 2004 July 16, 2004
87 Series Pin Mapping Clarifications Arpad Muranyi, Intel Corporation January 19, 2004 , February 20, 2004
86.1 Clarification of Submodel Mode Lynne Green, Green Streak Programs, Bob Ross, Teraspeed November 21, 2003 , December 26, 2003 January 9, 2004
85.3 Slew Time Estimate Clarifications John Angulo, Mentor Graphics Corp. October 3, 2003 , November 7, 2003; December 3, 2003; December 8, 2003 January 9, 2004
84.1 Driver Schedule Clarifications Arpad Muranyi, Intel Corporation September 30, 2003 , November 21, 2003 December 5, 2003
83.2 Series Element Clarifications Michael Mirmak, Intel Corporation September 17, 2003 , November 7, 2003; November 19, 2003 December 5, 2003
82.2 Clarification of Clamp Table Use Lynne Green, Cadence, and Robert Haller, SiSoft June 27, 2003, August 7, 2003, August 22, 2003 August 22, 2003
81.1 Clarify Usage Rule for [Pin] I/O Model Assignment Lance Wang, Cadence Design Systems, Inc. December 23, 2002; January 10, 2003 February 14, 2003
80.1 Add External Reference Column to Pin Mapping Keyword Michael Mirmak, Intel Corporation November 25, 2002, January 6, 2003 February 14, 2003
79 Non-linear Buffer Impedance (extension to C_comp) Luca Giacotto (Alstom Transport) & Arpad Muranyi (Intel Corp.) November 6, 2002 , Rejected March 28, 2003
78.1 Comment Line Length Limit Lynne Green, Cadence Design Systems September 6, 2002; December 10, 2002 January 10, 2003
77.2 Differential Subparameter Additions Bob Ross, Mentor Graphics July 15, 2002, July 26, 2002, December 20, 2002 January 10, 2003
76.1 Additional Information Related to C_comp Refinements Arpad Muranyi and Stephen Peters, Intel Corp. June 28, 2002, July 19,2002 July 19, 2002
75.8 Multi-Lingual Model Support Bob Ross and Chris Reid, Mentor Graphics, Arpad Muranyi and Michael Mirmak, Intel 3/29/02, 5/3/02, 7/15/02, 8/14/02, 9/11/02, 9/27/02, 10/18/02, 12/20/02, 12/23/02 1/10/03
74.6 EMI Parameters Guy de Burgh, Mentor Graphics 3/19/02, 5/31/02, /9/16/02, 4/30/03, 5/21/03, 7/18/03, 8/08/03 08/08/03
73.4 Fall Back Submodel Bob Ross, Mentor Graphics 8-2-01, 10-1-01, 10-16-01, 11-12-01, 11-19-01 January 11, 2002
72.3 Accommodating PMOS and NMOS//PMOS Series FET Models Tom Dagostino, Mentor Graphics 7-26-01, 10-3-01, 10-8-01, 10-26-01 10-26-01
71 Timing Test Loads in [Model Spec] to Support PCI & PCI-X Stephen Peters, Intel Corp. April 30, 2001 August 10, 2001
70.5 Golden Waveforms Greg Edlund, IBM March 16, 2001, April 16, 2001, April 18, 2001, May 4, 2001, July 23, 2001, August 10, 2001 August 10, 2001
69.1 Golden Waveforms Greg Edlund, IBM December 15, 2000, February 22, 2001 Rejected March 30, 2001
68.1 Clarify that Rising and Falling Waveforms Should be Correlated David Lorang, Intel October 24, 2000, February 2, 2001 February 16, 2001
67.1 Increase V-T Table 100 Point Limit Bob Ross, Mentor Graphics, Ian Dodd, Cadence October 24, 2000, October 27, 2000 December 8, 2000
66 [Model Spec] Vref Addition Scott McMorrow, SiQual November 15, 1999 December 8, 2000
65.2 C_comp Refinements Arpad Muranyi, Intel 10-25-99, 12-12-2000, 2-2-2001 February 16, 2001
64.4 Alternate Package Models Arpad Muranyi, Intel; Mike LaBonte, Cadence 10-25-99, 11-19-99, 10-8-2000, 11-1-2000, 11-20-2000 December 8, 2000
63.3 Documentation of Receiver Setup and Hold Timing Conditions D.C. Sessions (Philips), Stephen Peters, Richard Mellitz, Arpad Muranyi (Intel Corp.) Sept 8, 1999, Dec 27, 1999, Jan 6, 2000, Feb 17, 2000 Rejected March 17, 2000
62.6 Enhanced Specification of Receiver Thresholds DC Sessions (Philips), Stephen Peters, Richard Mellitz, Arpad Muranyi (Intel Corp). Aug 24 1999, Dec 28 1999, Jan 6 2000, Feb 18 2000, Feb 25 2000, Mar 3 2000, Mar 20 2000 April 14, 2000
61.1 Enhanced Characterization of Receivers D.C Sessions (Philips), Richard Mellitz, Stephen Peters, Arpad Muranyi (Intel Corp) August 9, 1999, Dec 28, 1999 Rejected November 17, 2000
60 Electrical Board Description Diagrams Bob Ross, Mentor Graphics August 4, 1999 August 20, 1999
59.2 Model Spec Diagrams Bob Ross, Mentor Graphics August 3, 1999, August 6, 1999, August 20, 1999 August 20, 1999
58.3 Driver Schedule Keyword Clarification Arpad Muranyi, Intel Corporation 3/2/99, 5/5/99, 5/10/99, 5/28/99 5/28/99
57.1 Timed Bus Hold Extension Bob Ross, Mentor G., Arpad Muranyi & Stephen Peters, Intel December 4, 1998, December 18, 1998 December 18, 1998
56.1 Relaxation of [Series Pin Mapping] Restriction Bob Ross, Mentor Graphics November 25, 1998, December 18, 1998 December 18, 1998
55 [Model Spec] Vmeas Addition Bob Ross, Mentor Graphics October 4, 1998 November 20, 1998
54 Package Model Corrections Bob Ross, Mentor Graphics, Stephen Peters, Intel Corporation September 28, 1998 November 6, 1998
53.1 IBIS File Character Set Geoffrey Ellis at Cadence Design Systems August 7, 1998, September 1, 1998 September 18, 1998
52 [Driver Schedule] Clarifications Arpad Muranyi, Intel 6/1/98 July 17, 1998
51 3-state_ECL Bob Ross, Mentor Graphics May 1, 1998 June 5, 1998
50.3 Add Submodel Bus Hold Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel 4/2/98, 5/21/98, 5/29/98, 6/19/98 July 17, 1998
49.4 Add Submodel Dynamic Clamps Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel 4/2/98, 5/1/98, 5/21/98, 6/19/98, 7/17/98 July 17, 1998
48.4 Add Submodel Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel 4/2/98, 5/1/98, 5/21/98, 5/29/98, 6/19/98 July 17, 1998
47 Remove pin name as a sub-param of the [Pin List] keyword Stephen Peters Intel Corp. March 5, 1998 April 3, 1998
46.1 Relaxation of some IBIS model file name restrictions. Matthew Flora and Kellee Crisafulli, HyperLynx 4 Dec 1997, 2 June 1998 June 18, 1998
45.1 Dynamic Clamps Neven Orhanovic and Bob Ross, Interconnectix 10/31/97, 11/20/97 Rejected 4/24/98
44 Interpretation of Min/Max/Weak/Strong data Andy Ingraham, Digital Equipment Corp. June 8, 1997 Rejected July 17, 1998
43 Component Test Point Subparameters Bob Ross, Interconnectix May 23, 1997 June 12, 1997
42.3 Modeling Current Waveforms C. Kumar, Cadence, Bob Ross, Interconnectix May 16, 1997, May 19, 1997, May 30, 1997, June 12, 1997 Rejected July 17, 1998
41.8 Modelling Series Switchable Devices John Fitzpatrick, Alcatel, Bob Ross, Interconnectix 2/12/97, 2/17/97, 5/14/97, 5/15/97, 5/16/97, 5/22/97, 5/28/97, 5/30/97, 6/12/97 June 12, 1997
40 Overshoot Nomenclature Bob Ross, Interconnectix, Inc. November 27, 1996 February 14, 1997
39 Specification Enhancement John Fitzpatrick, Alcatel CIT Ahmed Omer, Motorola, Inc. 10/11/96 November 8, 1996
38 Maximum Voltage John Fitzpatrick, Alcatel July 03, 1996 Rejected Nov. 8, 1996 (covered
37.3 Enhancement To The Package Model (.pkg file) Specification Stephen Peters June 23, 1996, Aug. 12, 1996, Sept. 23, 1996, Oct. 18, 1996 Oct 18, 1996
36.3 Electric Descriptions of Boards Stephen Peters, Intel, Hank Herrmann, AMP June 23, 1996, Feb. 13, 1997, March 7, 1997, March 31, 1997 April 8, 1997
35.3 Multi-staged Outputs Bob Ross, Interconnectix, Inc. 5/13/96, 6/21/96, 10/16/96 12/6/96
34.2 Stored Charge Effects Bob Ross, Interconnectix, Inc. 3/5/96, 3/22/96, 9/27/96 September 27, 1996
33 Proposed IBIS Physical Package Format (.IAP) Kellee Crissafulli, Hyperlynx October 29, 1995 Rejected June 6, 1996
32 Additional Enhancement To The Package Model (.pkg file) Specification C. Kumar Dec 14, 1995 (Actual Submission Jan. 11, 1996) Rejected May 30, 1997
31.3 Mated Models Bob Ross, Interconnectix, Inc. 11/22/95, 3/18/96, 4/29/96, 5/4/96 Rejected 5/30/97
30.2 Programmable buffers in IBIS models Arpad Muranyi 8-10-95 DATES REVISED: 10-03-95, 10-24-95 10-27-95
29.2 Banded_matrix Extension Bob Ross, Interconnectix, Inc. 26 May 1995, 5 June 1995 30 June 1995 (29.1), 21 July 1995 (29.2)
28.3 Enhancement To The Package Model (.pak file) Specification Stephen Peters May 18, 1995 , June 26, 1995, August 21, 1995, Sept 20, 1995 October 6, 1995
27.1 Propose new keyword to specify default differential threshold Bob Ward, Texas Instruments & Bob Ross, Inteconnectix, Inc. 03APR95 DATE MODIFIED: 21SEPT95 Rejected October 6, 1995
26 General syntax rules an guidelines on TAB character usage Arpad Muranyi, Intel Corporation, Folsom, CA March 20, 1995 May 26, 1995
25.3 Data Derivation Expansion Bob Ross, Interconnectix, Inc. 25 January 1995 , 7Feb95, 9Feb95, 24Feb95 24Feb95
24.1 C_comp, ramp rates and waveform tables Stephen Peters Dec, 6, 1994 Passed 12/9/94
23 Waveform Table Minimum Number of Numerical Entries Bob Ross, Interconnectix, Inc. 19 November 1994 , December 9, 1994
22 Sub-Parameter Case Sensitivity Bob Ross, Interconnectix, Inc. 29 October 1994 , Rejected November 18, 1994
21 Waveform Table Minimum Number of Entries Bob Ross, Interconnectix, Inc. 29 October 1994 , November 18, 1994
20.1 Error correction regarding monotonicity statement in V2.1 Kellee Crisafulli, HyperLynx Inc. 10-10-94 , 11-18-94 11-18-94
19.1 V_fixture Subparameter Min/Max Additions Bob Ross, Interconnectix, Inc. 8 August 1994 , 13 August 1994 August 26, 1994
18.2 [Diff Pin] Parameter Order Bob Ross, Interconnectix, Inc. 20 July 1994 , 25 July 1984, 5 Aug 1994 5 August 1994
17 Number of Points Scott Bloom, Interconnectix, Inc. 17 July 1994 , Rejected August 26, 1994
16 Adding an override section for [Model] sub-parameters John Keifer at Intel May 23, 1994 (from a portion of BIRD14.1, BIRD14.2) Rejected November 18, 1994
15 Clarification on the usage of the V/I tables. Arpad Muranyi, Intel Corporation May 10, 1994 May 20, 1995 (with revisions in Standard)
14.3 Adding four new sub-parameters to [Model] John Keifer at Intel April 26, 1994 , May 18, 1994, May 20, 1994 May 20, 1994
13.2 Clarify Some Conditions of Measurements Bob Ward Texas Instruments 22 APR 94, 13 MAY 94 May 20, 1994
12.2 Non-Linear Driver Waveforms Stephen Peters, Intel Corp. April 25, 1994, Revised April 29, 1994 May 13, 1994
11.2 Improving common error detection in IBIS_CHK program. Kellee Crisafulli, HyperLynx Inc. 03-28-94 , 04-21-94 April 29, 1994
10.2 Describing coupling effects in package models Eric Bracken, Performance Signal Integrity, Inc. 17 March 1994 , 15 April 1994 April 29, 1994
9.3 Terminator Specification Bob Ross, Interconnectix, Inc. 2 February 1994 , 21 February 1994, 22 April 1994, 29 April 1994 29 April 1994
8.2 Specification of V/I data monotonicity Kellee Crisafulli, HyperLynx Inc. January 29, 1994 , 5-9-94 May 13, 1994
7.2 Open Specification Completion Bob Ross, Interconnectix, Inc. 13 January 1994 , 31 January 1994, 1 February 1994 February 18, 1994
6.2 Differential Pin Specification Bob Ross, Interconnectix, Inc. 12 January 1994 , 29 January 1994, 5 February 1994 February 18, 1994
5.4 Pin Mapping for Ground Bounce Simulation Bob Ross, Interconnectix, Inc. May 13, 1994, May 15, 1994 May 20, 1995
4 ECL Extensions Stephen Peters, Intel Corp. November 5, 1993 November 12, 1993
3 Multiple power supplies and references Stephen Peters, Intel Corp. Nov 4, 1993 November 12, 1993
2.2 Requiring VIH VIL thresholds for input devices Jon Powell, Quad Desgin October 4, 1993 , February 16, 1994; April 26, 1994 April 29, 1994
1 ECL Extensions Stephen Peters, Intel Corp. September 22, 1993 Rejected November 12, 1993

The incorporation of the BIRDs into versions of IBIS are shown in birddir.txt.

To find out how to submit a BIRD to the IBIS Open Forum, please read the document bird.txt.