Subject: Re: Required data in IBIS Models (was Re: Clarification needed.)

From: [email-masked]
Date: Thu, 24 May 2001 10:54:40 -0400

Phani,  I am just beginning to use IBIS models in XTK, so I am not entirely
aware of how the Vmeas parameter is used.  I do know that it is used for
timing analysis and that IBIS2XTK will complain if it is not there.  I
mentioned that he 'wanted' the parameter because I have received more than
a few complaints from customers when I did not include it in a IBIS
datasheet ( my apologies to anyone who has encountered this ).  I have
since reviewed all IBIS datasheets I have generated and revised them to
include this parameter if it was not included originally.

I would like to hear more about how this parameter is used.

Adam Tambone

Phani Putrevu <[email-masked]> on 05/24/2001 10:27:15 AM

To:   Adam Tambone/SouthPortland/Fairchild@Fairchild
cc:   [email-masked], [email-masked]

Subject:  Required data in IBIS Models (was Re: Clarification needed.)

The IBIS spec states that the model subparameter Vmeas is optional. The
ibis
checker does not complain if this is not present. HSpice can read an IBIS
file
even if the Vmeas is not specified. But I believe some tools (ICX) require
this parameter to be present. (I do not use IBIS models - I was only
involved
in developing the models.)

Does it mean that the tool is not compliant. What additional information is
derived from this parameter? Should a tool rely on this information to
produce
an output, or should it produce the 'approximate' output that the vendor
specified in the IBIS model.

regards,
Phani

[email-masked] wrote:
>
> Anbazhagan,
>
> oops... forgot to mention that you also want Vmeas.
>
> Adam

---

From: "Reid, Chris" <[email-masked]>
Date: Thu, 24 May 2001 08:55:11 -0700

Adam,

Yes, the ICX tool (and probably others) requires the Vmeas
parameter and a timing test load.  The reason is that timing
cannot be computed without it.

In short, device manufacturers report component delay as
the time from when some input on the device switches to the
time a corresponding output on the device reaches Vmeas
when loaded with a specified circuit.  SI tools like ICX
will report the interconnect delay as the time an input
on a net reaches the input logic thresholds minus the time
the it would take the driver that is active to reach Vmeas
into the standard load.  Then the delay from the input of
one device to the input of another can be computed as the
sum of the component delay and the interconnect delay.  The
time-to-vmeas into a standard load drops out of the
calculation.  The reason for actually doing the simulation
of time-to-vmeas instead of just publishing a number in the
IBIS specification is to avoid systematic errors that may
be caused by the details of how one simulator represents the
driver versus another.

Chris Reid

-----Original Message-----
From: [email-masked]
[mailto:[email-masked]]
Sent: Thursday, May 24, 2001 7:55 AM
To: Phani Putrevu
Cc: [email-masked]; [email-masked]
Subject: Re: Required data in IBIS Models (was Re: Clarification
needed.)

Adam Tambone

regards,
Phani

---

From: "Ingraham, Andrew" <[email-masked]>
Date: Thu, 24 May 2001 12:08:05 -0400

I believe Vmeas is used to determine whether the analog voltage at a
device's pin, would be interpreted by that device as a logical High or Low.

So its need would depend on how one uses the IBIS model, i.e., which tool.

If the IBIS model is used only to generate simulated waveforms, then the
parameter is irrelevant.  If used directly for timing analysis, the
parameter would be needed.

HSPICE's IBIS implementation has a subcircuit with a binary output signal,
whose value represents the logical level of the voltage on the pin.  This
makes it a bit easier for the user to check timing and other things.
Presumably it needs Vmeas in order to generate that binary output voltage.

Regards,
Andy

---

From: "Dagostino, Tom" <[email-masked]>
Date: Thu, 24 May 2001 09:20:02 -0700

Vmeas is used by the simulator to determin the delay of the output stage
driving the manufacturer's reference load to the measurement voltage
(Vmeas).  The prop delay of the part is specified into this load also.  The
simulator is trying to do a timing analysis, time of flight, which includes
the time of the driver and the time of the trace on the board.  This
information is used when analyzing total delays so that overall system
timing can be verified.

Tom Dagostino
Modeling Manager
Mentor Graphics Corp.
SAE
[email-masked]
503-685-1613

-----Original Message-----

Adam Tambone

regards,
Phani