Subject: Re: BIRD #??? (yet to be issued)

From: [email-masked] (C. Kumar)
Date: Thu, 2 Dec 93 09:37:51 -0500

This scheme has an implied assumption. i.e. each signal can be uniquley identified with one power and one ground pin, while the package itself can have
multiple power and ground pins. It merely makes the association between signal
pin and corresponding power and ground pins  explicit.

If you have a more robust scheme can you propose it?

Thanx
- kumar

---

From: [email-masked]
Date: Thu, 02 Dec 93 10:41:49 -0500

Y'all,

  Say we have:

  Pins:    11    12     13                    21    22     23
           +     +      +                     +     +      +
           |     |      |                     |     |      |
	   |     |      |                     |     |      |
  Buses:   +-----+------+-----> to a few      +-----+------+-----> to a few
	      GNDBUS1           drivers          GNDBUS2           more

In Kumar's suggested format we have:

[Pin]	signal_name	model_name	gnd	pwr
1	RAS0#		Buffer1		10	18
2	RAS1#		Buffer2		12	20
....
...
...
11	GND		GNDBUS1
12	GND		GNDBUS1
13	GND		GNDBUS1
....
21	GND		GNDBUS2
22	GND		GNDBUS2
23	GND		GNDBUS2

One problem with this (as I see it) is that the *model* names GND and POWER
are "special" (they indicate that the pin is NOT connected to an ordinary
nonlinear I-V curve model, and so we don't go looking for that model in
the .ibs file.)  In the suggested format above, we don't have any way to
tell that GNDBUS1 isn't an I-V model.

The *signal* names, of course, are sacred because they appear in the
schematic symbol for the part.  Pins that connect to separate internal
buses might just be given the same name (e.g. GND) in the schematic, and
so we can't rely on these to distinguish buses.

I suggest we instead use the two remaining columns to specify the associated
bus names; for example,

[Pin]	signal_name	model_name	gnd		pwr
1	RAS0#		Buffer1		GNDBUS1		PWRBUS1
2	RAS1#		Buffer2		GNDBUS2 	PWRBUS2
....
...
...
11	GND		GND		GNDBUS1  	NA
12	GND		GND		GNDBUS1  	NA
13	GND		GND		GNDBUS1  	NA
....
21	GND		GND		GNDBUS2  	NA
22	GND		GND		GNDBUS2  	NA
23	GND		GND		GNDBUS2		NA

It's now clear which pin is a lowly ground pin (and not an I-V model),
and it's also clear to which bus every GND pin and every driver is
connected.

Now there's no ambiguity--I think...

But what would we do with buffers that have connections to multiple 
supply voltages?

--Eric Bracken
  [email-masked]