Subject: Re: YACC & Ibis

From: [email-masked] (Randy Harr)
Date: Fri, 10 Dec 93 11:58:02 PST

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> From [email-masked] Fri Dec 10 09:22:52 1993
> To: [email-masked]
> Subject: YACC & Ibis
> 
> Hello,
> 
> Has anyone written a YACC grammar for Ibis?
> 
> Chris Reid
> [email-masked]
> 

We tried but, as I presume you are implying, it could not be accurate for
several reasons.

See the file /pub/die/wrkshop2/electric.{mif or ps} on vhdl.org; appendix A,
page 11-12.  The grammer only is attached below for convenience.

randy
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Appendix A

Notation
--------

Terminals of the grammar are enclosed by apostrophes. They are the actual 
keyword used in the DIE file format. Keywords are not case sensitive and 
are put in upper case in this definition only.

The vertical bar "|" separate alternatives. For example, A | B | C, represents 
exactly one occurrence of A or B or C.

Braces "{}" indicate zero or more occurrences of the enclosed syntactic 
construct. For example, { A } represents the empty sequence, as well as A , 
and A A, A A A, and so on.

The terminals of DIE file format are keyWord token and item token. They 
are defined as entries in the semantic definition for each section.

Definition
----------

$goal ::= ibisFileFormat

ibisFileFormat ::= fileHeaderSection sections `[` `END' `]'

fileHeaderSection ::= ibisVersion { fileHeaderItems }

fileHeaderItems ::= commentChar | fileName | fileVersion | date | source 
| notes | disclaimer

ibisVersion ::= `[` `IBIS Ver' `]' string

commentChar ::= `[` `comment char' `]' commentString

commentString ::= character `_char'

fileName ::= `[` `File name' `]' fileNameString

fileNameString ::= string `.ibs'

fileVersion ::= `[` `File Rev' `]' string

date ::= `[` `date' `]' text

source ::= `[` `source' `]' text

notes ::= `[` `notes' `]' text

disclaimer ::= `[` `disclaimer' `]'

sections ::= section { section }

section ::= componentDefinitionSection | modelDefinitionSection

componentDefinitionSection ::= component component_items

component_items ::= manufacturer | package | pin

manufacturer ::= `[` `manufacturer' `]' text

package ::= `[` `package' `]' package_RLC

package_RLC ::= [ `R_pkg' | `L_pkg' | `C_pkg' ] typ_min_max

typ_min_max ::= real real_na real_na

real_na ::= [ real | `NA' ]

pin ::= `[` `pin' `]' { pin_entry }

pin_entry ::= integer string [model_identifier | `power' | `gnd' | `NC'] 
real_na real_na real_na

modelDefinitionSection ::= `[` `model' `]' modelEntry

modelEntry ::= [ modelType | polarity | enable | vinl | vinh | c_comp | 
voltage_range | pulldown | pullup | gndClamp | powerClamp | ramp ]

modelType :: = `[` `model_type' `]' [ `input' | `output' | `i/o' | `3-
state' | `open_drain' ]

polarity ::= `[` `polarity' `]' [ `non-inverting' | `inverting' ]

enable ::= `[` `enable' `]' [ `active-high' | `active-low' ]

vinl ::= `vinl' `=' voltage_spec

vinh ::= `vinh' `=' voltage_spec

voltage_spec ::= real [ `v' ]

c_comp ::= `c_comp' typ_min_max

voltage_range ::= `[` `voltage range' `]' typ_min_max

pulldown ::= `[` `pulldown' `]' viDefinitions

pullup ::= `[` `pullup' `]' viDefinitions

gndClamp ::= `[` `gnd_clamp' `]' viDefinitions

powerClamp ::= `[` `power_clamp' `]' viDefinitions

viDefinition ::= { real typ_min_max }

ramp ::= `[` `ramp' `]' { dvdtR | dvdtF }

dvdtR ::= `dV/dt_r' typ_min_max_rate

dvdtF ::= `dV/dt_r' typ_min_max_rate

typ_min_max ::= rate [ rate | `NA' ] [ rate | `NA' ]

rate ::= real `/' real