Subject: Re: BIRD XXX V_fixture and Vref min/max

From: Will Hobbs <[email-masked]>
Date: Tue, 9 Aug 94 16:35:19 PST

Text item: 

IBIS Members:

The following BIRD is one approach at addressing the problem John Brennan 
raised concerning V_fixture voltage changes with supply changes for 
[Rising waveform] and [Falling waveform] specifications.  The same problem 
can arise for the Vref sub-parameter in the [Model] keyword.  Thus the 
proposed additions to sub-parameters are presented in one BIRD.

Bob Ross,
Interconnectix, Inc.

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                 Buffer Issue Resolution Document  (BIRD)

BIRD ID#:                19
ISSUE TITLE:             V_fixture and Vref Subparameter Min/Max Additions 
REQUESTOR:               Bob Ross, Interconnectix, Inc.
DATE SUBMITTED:          8 August 1994 
DATE REVISED:
DATE ACCEPTED BY IBIS OPEN FORUM:    Pending

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******************************************************************************

STATEMENT OF THE ISSUE:

There are cases with respect to certain devices including CMOS logic where the 
[Rising Waveform] and [Falling Waveform] fixture load specifications are not 
adequate to define the min and max table loads.  Additional sub- parameters 
for [Rising Waveform] and [Falling Waveform] are proposed: V_fixture_min and 
V_fixture_max.  A similar situation may occur in the [Model] specification 
with respect to Vref.  If the Model_type is Open_drain, the Vref (or Thevenin 
equivalent) may be related directly or through some proportion to Vcc and not 
be fixed.  Vref_min and Vref_max are proposed
as additonal subparameters.

******************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

The complete [Model] keyword description is presented here.  Changes in
the text related to adding "Vref_min" and "Vref_max" are designated by "|*".

|============================================================================== 
|     Keyword:  [Model]
|    Required:  Yes
| Description:  Used to define a model, and its attributes.
|  Sub-Params:  Model_type, Polarity, Enable, Vinl, Vinh, C_comp, Vmeas, Cref, 
|*               Rref, Vref, Vref_min, Vref_max
| Usage Rules:  Each model type must begin with the keyword [Model].
|               The model name must match the one that is listed under
|               the [Pin] keyword and must not contain more than 20 characters. 
|               A .ibs file must contain enough [Model] keywords to cover all
|               of the model names specified under the [Pin] keyword, except 
|               for those model names that use reserved words (POWER, GND and
|               NC).  Model names with reserved words are an exception and they 
|               do not have to have a corresponding [Model] keyword.
|
|               Model_type must be one of the following:
|               Input, Output, I/O, 3-state, Open_drain, I/O_open_drain, 
|               Open_sink, I/O_open_sink, Open_source, I/O_open_source, 
|               Input_ECL, Output_ECL, I/O_ECL, and Terminator.
|
|               Special usage rules apply to the following.  Some definitions 
|               are included for clarification:
|
|               Input              These model types must have Vinl and Vinh 
|               I/O                defined.  If they are not defined, the
|               I/O_open_drain     parser issues a warning and the default 
|               I/O_open_sink      values of Vinl=0.8V and Vinh=2.0V are
|               I/O_open_source    assumed. 
|
|               Input_ECL          These model types must have Vinl and Vinh 
|               I/O_ECL            defined.  If they are not defined, the
|                                  parser issues a warning and the default 
|                                  values of Vinl=-1.475V and Vinh=-1.165V 
|                                  are assumed.
|
|               Terminator         This model type is an input-only device that 
|                                  can have analog loading effects on the
|                                  circuit being simulated but has no digital 
|                                  logic thresholds.  Examples of Terminators 
|                                  are: capacitors, termination diodes, and
|                                  pull-up resistors. 
|
|               Output             This model type indicates that an output 
|                                  always sources and/or sinks current and 
|                                  cannot be disabled.
|
|               3-State            This model type indicates that an output 
|                                  can be disabled, i.e. put into a high
|                                  impedance state. 
|
|               Open_sink          These model type indicate that the output 
|               Open_drain         has an OPEN side (do not use the [Pullup]
|                                  keyword, or if it must be used, set I = 0mA 
|                                  for all voltages specified) and the output 
|                                  SINKS current.  Open_drain model type is
|                                  retained for backward compatibility. 
|
|               Open_source        This model type indicates that the
|                                  output has an OPEN side (do not use the
|                                  [Pulldown] keyword, or if it must be used, 
|                                  set I = 0mA for all voltages specified) and 
|                                  the output SOURCES current.
|
|               Input_ECL          These model types specify that the model 
|               Output_ECL         represents an ECL type logic that follows 
|               I/O_ECL            different conventions for the [Pulldown] 
|                                  keyword.
|
|               The Model_type and C_comp sub-parameters are required.  The 
|*               Polarity, Enable, Vinl, Vinh, Vmeas, Cref, Rref, Vref,
|*               Vref_min, and Vref_max sub-
|               parameters are optional.  C_comp defines the silicon die
|               capacitance.  This value should not include the capacitance of 
|               the package.  C_comp is allowed to use "NA" for the min and max 
|               values only.  The Polarity sub-parameter can be defined as
|               either as Non-inverting or Inverting, and the Enable sub-
|               parameter can be defined as either Active-high or Active-low. 
|
|*               The Cref, Rref, Vref, Vref_min, and Vref_max sub-parameters 
|*               correspond to the test load
|               that the manufacturer uses when specifying the propagation
|               delay and/or output switching time of the device.  The Vmeas 
|               sub-parameter is the reference voltage level that the
|*               manufacturer uses for the component.  Include Cref, Rref, 
|*               Vref and
|               Vmeas information to facilitate board-level timing simulation. 
|               The assumed connections for Cref, Rref, and Vref are shown in 
|               the following diagram:
|
|                            _________ 
|                           |         |
|                           |      |\ |            Rref
|                           |Driver| \|------o----/\/\/\----o Vref 
|                           |      | /|      |
|                           |      |/ |     === Cref 
|                           |_________|      |
|                                            | 
|                                           GND 
|*
|*               Vref defines the test load voltage for typ, min and max 
|*               supply conditions.  However, when the test load voltage 
|*               is related to the power supply voltages, then the sub- 
|*               parameters Vref_min and Vref_max can be used to further 
|*               specify the test load conditions for min and max supply 
|*               voltages.
|
| Other Notes:  A complete [Model] description normally contains the following 
|               keywords:  [Voltage Range], [Pullup], [Pulldown], [GND Clamp], 
|               [POWER Clamp], and [Ramp].  A Terminator model uses one
|               or more of the [Rgnd], [Rpower], [Rac], and [Cac].  However, 
|               some models may have only a subset of these keywords.  For
|               example, an input structure normally only needs the
|               [Voltage Range], [GND Clamp], and possibly the [POWER Clamp]
|               keywords.  If one or more of [Rgnd], [Rpower], [Rac], and [Cac] 
|               keywords are used, then the Model_type must be Terminator. 
|------------------------------------------------------------------------------ 
| Signals       CLK1, CLK2,...         | Optional signal list, if desired 
[Model]         Clockbuffer
Model_type      I/O
Polarity        Non-Inverting
Enable          Active-High
Vinl = 0.8V                             | input logic "low" DC voltage, if any 
Vinh = 2.0V                             | input logic "high" DC voltage, if any 
Vmeas = 1.5V               |Reference voltage for timing measurements
Cref = 50pF                |Timing specification test load capacitance value 
Rref = 500                 |Timing specification test load resistance value 
Vref = 0                   |Timing specification test load voltage
|* Vref_min = 0               |Redundant, presented for syntax illustration 
|* Vref_max = 0               |Redundant, presented for syntax illustration 
| variable      typ             min             max
C_comp          12.0pF          10.0pF          15.0pF 
|
|==============================================================================

The [Rising Waveform], [Falling Waveform] keyword description is presented 
along with changes in the text related to including the sub-parameters 
"V_fixture_min" and "V_fixture_max".  Changed lines are designated by "|*".

|============================================================================== 
|     Keywords:     [Rising Waveform], [Falling Waveform]
|     Required:     No
|     Description:  Describes the shape of the rising and falling edge 
|                   waveforms of a driver.
|*     Sub-Params:   R_fixture, V_fixture, V_fixture_min, V_fixture_max, 
|*                   C_fixture, L_fixture,
|                   R_dut, L_dut, C_dut
|     Usage Rules:  Each [Rising Waveform] and [Falling Waveform] keyword 
|                   introduces a table of time vs. voltage points that
|                   describe the shape of an output waveform.  These
|                   time/voltage points are taken under the conditions 
|                   specified in the R/L/C/V_fixture and R/L/C_dut
|                   sub-parameters.  The table itself consists of
|                   one column of time points, then three columns of
|                   voltage points in the standard typ, min, and max format. 
|                   The four entries must be placed on a single line and
|                   must be separated by at least one white space or tab
|                   character.  All four columns are required.  However, data 
|                   is only required in the typical column.  If minimum
|                   or maximum data is not available, use the reserved word
|                   "NA".  The first value in the time column need not be '0'. 
|                   Time values must increase as one parses down the table.
|                   The waveform table can contain a maximum of 100 data
|                   points.  A maximum of 100 waveform tables are allowed per
|                   model.  Note that for backwards compatibility, the existing 
|                   [Ramp] keyword is still required.
|
|                   A waveform table must include the entire waveform;
|                   i.e., the first entry (or entries) in a voltage column 
|                   must be the DC voltage of the output before switching 
|                   and the last entry (or entries) of the column must be 
|                   the final DC value of the output after switching.
|
|                   A [Model] specification can contain more than one rising 
|                   edge or falling edge waveform table.  However, each new 
|                   table must begin with the appropriate keyword and sub-
|                   parameter list as shown below.  If more than one rising or 
|                   falling edge waveform table is present, then the data in
|                   each of the respective tables must be time correlated. 
|                   In other words, the rising (falling) edge data in each 
|                   of the rising (falling) edge waveform tables must be
|                   entered with respect to a common reference point on the 
|                   input stimulus waveform.
|
|                   The 'fixture' sub-parameters specifies the loading
|                   conditions under which the waveform is taken.  The R_dut, 
|                   C_dut, and L_dut Sub-params are analogous to the
|                   package parameters R_pkg, C_pkg and L_pkg and are used 
|                   if the waveform includes the effects of pin
|                   inductance/capacitance.  The diagram below shows the 
|                   interconnection of these elements.
|
|                      PACKAGE            |   TEST FIXTURE 
|       _________                         |
|      |  DUT    |   L_dut   R_dut        | L_fixture  R_fixture
|      |  die    |---@@@@@--/\/\/\--o-----|--@@@@---o---/\/\/\----- V_fixture 
|      |_________|                  |     |         |
|                                   |     |         | 
|                                   |     |         |
|                            C_dut ===    |        === C_fixture 
|                                   |     |         |
|                                   |     |         | 
|                                  GND    |        GND 
|
|                   Only the R_fixture and V_fixture sub-parameters are
|                   required, the rest of the sub-parameters are optional. 
|                   If a sub-parameter is not used, its value defaults to
|                   zero.  The sub-parameters must appear in the text after 
|                   the keyword and before the first row of the waveform
|                   table.
|
|*                   V_fixture defines the voltage for typ, min and max
|*                   supply conditions.  However, when the fixture voltage 
|*                   is related to the power supply voltages, then the
|*                   sub-parameters V_fixture_min and V_fixture_max can 
|*                   be used to further specify the fixture voltage for 
|*                   min and max supply voltages.
|*
|------------------------------------------------------------------------------ 
[Rising Waveform]
R_fixture = 500
V_fixture = 5.0
|* V_fixture_min = 4.5           |Note, R_fixture is connected to Vcc
|* V_fixture_max = 5.5           |Specified, but not used in this example 
C_fixture = 50p
L_fixture = 2n
C_dut = 7p
R_dut = 1m
L_dut = 1n
|Time     V(typ)     V(min)     V(max)
 0.0ns     0.3        0.5         NA
 0.5ns     0.3        0.5         NA
 1.0ns     0.6        0.7         NA
 1.5ns     0.9        0.9         NA
 2.0ns     1.5        1.3         NA
 2.5ns     2.1        1.7         NA
 3.0ns     3.0        2.7         NA
 3.5ns     3.2        3.0         NA
|
[Falling Waveform]
R_fixture = 50
V_fixture = 0
|Time     V(typ)     V(min)     V(max)
 10.0ns     3.2        3.0         NA 
 10.5ns     3.0        2.7         NA 
 11.0ns     2.1        1.7         NA 
 11.5ns     1.5        1.3         NA 
 12.0ns     0.9        0.9         NA 
 12.5ns     0.6        0.7         NA 
 13.0ns     0.3        0.5         NA 
 13.5ns     0.3        0.5         NA
|
|=============================================================================

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ANALYSIS PATH/DATA THAT LED TO SPECIFICATION

John Brennan writes 7/29/94,
"I have a question on the V_fixture ibis sub-keyword for 
[Falling Waveform]. This variable appears to expect
1 value, ie, typically the nominal power supply value. 
Since I use the same deck to measure [Ramp] as [Falling
Waveform], my deck has the load resistor hooked to the power 
supply, which will be different for typ, min and max."

"Does this present a problem to the simulation vendor that 
V_fixture cannot handle a min and max value, or If I enter 
three values will they be handled correctly. Should I change
my deck so the the load resistor is hooked to the nominal supply 
value and not vary it for min and max?"

"How important is V_fixture? Also, are the values in the example 
in spec ver2.0 backwards? Wouldn't a [Falling Waveform] be 
pulling against a logic "1" voltage, and a [Rising waveform]
be pulling against a GND type voltage?"

Bob Ross responds 7/29/94,
"My initial response is that you uncovered a valid condition which we did not 
consider fully.  We should have allowed a V_fixture_min, and V_fixture_max 
for cases where the fixture is tied to Vcc or for cases where it represents 
the Thevenin voltage (and can change).  The same will apply for the [Model] 
subparameter Vref.  It may need a Vref_min and Vref_max also.  This should
be the subject for further consideration and probably a BIRD."

An alternative approach would be to redefine V_fixture and Vref similar to the 
C_comp subparameter on one line in the typ_min_max format.  This was not 
chosen because it could create an unnecessary enlargement of IBIS Version 2.1 
to be compatible with IBIS Version 2.0 and also because the additional 
sub-parameters introduced here may be used less frequently.

For completeness, V_fixture_typ and Vref_typ could also have been introduced. 
However, with the current definition, these are redundant.

******************************************************************************

ANY OTHER BACKGROUND INFORMATION

As additional information, a similar problem was encountered in specifying 
the input waveform amplitudes for the s2ibis program under min and max 
supply conditions.  This is particularly applicable for CMOS logic where
a typical voltage range is from 0V to 5V.  However, if the supply voltage is 
at min (say 4.5V), one would expect the Input voltage range to be from 0V
to 4.5V).  The default condition for s2ibis for IBIS Version 1.1 is to 
adjust the Input Voltage directly proportional to Vcc.  So for a typical 
TTL Input specification, the Input voltage specified from 0V to 3V is 
actually 0V to 3V for typ, 0V to 2.5V for min, and 0V to 3.5V for max for 
a +/- .5V Vcc change.  This default condition (which defines the SPICE 
PULSE command) can be overridden (along with the default Input ramp rise 
and fall times of .1ns) under each condition by optional specifications:

**Input_Ramp_min  <vil> <vih  <tr> <tf> 
**Input_ramp_typ  <vil> <vih> <tr> <tf> 
**Input_ramp_max  <vil> <vih> <tr> <tf>

So with these specifications, the Input ramp specification can be set to 
a fixed voltage range such as 0V to 3V for typ-min-max extractions.

******************************************************************************

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Subject: BIRD XXX V_fixture and Vref min/max
To: [email-masked], [email-masked],
        [email-masked]
From: [email-masked] ( Bob Ross)
Date: Mon, 8 Aug 94 20:35:14 PDT