Subject: Re: IBIS: Draft Press Release, Pls comment by 12/13/94

From: Will Hobbs <[email-masked]>
Date: Mon, 12 Dec 94 15:17:38 PST

Text item: Text_1

 IBISers,
 
 Will's comments preceded by *.
 
 Will Hobbs
 Intel Corp.
 
 IBISians,

 Below is my rough-cut draft of a 2.1 press release.  Please post 
 comments/suggestions to the reflector by 4:00 pm Tuesday 12/13/94.  I will 
 craft a revision and post it for email acceptance Wednesday.

 Derrick Duehren
 ------------------------------------------------------------------------------ 
 XTG TPV Programs Manager, Intel Corp. |
 Phone (503) 696-4299                  |  "Experience is not what happens to 
 Fax   (503) 696-4904                  |   you; it's what you do with what 
 [email-masked]      |   happens to you."
 5200 NE Elam Young Pkwy. JF1-97       |                     - Aldous Huxley 
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For more information contact:
IBIS Open Forum                                     For Immediate Release 
Will Hobbs, (503) 696-4369 * (number not to be published)
Jon Powell, (805) 988-8250

                           IBIS Press Release
                              DRAFT 12/5/94

Rev 2.1 of IBIS Signal Integrity Model Specification Announced
IBIS Standard that Supports Early, Accurate Models for Signal Integrity 
Simulations of High-speed Digital Systems Now Supports More Functions

HILLSBORO, Ore. _ December 9, 1994 _ A group of Electronic Design Automation 
(EDA) and semiconductor companies today announced the ratification and 
acceptance of Revison 2.1 of the I/O Buffer Information Specification (IBIS) 
standard for integrity models.  This improved and refined standard adds support 
for 

* ECL, dual-supply buffers, differential I/O, controlled rise-time buffers, 
much more complete package descriptions, better support for open-side devices 
(open drain, etc.), support for terminators, reference waveform.

IBIS is a consistent
* software parsable 
format that semiconductor vendors can use to specify the analog characteristics 
of input and output buffers.  This essential information is readily transformed 
into accurate models by end users and simulation tool vendors.  The resulting 
behavioral models enable users to perform high-speed, accurate signal-integrity 
simulations of their digital system interconnects.

The IBIS Version 2.1 specification was developed through the cooperative 
efforts of simulator vendors and semiconductor companies who together comprise 
the IBIS Open Forum (see the attached roster).

IBIS Models Available

Intel, _______, and _______ have posted public models to the vhdl.org database.
* Many others are available directly from EDA vendors and IC vendors.

Group Plans to Formalize Standard in Early 1995

The IBIS Open Forum believes the specification is sufficiently robust and 
comprehensive to be taken to the standards community for formal adoption.

For More Information

For more information about the IBIS Open Forum, send an e-mail request to 
[email-masked] or call Karen Kirkpatrick, Cadence Design Systems, (508) 
262-6448.  All of the documents and publicly available models are currently 
accessible via the public repository of VHDL International's Internet based 
machine (vhdl.org, 198.31.14.3).  FTP, Gopher, and public dial-in access 
methods are all supported.

IBIS Open Forum
Contact List (Roster)

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Subject: IBIS: Draft Press Release, Pls comment by 12/13/94
To: [email-masked]
From: Derrick Duehren <[email-masked]>
Date: Mon, 12 Dec 94 10:09:03 PST

---

From: Will Hobbs <[email-masked]>
Date: Tue, 13 Dec 94 08:42:08 PST

Text item: 

Mike,

Thanks for pointing out the parser omission.  I think it should be mentioned.  
Regarding EIA, until we actually begin the formal affiliation, I would vot not 
to mention it.  What if, for some reason, it doesn't pan out?

Regards,

Will Hobbs
Intel Corp.

Inhabitants of IBIS,

Here are my humble comments on the press-release. Comments are in parentheses.

Greetings for the appropriate religious/capitalist season.

Mike
> Will Hobbs, (503) 696-4369
              ^
	      signal
> for non-linear ramps, differential I/O, __________________,
                                          termination components,
> ___________________, and __________________________. 
ECL characteristics        improved package models
>
> IBIS is a consistent format that semiconductor vendors can use to specify the 
> analog characteristics of input and output buffers.  This essential 
information
> is readily transformed into accurate models by end users and simulation tool 
> vendors.  The resulting behavioral models enable users to perform high-speed, 
> accurate signal-integrity simulations of their digital system interconnects. 
>

(Do we want to mention the parser?)
> Intel, _______, and _______ have posted public models to the vhdl.org 
database.
         Intel        Intel
> comprehensive to be taken to the standards community for formal adoption.
 (I guess we don't want to say how or who at the moment?) 
 This is planned to take place in the first quarter of 1995.
> methods are all supported.
   (What no multimedia/WWW/Mosaic access ?)

--
+======================================================================+ 
| Mike Ventham - Vice President Engineering, Quantic Laboratories Inc, | 
| 12th Floor, 191 Lombard Ave, Winnipeg, Manitoba, Canada R3B 0X1      | 
| Tel: (204) 942 4000 Fax: (204) 957 1158 Email: [email-masked] | 
+======================================================================+

Cc: [email-masked]
Date: Mon, 12 Dec 94 13:52:33 CST
To: [email-masked] (Derrick Duehren)
Subject: Re: IBIS: Draft Press Release, Pls comment by 12/13/94
From: [email-masked] (Mike Ventham)

---

From: Lynn Warriner <[email-masked]>
Date: Wed, 14 Dec 94 08:42:41 -0600

A couple of points.  First I tried calling Karen Kirkpatrick at Cadence, she no
longer works there and the person that pick up her job has no idea what IBIS is.

I am back in the throws of providing support of IBIS models for IBM.  Hoa Quoc is
no long doing this task.  I am not sure what models we have placed on the servers,
how can I check?

Thanks,
Lynn Warriner
IBM @ the Somerset Design Center
512-795-7234

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From: [email-masked] (Mike Ventham)
Subject: Re: IBIS: Draft Press Release, Pls comment by 12/13/94
To: [email-masked] (Derrick Duehren)
Date: Mon, 12 Dec 94 13:52:33 CST
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at Dec 12, 94 10:09 am
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Inhabitants of IBIS,

Mike
              ^
	      signal
                                          termination components,
> analog characteristics of input and output buffers.  This essential information 

         Intel        Intel
> Contact List (Roster)

- -- 

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