Subject: Re: 3D, or I/V/T models

From: [email-masked]
Date: Fri, 07 Jan 94 13:49:18 -0500

Arpad,

  One thing about 3-D models that I still don't understand:

  When you run tests of the 3-D models in HSPICE, I presume that
you replace the actual gate (transistors, etc.) with something 
else.  What is that "something else"?

--Eric

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From: Arpad Muranyi <[email-masked]>
Date: Fri, 7 Jan 94 15:18:21 PST

Eric,

I could make a drawing, but it really is not much different from the present
IBIS model.  Here is what I did:

I modified the ramp generator so that it became a stopwatch.  (I mean, it gives
elapsed time from the "event" (= threshold crossing).  Then I added a multiplier
element which uses the current vs. time table to scale the output current
based on the time elapsed from the "event".  There you have a 3-D model.

If you need more info I would be glad to answer your questions.

Arpad

Arpad,

  It partially answers my question--I was wondering what the
"replacement" circuit looked like.  (How are the V,I,R,C elements
hooked up?)  Would there be diagrams for any of this in the materials
from the Summit Meeting?

 --Eric