Subject: NEW BIRD, #6

From: Will Hobbs <[email-masked]>
Date: Wed, 12 Jan 94 13:37:17 PST

Hello IBIS members:

How can we specify components with differential pins?
Some devices in the ECLinPS families such as the MC10E111, MC10E112, and 
MC10E116 have differential driver and receiver functionality.  Examples 
for differential bidirectional operation include components such as the
SN75117, SN75176A, and SN75LBC976 contained in the Data Transmission Circuits 
book from TI.

A proposal in BIRD format is put on the table for discussion and refinement.

Bob Ross, Interconnectix, Inc.

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                 Buffer Issue Resolution Document  (BIRD)

BIRD ID#:                6
ISSUE TITLE:             Differential Pin Specification 
REQUESTOR:               Bob Ross, Interconnectix, Inc. 
DATE SUBMITTED:          12 January 1994
DATE REVISED:
DATE ACCEPTED BY IBIS OPEN FORUM:     {will be filled in when accepted}

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STATEMENT OF THE ISSUE:

  Several components contain pins which operate in a differential mode with
respect to other pins.  Since this operation in inherent to a component, 
the IBIS document should be extended to specify this functionality.

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STATEMENT OF THE RESOLVED SPECIFICATIONS:

  An additional optional keyword, [Diff_Pin], is added to the specification.

|========================================================================== 
|    Keyword:  [Diff_Pin]
|   Required:  Optional
|Description:  Used to associate differential pins and their peak-to-peak 
|              differential voltages.
| Sub-Params:  inv_pin, vpp
|Usage Rules:  Entries follow these rules: Only differential pin pairs
|              are entered.  The [Diff_pin] column contains a non-inverting 
|              pin number and the inv_pin column always contains the
|              corresponding inverting pin number for output and I/O output. 
|              The vpp column contains the specified peak-to-peak voltage
|              between pins if the pins are an Input or I/O Model_type.
|              When the input pins follow the polarity convention according 
|              to the columns they are entered, the vpp value is positive. 
|              However, a negative vpp value means that the input pins do
|              not follow the polarity convention, such as when the I/O
|              input polarity is opposite that for output operation.  For 
|              output only differential pins, the vpp entry is 0V.
|Other Notes:  The output pin polarity specification in the table takes 
|              precedence over the [Model] Polarity specification such
|              that the pin in the [Diff_pin] column will be Non-Inverting 
|              and the pin in the inv_pin column will be Inverting.  One
|              [Model] is permitted for both pins. 
|
|              Column length limits are:
|                      [Diff_Pin]        5 characters max 
|                      inv_pin           5 characters max 
|                      vpp               9 characters max 
|
|              [Model] Vinl and Vinh specifications are permitted since
|              some components contain this information even for differential 
|              input pins.
|--------------------------------------------------------------------------- 
[Diff_Pin]     inv_pin     vpp
|
3              4           150mV     | Input or I/O pin pair 
8              9           0V        | Output pin pair
14             15          -500mV    | Input or I/O pin pair with input
                                     | polarity opposite of that shown

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ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:

  Since only a small percentage of components contain differential pins,
[Diff_Pin] is optional.  It is required only if the model itself must convey 
associations between pins for differential inputs and/or outputs.

It is possible to provide methods external to a model to associate component
pins by relating the attached networks.  This may be the best method when some 
output pins are complementary.

  However, IBIS should handle pins designed for differential operation which
contain specifications based on the associations between pins.  Such components
may contain a differential input sensitivity specification such as "Vpp" or 
"VT+" and "VT-" which define a peak to peak voltage between two input pins. 
Thus the vpp column is introduced.  Furthermore a few components contain I/O 
pins where the output differential polarity is opposite that of the input 
(e.g., SN75117). The vpp polarity is used for such a case, but extended for 
consistency to cover any input pin pair.

For timing purposes, an output is referenced to a zero volt cross-over value
between two output pins.  Setting the vpp entry to 0V is chosen to correspond 
to output differential voltage selections.

  The column lengths are consistent with the [Pin] keyword column lengths.

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ANY OTHER BACKGROUND INFORMATION:

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