Subject: BIRD18 Column Headers for IBIS Ver. 2.1

From: [email-masked] ( Bob Ross)
Date: Wed, 20 Jul 94 16:24:04 PDT

Hello IBIS members:

This BIRD extends the number of points from 100 to 101 per last IBIS Forum 
discussion.  Upon further reflection, the proposed number of points for the 
[Pullup] and [Pulldown] tables is increased to 151 since they are mandated 
to extend of larger voltage ranges.  The primary reason for these extensions 
is to allow automated IBIS file creation programs to sweep over the entire 
voltage data range of -5V to 10V at .1V increments, capture the endpoints 
and the 0V and 5V points.

Bob Ross, Interconnectix, Inc.

*****************************************************************************

*****************************************************************************
                 Buffer Issue Resolution Document  (BIRD)

BIRD ID#:                18
ISSUE TITLE:             Number of Points
REQUESTOR:               Scott Bloom, Interconnectix, Inc. 
DATE SUBMITTED:          20 July 1994
DATE REVISED:
DATE ACCEPTED BY IBIS OPEN FORUM:     Pending

******************************************************************************

******************************************************************************

STATEMENT OF THE ISSUE:

There is no statement in the [Diff Pin] specification which specifies the
order of the columns, in contrast to specifications for other keywords.

******************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

The first paragraph of Usage Rules is modified using language similar to that
in the [Pin Mapping] keyword to state that the column order is fixed.

|==============================================================================
|    Keyword:  [Diff Pin]
|   Required:  No
|Description:  Associates differential pins, their differential
|              threshold voltages, and differential timing delays.
| Sub-Params:  inv_pin, vdiff, tdelay_typ, tdelay_min, tdelay_max
|Usage Rules:  Enter only differential pin pairs.  The first column,
|              [Diff Pin], contains a non-inverting pin number.  The second
|              column, inv_pin, contains the corresponding inverting pin number
|              for I/O output.  Each pin number must match ont of the pin
|              numbers declared previously in the [Pin] section of the IBIS
|              file.  The third column, vdiff, contains the specified
|              output and differential threshold voltage between pins if
|              the pins are Input or I/O model types.  For output only
|              differential pins, the vdiff entry is 0V.  The forth, fifth,
|              and sixth columns, tdelay_typ, tdelay_min, and tdelay_max,
|              contain launch delays of the non-inverting pins relative to
|              the inverting pins.  The values can be either polarity.
|

******************************************************************************

ANALYSIS PATH/DATA THAT LED TO SPECIFICATION

For reference, the original Usage Rule text is presented here:

|Usage Rules:  Enter only differential pin pairs.  The [Diff Pin] column
|              contains a non-inverting pin number and the inv_pin column
|              always contains the corresponding inverting pin number for
|              I/O output.  The vdiff column contains the specified
|              output and differential threshold voltage between pins if
|              the pins are Input or I/O model types.  For output only
|              differential pins, the vdiff entry is 0V.  The tdelay columns
|              contain launch delays of the non-inverting pins relative to
|              the inverting pins.  The values can be either polarity.

The column headers for [Diff Pin] should be listed in the specified order.
We missed that point when writing the specification.  It should be clarified
in IBIS Version 2.1.  This restriction should simplify all parsers and
should not cause anyone any problems. 

IBIS Ver. 2.0 specifies that the column headers for [Pin Mapping] must appear
in the listed order.  The first three column headings of [Pin] must also
appear in the listed order, but the last three column headings for L_pin,
C_pin and R_pin can appear in any order as long as they are all listed.

The order of columns for all keywords which support typ-min-max columns is
fixed since no column headers are specified (the specification gives optional
comment line headings for clarity).

******************************************************************************

ANY OTHER BACKGROUND INFORMATION

******************************************************************************

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From: Arpad Muranyi <[email-masked]>
Date: Mon, 25 Jul 94 10:41:04 PST

So is BIRD 17 or 18 the same thing?

One more comment I forgot in my last EMAIL:

If anything, I would like to see both clamps have the same range, -Vcc to Vcc, 
or even -Vcc to (2 x Vcc).  Currently, the POWER clamp is only -Vcc to 0V, and 
the GND clamp is -Vcc to Vcc.

We all agreed on earlier open forums that the clamp curves can also be used for 
internal pullup or pulldown structures ("resistors") for devices that have it.  
These "resistors" are usually weak transistors which are always ON.  Since they 
are transistors, they have an I-V curve, not a straight resistive line.  The 
best place to put these in an IBIS model is the clamp curve.

Hovever, currently there is only one place to put such curves, the GND_clamp 
curve.  This creates a few problems when I have a pullup "resistor" (which I 
have to make VCC relative) and I have to put it into the GND_clamp curve.  If we
extend the Vcc_clamp range to the same coverage as the GND_clamp, I could put 
the pullup "resistors" into the POWER_clamp, and the pulldown "resistors" into 
the GND_clamp curve and my problems would be gone.

Arpad Muranyi
Intel Corporation

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From: [email-masked] ( Bob Ross)
Date: Mon, 25 Jul 94 13:52:07 PDT

Arpad

Here are my views on the questions you raise:

1) BIRD18 applies only to [Diff Pin] and is totally unrelated to BIRD17
While cutting and pasting, I accidentally tranmitted a BIRD18 which
had some BIRD17 verbage, and have subsequently retranmitted BIRD18.
If you need the correct copy, I can send it to you.

2) Regarding the range of any VI table in IBIS, I interpret the mandated
ranges as the Minimum ranges for IBIS compliant models.  I believe there
is nothing to prevent the [Power_clamp] table to be extended on either
end.  So IBIS does not prevent you from putting in a "weak", non-linear
always on pullup resistor using the [Power_clamp] keyword for any range
including to 0 or -Vcc.  The [Gnd_clamp] data from 0 to Vcc (and beyond) 
would be set to 0 since the clamping curve currents are added.  

3) For normal IBIS buffer applications, you would not need to extend
the clamp ranges beyond what is specified (beyond Vcc for [Gnd_clamp] and
below Vcc for [Power_clamp] because the clamping currents in these regions
are typically negligible.  So even if simulators do not do extroplation,
the error would be neglibible.  Your pullup resistor is an example where
you need to extend the IBIS range because the currents are not negligible,
and I believe IBIS already supports this application.

Bob Ross,
Interconnectix, Inc.

---

From: Arpad Muranyi <[email-masked]>
Date: Mon, 25 Jul 94 15:14:48 PST

Text item: 

Bob,

Thanks for your response.  I would appreciate if you could resend BIRD 18 for me
to make sure I got the right one.

Regarding point 2) below, I wish everyone agreed with what you say, but since I 
am not sure, I feel it should be brought up in the Open Forum meetings.  I am 
just afraid that if I put something in the POWER_clamp section into a range that
is not specified now, someone might ignore it because it is outside the 
specified region.

I agree with you on point 3) completely.

Arpad Muranyi
Intel Corporation

Arpad

Bob Ross,
Interconnectix, Inc.

> Intel Corporation

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Subject: Re: BIRD18 Column Headers for IBIS Ver. 2.1
To: [email-masked], [email-masked]
From: [email-masked] ( Bob Ross)
Date: Mon, 25 Jul 94 13:52:07 PDT