Subject: BIRD14 Comment

From: [email-masked] ( Bob Ross)
Date: Sat, 7 May 94 20:43:59 PDT

To John Keifer, Arpad Muranyi, and IBIS Committee:

There are two proposals in BIRD14.  The first concerns a new keyword [Specs]
to override parameters of a particular [Model].  There is merit in this
idea, but I am currently opposed to doing this now for some contradictory 
reasons - it overrides some parameters that I feel should not touched, and
it does not include some parameters which would really be useful for 
efficiency.  Furthermore, it provides an unneccessary level of indirection
which can add to confusion to IBIS at this time and perhaps create a real
problem for implementors using IBIS.  Before we introduce [Specs] we really
need a lot more consideration as to what is to be included (e.g, should
Model_type also be included as a practical override, is Cref needed in IBIS,
etc.).  Your point is well taken, however, that such a keyword can help
reduce much redundant [Model] data.

The second proposal is about adding two more Sub Parameters to [Model].  The
one parameter I really like is Vt for "test voltage".  This is different
than the V_fixture of BIRD12.1 and is more like the Output counterpart
of Vinh and Vinl.  I think it should be available as a timing sub-parameter,
particularly for 3-state and Output models where Vinh and Vinl may not
be available to help provide an estimate of Vt.  As you show in the example,
Vt will give the intended voltage on which timing at the output is based
such as 1.5V or 2.5V.  However, I think Cref should NOT be included because
it is really a timing specification test capacitance (the specification
resistance typically 500 Ohm would then also have to be included), and IBIS
at this time does not cover actual absolute internal delay characterization.
Other databases cover this area, and IBIS could incorrectly specify a 
load condition that is not used in the other databases. 

Bob Ross
Interconnectix, Inc.

---

From: Arpad Muranyi <[email-masked]>
Date: Wed, 11 May 94 17:32:01 PST

---------------------------- Forwarded with Changes ---------------------------
From: John M Keifer
Date: 5/11/94 4:22PM
To: Arpad Muranyi
Subject: Re[4]: BIRD14 Comment
-------------------------------------------------------------------------------
To Bob Ross, and The IBIS Committee:

In response to the BIRD14 Comment below, I don't understand why you have 
problems with overriding the IBIS [Model] sub-parameters.  The IBIS  
[Model]s are not supposed to be specs out of a data book; however, the 
entire .IBS file should follow what is found in data books.  The [Specs] 
section would not contradict this.  I expect this would only reduce the 
number of redundant [Model]s, as you noted.

My intention with the [Specs] section is not to provide an unnecessary 
level of indirection which could add to confusion to IBIS. Unfortunately 
I don't see any better way to eliminate the redundant [Model]s without 
adding this new section.  Although I do believe we should make IBIS 
simple and straightforward, that should not prevent us from making 
improvements.

I am open to adding sub-parameters to the [Specs] section that might be 
useful for efficiency.  Regarding the Model-types as sub-parameters, the 
Model-types I can see now that might overlap (i.e. have the same IV 
curves, C_comp, and ramp rates) would be Output, I/O, and 3-state 
buffers.  However, if an Output is specified without clamp sections as 
described in BIRD 15, (i.e. the clamps are included in the pullup and 
pulldown sections because they cannot be measured separately) then only 
the I/O and 3-state [Model]s would have the same data.  Still, I can see 
this as a potential gain in simplification, and if the IBIS Committee 
agrees to it, I would not be opposed.

A couple of people have already suggested adding Rref and Vref in order 
to cover open-drain [Model]s.  I would also not be opposed to this if 
the IBIS Committee agrees it is a good idea.

I am glad to hear that you agree with adding Vt.  It IS the Output 
counterpart of Vinl and Vinh; however, Cref is just as important.  Cref 
is not an actual absolute internal delay characterization.  Valid delays 
are specified into a Cref at a Vt, and therefore, the timing at an 
output is based on this same Cref at Vt.  Cref is not just a test 
capacitance.  It is a parameter that all simulators MUST use in order to 
determine timings.  Even though Cref is 0pF in many cases, it is still 
used.  It poses a serious handicap to those performing simulations to 
have to add in this parameter manually because it is not included
in the IBIS [Model].  What database contains the load condition?  Cref 
is obtained from a data book and therefore should not contradict any 
other database.

John Keifer
Intel Corporation

There are two proposals in BIRD14.  The first concerns a new keyword 
[Specs] 
to override parameters of a particular [Model].  There is merit in this 
idea, 
but I am currently opposed to doing this now for some contradictory 
reasons - 
it overrides some parameters that I feel should not touched, and it does 
not 
include some parameters which would really be useful for efficiency.  
Furthermore, it provides an unnecessary level of indirection which can 
add to 
confusion to IBIS at this time and perhaps create a real problem for 
implementors using IBIS.  Before we introduce [Specs] we really need a 
lot 
more consideration as to what is to be included (e.g., should Model_type 
also 
be included as a practical override, is Cref needed in IBIS, etc.).  
Your 
point is well taken, however, that such a keyword can help reduce much 
redundant [Model] data.

The second proposal is about adding two more Sub Parameters to [Model].  
The 
one parameter I really like is Vt for "test voltage".  This is different 
than the V_fixture of BIRD12.1 and is more like the Output counterpart 
of Vinh and Vinl.  I think it should be available as a timing 
sub-parameter, 
particularly for 3-state and Output models where Vinh and Vinl may not 
be available to help provide an estimate of Vt.  As you show in the 
example, 
Vt will give the intended voltage on which timing at the output is based 
such 
as 1.5V or 2.5V.  However, I think Cref should NOT be included because 
it is 
really a timing specification test capacitance (the specification 
resistance 
typically 500 Ohm would then also have to be included), and IBIS at this 
time 
does not cover actual absolute internal delay characterization. Other 
databases cover this area, and IBIS could incorrectly specify a
load condition that is not used in the other databases.

Bob Ross
Interconnectix, Inc.