Subject: Non monotonic curves

From: Arpad Muranyi <[email-masked]>
Date: Tue, 5 Apr 94 08:50:02 PST

Bob,

Thank you for the beautiful ASCII graphics, and the moral support...

I agree with most of what you say, with one little exception.  I feel that the 
VI characteristics below 0V are indeed important, for the very reason you also 
mention, strong reflections.  Your recommendation for fixing the non monotonic 
curves below -0.7 volt is a good start, but if you consider that the diode curve
is monotonic, and the sum of the diode with the transistor is also monotonic, 
than there is nothing to fix.  After all, we do not have to use the transistor 
curve by itself.

Arpad
Intel, Folsom

To IBIS Committee:

Here are some of my thoughts on the recently posted NON-MONOTONIC psc_a2.ibs
file related to last Friday's discussions.

(1)  I am comfortable with the new Intel models as they are provided.  While
I could fall in the camp that would prefer to see monotonic data for product
reasons, efficiency, and so forth, I support Maah Sango's position that
the IBIS data should represent the actual data that is produced or
measured using the accepted processes as long at that data represents
real or simulated performance.  I accept Arpad Muranyi's rational of why
the artifacts occur, although I confess that some of the details may have
gone over my head.  It does give me insite in some of the unexpected
behavior I have observed.  Furthermore, as long as the data is consistent
within the framework of the IBIS context model such as the one below, then
it is good data.

Some simulator companies may have variations to the IBIS context model
for internal processing, so it is the simulator companies responsibility
to make any appropriate changes to the IBIS data for consistency.  In
fact, I think MOST company's should produce as part of any direct IBIS
interface or translator the appropriate FILTER routines for their products.
Only a few products will be architected to accept ALL IBIS data DIRECTLY
into tables or tablular functions.

        |<-----------------OUTPUT and I/O Models---------------------->|
                                                                       |
                                |<-------------INPUT Model------------>|

                                 VOLTAGE RANGE
                   o-------------------o
                   |                   |
              |----o----|              |
              |         |              |
           |--o--|   |--o--|        |--o--| POWER_CLAMP
           |     |   |     |        |     |
         |-|RAMP |---| VI  |--|     | VI  |         PACKAGE Keyword
         | |     |   |     |  |     |     |            Parameters
         | |-----|   |-----|  |     |--o--|     |<------------------->|
         | dV/dt_r   PULLUP   |        |
         |                    |        |                               PIN
         |                    |--o-----o----------/\/\/\--UUUUUU---o--o
         |                    |  |     |          R_PKG   L_PKG    |
         | dV/dt_f   PULLDOWN |  |     |                           |
         | |-----|   |-----|  |  |  |--o--| GND_CLAMP              |
         | |     |   |     |  |  |  |     |                        |
         |-|RAMP |---| VI  |--|  |  | VI  |                        |
           |     |   |     |     |  |     |                        |
           |--o--|   |--o--|     |  |--o--|                        |
              |         |        |     |                           |
              |----o----|       ---    |                          ---
                   |            ---    |                          ---
                   |     C_COMP  |     |                    C_PKG  |
                   |             |     |                           |
                   o-------------o-----o---------------------------o
                                      GND

(2)  Both the [Pullup] and [Pulldown] tables contain similar types of
behavior for the I/O devices, so for the purpose of discussion, I will be
considering only the [Pulldown] table.

              I(typ) ^
                     |                   ____________-----------
                     |          ____------            [Pulldown]
                     |       _--
                     |      /
                     |     /
                     |    /
                     |   /
                     |  /
                     | /
                     |/
 --------------------|--------------------------------------------> Vtable
               \  * /|
                \ */ |
                 \/  |
                 *
                 *
                 *
                * [GND_clamp]
                *
                *

At about -0.7V and less, the negative side of the [Pulldown] table kicks
back toward 0mA.  The combination of the [GND_clamp], and [Pulldown]
table still retain monotonic behavior.  Although the magnitude of the
[GND_clamp] may be less than the magnitude of the [Pulldown] current at
-0.7V, its rate of change is such that [GND_clamp] becomes by far the
dominant current contributor below -0.7V.

(3)  When the [Model] is operating in the "Output" mode transmitting the
ramp, the VI characteristics below 0V are of no concern.  Any strong,
negative reflected voltage which appears at the PIN will then see the
combination of both the [Pulldown] table and [GND_clamp] table curves
(non-linear impedances) when the [Model] is in the LOW state.  In my
opinion, the dominating characteristics for signal integrity analysis
are contained in the voltage regions around 0V from say -1V to +2V.  I
believe that the accuracy of any analysis remains the same if the
[Pulldown] curve is FILTERED to the following curve:

              I(typ) ^
                     |                   ____________-----------
                     |          ____------            [Pulldown]
                     |       _--
                     |      /
                     |     /
                     |    /
                     |   /
                     |  /
                     | /
                     |/
 --------------------|--------------------------------------------> Vtable
                    /|
                   / |
       ___________/  |

            <--------|-------->
                (b)      (a)

Furthermore, the FILTERING algorithm should be of the form that it starts
at 0V and (a) filters in the positive direction for monotonicity (there may
be non-monotonic behavior there as well from some slight fold-back
effects because of combinations of internal tolerances), and (b) in the
negative direction to remove the "kickback" such as tabulated in the Intel
component [Model]s.

(4)  FILTERING can serve another purpose, that of data reduction.  With
a good approximation processes, the amount of data in ibis files can be
reduced signifantly.  Interpolation is assumed to be available to
process the data.  A number of algorithms can be applied to select of fit
points based on an error criteria or on spacing of voltage points, and
-chances
are that the errors introduced in the signal integrity analysis will be
negligible and far less compared to errors produced by other possible
variations.  In case (b) only one data value at -5V might be used and the
data between -5V and -0.7V removed.  For some systems, reduction of data
saves memory and possibly improves performance.

Data reduction prior to posting files would also be appropriate.  (Of course,
companies which are in the business of selling memory chips may not be too
concerned about data reduction.)

Again I feel that the supplied data is good and is representative of type
of data one can expect.  For most vendors, it is probably dangerous to
expect to use IBIS_CHK compliant data as supplied without further FILTERING
or processing to take into account the specific operation of the simulator
itself.  Thank you Arpad and the Intel team for pointing out the some
unexpected data characteristics so that we can respond.

Bob Ross,
Interconnectix, Inc.