Subject: IV data extrapolation

From: [email-masked] (Geetha R)
Date: Wed, 15 Nov 95 09:34:59+050

All,

 I need some clarifications on the following questions

 1.When simulating the IV data for the Pull-up and Pull-down devices 
   from -VCC to 2*VCC why is that extrapolation is done from
   -VCC to 0 for the  Pull-up data when actually the dc source at
   the output pin is varied from -VCC to 2*VCC and similarly for
   the Pull-down devices the extapolation is done from VCC to 2*VCC.
   Is the data we obtain through simulation in these ranges not
   accurate?

 2.Can anyone tell me how this behavioral model for the buffers was
   actually arrived at?Can you please explain each block in detail?
   Does it in anyway represent an inverter circuit? 

  Cheers and Best Regards,                                                     

    Geetha Rangarajan

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From: [email-masked] ( Bob Ross)
Date: Wed, 15 Nov 95 10:27 PST

Geetha:

The context of your questions appears to be with respect to the s2ibis
simulation and extraction algorithms.  

For reference, I am copying the algorithm description for s2ibis 
version 1.2 that is described in the FAQ section under man/man1 in
Question (6):

********************************************************************************
                     s2ibis Frequently Asked Questions 
********************************************************************************

QUESTION (6): "How does s2ibis generate tables?"

ANSWER: 
      s2ibis uses the following scheme for determining what tables need to be 
generated for a particular pin:

      0) For POWER, GND, and NC pins, no tables are
         generated.

      1) For each Input pin, s2ibis automatically
         runs SPICE jobs for [GND_clamp] and [POWER_clamp] 
         tables.  If the typ column in either of the
         resulting tables exceeds the clamp tolerance
         limit (default 1 microamp, changeable by user),
         that table is printed.  

      2) For each  Output (*Not* I/O, 3-state, or 
         Open_drain) pin, s2ibis generates [Pulldown]
         and [Pullup] tables only.  Clamp simulations
         are not even attempted for Output pins.
         [Ramp] tables are generated by causing the
         output to transition while attached to the
         IBIS-specified load, reading the 20% and 80%
         points of the transition, and calculating
         the slope in between these points.

      3) For each I/O or 3-state pin, s2ibis generates
         SPICE simulations for [Pulldown], [Pullup],
         [GND_clamp], [Power_clamp], and [Ramp] tables.
         Generation of the [Ramp] tables uses exactly
         the same procedure as described above under
         Ouput pins. Generation of the  [Pulldown], 
         [Pullup], [GND_clamp], and [Power_clamp] tables
         involves a current partitioning scheme.  

         First s2ibis runs the [GND_clamp] and
         [Pulldown] simulations.  The [Pulldown] table
         is generated as follows:
 
         pulldown(-5->0):subtract the associated
         ground clamp table from the pulldown table

         pulldown(0->Vcc):just use the pull-
         down table as simulated

         pulldown(Vcc->2*Vcc):extrapolate using
         the point at Vcc and the point five points
         before Vcc in the pulldown table.

         The [GND_clamp] table is not modified.

         The [Pullup] and [POWER_clamp] tables are
         created using an analogous procedure.

         Then s2ibis runs the [POWER_clamp] and
         [Pullup] simulations.  The [Pullup] table
         is generated as follows:
 
         pullup(-5->0):subtract the associated
         power clamp table from the pullup table

         pullup(0->Vcc):just use the pull-
         up table as simulated

         pullup(Vcc->2*Vcc):extrapolate using           
         the point at Vcc and the point five points 
         before Vcc in the pulldown table. 

         The [POWER_clamp] table is not modified.

(1)  Your first question is about the choice to use an extrapolation
of data for the PULLDOWN table in the region between Vcc and 2Vcc.  The
alternative algorithm is to just subtract the POWER CLAMP table from
a simulation of the pulldown characteristics in the region from Vcc to 2Vcc
(which would include the power clamp).  The problem with that approach
is that if a power clamp exists, it may have very large currents as it
approaches 2Vcc.  So the actual subtraction of the two curves with 
numerically large values would tend to produce a curve that folds back
to 0ma around 2Vcc for many cases do to the numerical instability of this
approach.  So the extrapolation technique was selected as the better
alternative, expecially since this particular region is very unlikely to
be encountered in actual IBIS model simulation.  So the extrapolation
choice avoids an almost guarenteed area on non-monotonicity which could
be upsetting to some simulators.

The same argument applies to the PULLUP table in the region from -Vcc to 0
(absolute voltages).

The foldback characteristics do exist in some extractions of the PULLDOWN
table in the region from -Vcc to 0 due to the same numerical problems, but
the choice was made to retain the subtraction algorithm because of some
more complicated behavior especially for Bipolar TTL devices.  The
PULLUP table in the Vcc to 2Vcc region is also constructed using the
subtraction algorithm.

(2) I am not sure how to address this question other than to reference
you to the description given in the Overview document which can be 
obtained via FTP from /pub/ibis/documents on vhdl.org.  Also the March 16,
1995 EDN article on IBIS which give some very good descriptions and
basis of the behavioral model.  It is intended to mimic the performance
of typical CMOS and TTL models.  The model and be for a Non-Inverting or
Inverting device, as described by the Polarity sub-parameter.

Bob Ross,
Interconnectix, Inc.

> Date: Wed, 15 Nov 95 09:34:59+050
> From: [email-masked] (Geetha R)
> To: [email-masked]
> Cc: Alan                <[email-masked]>
> Subject: IV data extrapolation