Subject: [uunet!icx.com!bob: Re: IBIS EGG9 - Stored Charge]

From: [email-masked] (Jon Powell)
Date: Mon, 11 Dec 95 14:32:33 PST

bob asked me to forward this to the repeater

Return-Path: <uunet!icx.com!bob>
Date: Mon, 11 Dec 95 12:56 PST
From: uunet!icx.com!bob ( Bob Ross)
To: uunet!uunet!qdt.com!jonp
Subject: Re: IBIS EGG9 - Stored Charge

Jon:

Since the IBIS table for a diode will contain Rs, we then need to be concerned
about how large the Rs is before the differences become significant.  I have
assumed that Rs itself has a negligible effect for the region of operation.
However, the topology of the IBIS model is not exactly that of a Spice model,
so I would expect some difference.  Can you characterize how large the
difference is or what the different effects are?

Also, my intent was to create a current dependent capacitance model where
the current is better defined than the voltage.

Bob Ross
Interconnectix, Inc.

> Bob,

> If you are suggesting that the Rs be a part of the IV table itself and just
> restrict the current, I believe that this will not work. The Voltage that contrains
> the current is actually across the (what is now) voltage controled capacitor and
> and Rs is external to this effect. I have done tests with behavior models both ways
> and believe I can show the difference.

> jon powell
> quad design