Subject: IBIS Press Release, tweaked again!

From: Derrick Duehren <[email-masked]>
Date: Mon, 9 Jan 95 14:25:28 PST

Text item: Text_1

 Attached is the full, revised press release with the "signal" integrity model, 
  backward compatibility, and dateline fixes is attached.  It is plain ASCII, 
 but our mail system may uuencode it anyway.  The text w/o roster is below.
 - Derrick
 
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For more information contact:                           For Immediate Release 
IBIS Open Forum
Will Hobbs, (503) 696-4369 (number not to be published)
Jon Powell, (805) 988-8250
 
                            IBIS Press Release
                          
Rev 2.1 of IBIS Signal Integrity Model Specification Announced IBIS Standard 
that Supports Early, Accurate Models for Signal Integrity Simulations of 
High-speed Digital Systems Now Supports More Functions

HILLSBORO, Ore.  _ January 9, 1995 _ A group of Electronic Design Automation 
(EDA) and semiconductor companies today announced the ratification and 
acceptance of Revision 2.1 of the I/O Buffer Information Specification (IBIS) 
standard for signal integrity models.  This release is a fully backward 
compatible upgrade to the rev 1.1 specification released last year (Press 
Release dated Oct. 12, 1993).  This improved and refined standard adds support 
for ECL, dual-supply buffers, ground bounce due to shared power rails, 
differential I/O, termination components, controlled rise-time buffers, much 
more complete package descriptions, improved open-side device modeling (open 
drain, etc.) and reference waveforms.  These enhancements are a result of more 
EDA companies supporting the IBIS specification and feedback of those using 
rev 1.1 models.
 
The IBIS Open Forum has created a version 2.1 of the "golden parser" that checks
model syntax for comformance to the specification.  It is currently being Beta 
tested.  When completed, the parser will be made freely available in object code
format
 
IBIS is a consistent software parsable format that semiconductor vendors can 
use to specify the analog characteristics of input and output buffers.  This 
essential information is readily transformed into accurate models by end users 
and simulation tool vendors.  The resulting behavioral models enable users to 
perform high-speed, accurate signal-integrity simulations of their digital 
system interconnects.
 
The IBIS Version 2.1 specification was developed through the cooperative efforts
of simulator vendors and semiconductor companies who together comprise the IBIS 
Open Forum (see the attached roster).
 
For More Information
 
For more information about the IBIS Open Forum, send an e-mail request to 
[email-masked].  All of the documents and publicly available models are 
currently accessible via the public repository of VHDL International's 
Internet based machine (vhdl.org, 198.31.14.3, http://vhdl.org/).  WWW, 
Gopher, FTP and Telnet "Anonymous", and "guest" dial-in access, (415) 
335-0110, are all available.

IBIS Open Forum
Contact List (roster below)