Subject: IBIS Minutes 3/28/97

From: [email-masked] ( Bob Ross)
Date: Tue, 1 Apr 97 10:58 PST

DATE: April 1, 1997

 SUBJECT: 3/28/97 EIA IBIS Open Forum Minutes
  
 VOTING MEMBERS AND 1997 PARTICIPANTS LIST:
 AMP                            Jeff Walden
 Applied Simulation Technology  Dileep Divekar*, Norio Matsui
 Cadence Design                 C. Kumar, Don Telian
 Cypress                        Bruce Wenniger
 Digital Equipment Corp.        Jeff Chu*
 Hewlett Packard, EEsof         Karl Kachigan, Henry Wu
 HyperLynx                      Kellee Crisafulli
 INCASES                        Olaf Rethmeier
 Intel Corporation              Stephen Peters*, Arpad Muranyi*
 Interconnectix                 Bob Ross*
 Mitsubushi                     Tam Cao
 Motorola                       Ahmed Omer
 National Semiconductor         Syed Huq*, Cheng-Yang Kao, Mike Bristol,
				Peter Laflamme, Kevin Smith, 
 NCR                            Dave Moxley*, Richard Mellitz
 NEC                            (Hiroshi Matsumoto)
 Quad Design/Viewlogic          Jon Powell*, Chris Rokusek
 Quantic Laboratories           (Mike Ventham)
 Texas Instruments              Thomas Fisher
 Thomson-CSF/SCTF               (Jean LeBrun)
 UniCAD Canada Ltd.             (Celso Faia)
 Veribest                       Ian Dodd*, William Bell*
 VLSI Technology                Harish Patel, D.C. Sessions,
 Zuken-Redac                    (John Berrie)
 
 OTHER PARTICIPANTS IN 1997:
 3M                             Fran Hart
 Actel                          Scott Schlachter
 Acuson & Free Model Foundation Richard Munden
 Alcatel                        John Fitzpatrick
 Ansoft                         Eric Bogatin
 Apteq Design Systems           Dan FitzPatrick 
 Compaq                         Weston Beal
 EIA                            Patti Rusher*
 EMC                            Fabrizio Zanella
 Micron Technology              Brian Johnson                      
 Molex                          Gus Panella
 North Carolina State U.        (Michael Steer)
 S3, Inc.                       Porsh Shih, Sarathy Sribhashyam
 Ultratest International        Charles Im
 Zeelan Technology              George Opsahl 

 In the list above, attendees at the meeting are indicated by *.  Principal
 members or other active members who have not attended are in parentheses.
 Participants who no longer are in the organization are in square brackets.

 Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are as
 follows:
     
      Date       Bridge Number    Reservation #    Passcode  
      4/18/97    (916) 356-9200   1-137660         6974289
      5/9/97     (916) 356-9200   1-137661         81111263
      5/30/97    (916) 356-9200   1-137662         1259125

 All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas out 
 7 days before each open forum and meeting minutes out within 7 days after.  
 When you call into the meeting, ask for the IBIS Open Forum hosted by Will 
 Hobbs and give the reservation number and passcode.
 
 NOTE: "AR" = Action Required.
 
 -------------------------------- MINUTES -------------------------------------

 INTRODUCTIONS AND MEETING QUORUM
 No new members.

 MEMBERSHIP UPDATE AND TREASURER'S REPORT
 Patti Rusher reported $10,129 in the EIA/IBIS account.  Patti will work with
 Bob Ross concerning those members still owing payment.

 REVIEW OF MINUTES AND AR'S
 Bob Ross corrected Mike Bristol's name (from Brisbol) from National Semi-
 conductor in all of the 1997 minutes.

 MISCELLANY/ANNOUNCEMENTS
 Patti Rusher reported much discussion at the PCB West Design Conference EDA
 Face-to-Face Roundtable session concerning IBIS models and the need for more
 models.

 PRESS AND WEB PAGE UPDATES
 Bob Ross reported that IBIS was mentioned in "Digital-System Designers
 Meet EMI Challenges", Computer Design, March 1997, pp. 53-56.
 
 Bob also reported an article in EDN, March 14, 1997 by Tim Minnick and
 Hank Herrmann of AMP titled "Using Multiline Models in Dual- and Single-
 Point Grounding Configurations", pp. 93-100.

 NEW MODELS AVAILABLE, LIBRARY UPDATE
 Jon Powell updated the EIA/IBIS Model page with a new Quality Semiconductor
 link and new links to Texas Instruments and Cypress Semiconductor, both with
 many new models.  Jon cautioned that the TI models have incomplete pinouts.
 Bob Ross reported that this is expected to be fixed.  The new links for TI,
 Cypress, and Quality are:

   http://www.ti.com/sc/docs/asl/models/ibis.htm

   http://www.cypress.com/cypress/tech_sup/web_tech/ibis_top.html

   http://www.qualitysemi.com/main/device.html

 Syed Huq reports that National Semiconductor has released two Interface
 two IBIS models: 261v31tm.ibs (3.3V RS-422 Quad Differential Driver) and
 261v32tm.ibs (3.3V RS-422 Quad Differential Receiver).  These are available
 on the National model site.

 OPENS FOR NEW ISSUES
 None.

 DESIGN AUTOMATION CONFERENCE 1997 IBIS MEETING PLANNING
 Patti Rusher is scheduling a meeting room for the EIA/IBIS Summit meeting on
 Thursday, June 12, 1997.  Jon Powell reported delivering the IBIS poster
 information.  Patti stated that Jon was the only one who followed the 
 instructions.

 INTERNATIONAL PROGRESS
 Patti Rusher stated that IBIS Version 2.1 ratification paperwork is going
 forward.

 EIA JAPAN I/O INTERFACE MODEL PROPOSAL
 Bob Ross gave a report on the joint EIA/IBIS and EIAJ working group meeting
 held Wednesday, March 19, 1997 in Santa Clara during the PCB West Design
 Conference.  The purpose was for Electronic Industries Association of Japan
 (EIAJ) Project Group Chair Hideki Fukuda from Hitachi to present "Standard
 for I/O Interface Model", Draft Version 0.0.

 Bob reported that he also met privately Monday and Tuesday and supplied much 
 IBIS information.  The Wednesday meeting was attended by:
 
   Hideki Fukuda, Hitachi
   Bob Ross, Interconnectix
   Syed Huq, National Semiconductor
   Patti Rusher, EIA
   Dileep Divekar, Applied Simulation Technology (USA)
   Norio Matsui, Applied Simulation Technology
   C. Kumar, Cadence
   Deepak Mehta, Cadence
   Shinichi Maeda, KAW/USA
   Ian Dodd, Veribest
   David Wiens, Veribest
   Mike Venthan, Quantic Laboratories

   (Also briefly, Hilary Kahn, University of Manchester)

 Fukuda-san stated the purpose of the proposal was to provide a more detailed
 format for better accuracy and to leverage off the possibility of a unified
 Spice-compatible format so that IC suppliers would need to provide only one
 model.

 The proposal covered IC details with buffers and interconnections, package
 details, and module details.  The buffers consisted of behavioral tables of
 one, two, or three dimensions.  All interconnections were based on nodal
 descriptions with Spice-like formats.  Model levels for Signal Integrity, 
 Power Integrity, and EMI were proposed (no work has been done yet concerning
 shape definitions needed for EMI package and device descriptions).
 
 The proposal was positioned to do detailed analysis for validation beyond the
 initial design using IBIS models.  At the meeting, it was suggested that the
 detailed models could also be used beforehand to validate the component
 operation and assumptions.  The proposal showed that IBIS models could be 
 created using the data in the I/O Interface Model.

 Fukuda-san had meetings with Avant! (Meta-Software) and Epic, and he reported
 encouragement privately to Bob.

 Stephen Peters asked about the schedule, and Bob Reported that Fukuda-san
 personally would like to see:

   Version 1.0           June 1997
   Version 2.0           September 1997
   Ratification by EIAJ  December 1997 

 The action items were for EIA/IBIS to review again the nodal description (an
 agenda item below) and for the EIAJ Project Group to find out what IC vendors
 are committed to supplying models of the I/O Interface Model format.

 Patti Rusher suggested that EIAJ get in touch with Britt Brooks of the EIA
 Compact Model Council because they are also investigating behavioral models.
 Bob will follow up on this with Patti.  Jon Powell asked if the model has been
 prototyped and tested.  Bob reported no.  Stephen was interested in more 
 details concerning Avant!'s support.  

 Ian Dodd introduced William Bell to discuss tabular data models for MOS devices
 in Spice.  Bill stated that a VeriBest's internal version of Spice handles
 tabular data models well.  The standard versions including BSIM levels 1, 2,
 and 3 from Berkeley are equation based.  Level 3 is the simplest with about
 20 parameters.  It could be an accepted basis for a non-proprietary model that
 Jon felt that equation based models were best for interpreting the parasitics.
 He felt the tables were difficult to scale (even though scaling information
 was provided.)  He was also concerned with what the models omitted and with
 how available the models would be.  So a non-proprietary format such as BSIM 3
 could be advantageous.  Jon stated that there may be nothing gained by
 reinventing Spice.

 Ian stated that most transmission line simulators support IBIS.  The standard
 Spice model syntax is supported in some simulators.

 Syed Huq pointed out that I/O Interface Model format was intended to handle
 problems (power integrity and EMI) that cannot be handled well using IBIS
 formatted models.

 AR - Patti Rusher forward information to contact Britt Brooks to Bob Ross
      and also forward the next meeting agenda [Done].

 IBIS COOKBOOK PROGRESS
 Stephen Peters reported no further progress on an Intel internal version.  He 
 still is waiting for some waveform data.  Bob Ross felt it might be useful to
 have some information on how to qualify good models since some public IBIS
 models need more work.  Someone asked if it the cookbook should support Version
 3.0 of IBIS, but Bob felt that limiting it to Version 2.1 was OK at this time
 to deal with some current interpretation issues.  Syed Huq asked if the cook-
 book would be out by DAC97.  Stephen said he would try to get it out by that
 time.

 ACCOUNTS ON EIA FOR SOURCE CODE DISTRIBUTION
 Bob Ross raised a question originally asked by Chris Rokusek whether an
 account could be set up on EIA for the member companies so that source
 code for parsers (such as ibischk2+) could more easily be distributed.
 Syed Huq commented on the logistics inconvenience of managing more accounts.
 After some discussion it was felt that e-mail distribution was preferred.

 FAQ UPDATE
 Syed Huq reported that some information needs to be updated in the FAQ section
 of the IBIS Home page.  He will make some obvious corrections.  He also
 requested people to look at the FAQs and propose changes and new questions.

 AR - Everyone review the FAQ's and provide suggestions to Syed Huq.

 S2IBIS2 ISSUES AND NT
 There have been reflector discussions regarding s2ibis2 aborting on certain
 example IV data spice deck runs using HSPICE.  This problem was also appearing
 in the NT version being worked on by Veribest.  Bob Ross felt this problem
 could be associated with the current version of HSPICE (h96) and heard that
 a small resistance in series with some nodes may fix the problem.

 PACKAGE COMMITTEE REPORT
 Stephen Peters reported that the committee discussed the EIAJ proposal.  He
 also stated that committee activities were on hold waiting Jon Powell's 
 connector model information.  Jon had finally received all of the connector
 Spice model and matrix information, but his window-of-available-time to work
 on this had passed.  He will pass along the information and his initial
 proposal to Stephen with the expectation that the connector model issue will
 be moved back to the IBIS Open Forum.

 BIRD36.2 ELECTRICAL DESCRIPTIONS OF BOARDS
 Stephen Peters has just updated BIRD36.2 and will issue BIRD36.3 with some
 editorial corrections (lower case for model files), Power and Gnd word
 case insensitivity clarifications, and Series element constraint that it be
 in the same net.  He also stated that the L and R elements themselves can be
 used for series elements.  

 Stephen mentioned that the electrical board description will not handle
 typ, min, and max cases per a comment by Dave Fogel.  Separate board files
 would have to be created to analyze these corners.

 Dileep Divekar raised the issue concerning whether cross-talk analysis was
 necessary.  Stephen responded that the full EDIF 4 0 0 would handle this.
 The electrical board description does not handle this.  Responses on the
 reflector indicated that people really needed the electrical board description,
 even with out coupling information, since the alternative is to use lumped
 package models in IBIS to specify SIMMs and boards.

 The BIRD36.3 vote was deferred until the next meeting so that the changes can
 be reviewed.

 NODAL DESCRIPTION DISCUSSION
 Bob Ross introduced the Nodal description discussion as a follow-on to the
 EIAJ I/O Interface Model proposal discussion.  

 Stephen Peters thought it would be appropriate for complex packages with mesh
 power and ground planes.  An alternative is to use the mechanical data bases
 for analysis.  Detailed transistor level IC's with Spice-like nodal based
 interconnections are quite useful to handle the ground and power noise
 interactions.  Stephen questioned what problems are EIAJ trying to solve.

 Jon Powell stated that just defining new formats may not contribute to the
 problems we are currently solving.  One suggestion was to have a standardized
 Spice interface regarding Spice formats (such as input, output, enable, and
 four power rails).  Jon raised the issue concerning many nodes and their
 interactions if one "Vcc" supply is used for all buffers.  He envisioned
 an extension to IBIS with a behavioral wrapper for Spice models.  Jon felt
 that the Spice algorithms themselves were not mathematically stable, whereas
 the behavioral ones were guaranteed to be stable.  Some vendors have Spice
 hooks within their products to do Spice simulation already.

 Bob mentioned that he will provide comments on syntax and on the node
 mapping structure (which seems to bypass the already existing subcircuit
 calling conventions.

 Jon wanted more detail concerning what algorithms are used to determine
 the time transition characteristics.  He felt that the capacitance and other
 parasitics were important factors.  Bob mentioned that simulators drive
 the transitions, whereas it appears that the stimuli are embedded in the
 I/O Interface Model.  (However, they could be controlled externally in some
 manner.)

 Bob plans to communicate support of EIAJ continuing their approach since it
 can lead to future extensions of IBIS and also provide some solutions to
 problems which cannot be handled well using the current format.

 BIRD41.1 - MODELING SERIES SWITCHABLE DEVICES
 Bob Ross reported no progress on BIRD41.1 since he has not contacted John
 Fitzpatrick, the author.  Arpad Muranyi questioned whether there were responses
 to Bob's comment concerning defining logical states in the IBIS format.  Bob 
 reported no comments.  Bob will contact John to move forward on BIRD41.1.

 MODELING EARLY CLAMPS IN IBIS 
 Arpad Muranyi reported no further work.  Bob Ross indicated that he would like
 to have all of the BIRDs for Version 3.0 approved by the DAC meeting in June.
 We have only 3 meetings to go.  Bob may assist on this proposal.

 NEXT MEETING:
 The next meeting is on Friday, April 18, 1997, 8:00 A.M. to 9:55 A.M.  
 BIRD36.3 is scheduled for a vote.
 ==============================================================================
				       NOTES
 
 IBIS CHAIR: Bob Ross (503) 603-2523, Fax (503) 639-3469
	     [email-masked]
	     Modeling Engineer, Interconnectix
	     10220 SW Nimbus Ave, K4, Portland, OR 97223

 VICE CHAIR: Syed Huq (408) 721-4874, Fax: (408) 721-4785
	     [email-masked]
	     Staff Applications Engineer, National Semiconductor, M/S A-2595
	     2900 Semiconductor Drive, Santa Clara, CA 95052
 
 LIBRARIAN:  Jon Powell (805) 988-8250, Fax: (805) 988-8259
	     [email-masked]
	     Transmission-Line Products Manager, Quad Design/Viewlogic
	     1385 Del Norte Rd., Camarillo, CA 93010
 
 SECRETARY:  Vacant

 This meeting was conducted in accordance with the EIA Legal Guides and EIA
 Manual of Organization and Procedure.
 
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       or both.  State your request.

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       used mostly for IBIS clarification, current modeling issues, and
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   [email-masked]
       To report ibischk2 parser bugs.  The Bug Report Form Resides on
       vhdl.org in /pub/ibis/bugs/bugform.txt along with reported bugs.

 Information on IBIS technical contents, IBIS participants, and actual
 IBIS models are available on the IBIS Home page found by selecting the
 Electronic Information Group under:

   http://www.eia.org

 Check the pub/ibis directory on vhdl.org for more information on previous 
 discussions and results.  You can get on via ftp anonymous, or send an e-mail
 request to the automatic archive server, [email-masked].
 
 "IBIS Spoken Here" placards are available from Jon Powell ([email-masked]) for 
 use at trade shows.
 ==============================================================================