Subject: IBIS Open Forum Minutes 18 Sep 1998

From: Matthew Flora <[email-masked]>
Date: Thu, 24 Sep 1998 09:57:08 +0000

DATE: 9/24/98

SUBJECT: 9/18/98 EIA IBIS Open Forum Minutes
   
VOTING MEMBERS AND 1998 PARTICIPANTS LIST:
AMP                            (Martin Freedman) 
Applied Simulation Technology  Norio Matsui, Raj Raghuram*
Cadence Design (& UniCAD)      C. Kumar, Don Telian, Patrick Riffault, 
                               Craig Lewis, Greg Fitzgerald, Paul Galloway,
                               Patrick Dos Santos, Catherine Weiss, 
                               Alain Tribaudot, Geoffrey Ellis*,
                               Todd Westerhoff
Compaq                         Shariq Rahma, Jeff Chu, [Greg Edlund],
  (Digital Equipment Corp.)    Bob Haller*
Cypress                        Bruce Wenniger
Hewlett Packard (EEsof, etc.)  Karl Kachigan, Henry Wu, Paul Gregory
High Design Technology         Razvan Ene
HyperLynx                      Kellee Crisafulli, Matthew Flora*
Incases                        Olaf Rethmeier, Scott Jacobson,
                               Werner Rissiek
Intel Corporation              Stephen Peters*, Arpad Muranyi*, Frank Kern*,
  (& formerly NCR)             Will Hobbs, Prakash Radhakrishnan,
                               Mohammed Hawana, Martin Chang, Dave Moxley
LSI Logic (Symbios Logic)      Larry Barnes*
Mentor Graphics (Zeelan,       Bob Ross*, George Opsahl, Mark Noneman,
  Interconnectix, etc.)        Tom Dagostino, Karine Loudet, Jean Oudinot,
                               Manuel De Almeida, Stephane Rousseau, 
                               Neven Orhanovic, Mohamed Mahmoud
Mitsubishi                     Hoang Nguyen, Tam Cao
Motorola                       (Ron Werner)
National Semiconductor         Cheng-Yang Kao, John Goldie, Ikchang Song,
                               Milt Schwartz*
North East Systems Associates  Edward Sayre, Kathy Breda
  (NESA)
NEC                            (Hiroshi Matsumoto)
Quantic EMC                    (Mike Ventham)
Texas Instruments              Thomas Fisher, Harvey Stiegler,
                               Vincent Chang, Jean-Claude Perrin,
                               Peter Forstner
Thomson-CSF                    Jean-Marc Claveau, Laurent Duzaic,
                               Saverio Lerose, Benoit Meyniel,
                               Jean Lefebvre  
Viewlogic                      Jon Powell, Chris Rokusek*, Guy de Burgh, 
                               Gary Mandel
VeriBest                       Ian Dodd, David Weins, Ian Gabbitas
VLSI Technology                D.C. Sessions*
Zuken-Redac                    (John Berrie) 

OTHER PARTICIPANTS IN 1998:
Actel                          Eric Tardif, Emmonvelle Gaudin 
Aerospatiale                   Lionel Dreux, Claude Huet
Alcatel (Bell, Espace, etc.)   John Fitzpatrick, W. Temmerman, 
                               Laure Bessettes, Jean-Claude Pourtau,
                               Daniel Peron
ALS Design                     Yves Mouquet
Ansoft                         Eric Bogatin
Apple                          Fred Floresca, Danny Itani
Apteq Design Systems           Dan FitzPatrick 
Atmel                          Ali Baktashian
Avanti                         Nik Bannov
CERN                           Olivier Clere, Jean-Michel Sainson, 
                               Rudi Zurbroken
Cisco Systems                  Syed Huq*, Sergio Camerlo, Irfan Elahi
Crucial Technology             Rathna Reddy
EIA                            Patti Rusher
EMC                            Fawn Engelmann, Fabrizio Zanella
ENST, Paris                    Jean-Jacques Charlot
European CAD Standardization   Adam Morawiec
  Intitiative (ECSI)
Fairchild Semiconductor        Peter LaFlamme
H.A.S Electronics              Haruny Said
IBM                            Richard Steinle, Kevin Jackson
Intracon Design Ltd.           Derek Laidlaw
Philips Semiconductor          Todd Andersen
Scottish Electronics           Robert Easson
  Manufacturing Center (SEMC)
Seagate                        Vanessa Howard
SGS-Thomson                    Philippe Lefevre
Siemens                        Gerald Bannert, Bernhard Unger, 
                               Christian Marot, Miguel Hernandez,
                               Gil Russell
Summit Computer Systems        Bob Davis*
Sun Microsystems               Lam Dong, Kevin Ko
Symmetry                       Andy Hughes
Tektronix                      Nassrin Ghahyasi
Ultratest International        Chris O'Connor
Xilinx                         Susan Wu

In the list above, attendees at the meeting are indicated by *.  Principal
members or other active members who have not attended are in parentheses.
Participants who no longer are in the organization are in square brackets.

Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are as
follows:
  
  Date               Bridge Number     Reservation #    Passcode
  October 15, 1998   IBIS Summit Meeting - No Phone
  November 6, 1998   TBD               TBD              TBD

All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas out 
7 days before each Open Forum and meeting minutes out within 7 days after.  
When you call into the meeting, ask for the IBIS Open Forum hosted by Will 
Hobbs and give the reservation number and passcode.

NOTE: "AR" = Action Required.

-------------------------------- MINUTES -------------------------------------

INTRODUCTIONS AND MEETING QUORUM
Bob Haller confirms that Digital Equipment is officially Compaq.  Also, Larry
Barnes stated that Symbios Logic is now part of LSI Logic.  Bob Ross mentioned
that the attendees list has been changed and that the EIA IBIS Open Forum
membership now is transferred to these new companies and all their divisions
world-wide.

Bob Davis of Summit Computer Systems joined the meeting to discuss the IEEE
Standard Component Data Sheet activity.

MEMBERSHIP UPDATE AND TREASURER'S REPORT
Bob Ross reported no membership or financial change.

Syed Huq stated that Cisco Systems plans to become a full IBIS Open Forum
member and is still working to get the paperwork from Patti Rusher.

REVIEW OF MINUTES AND AR'S
No corrections were noted.  The ARs will be discussed during the meeting.

MISCELLANY/ANNOUNCEMENTS
None.

PRESS AND WEB PAGE UPDATES
Syed Huq stated that there is a Mitsubishi Roster update.  Bob Haller and
Larry Barnes will work with Syed to update their sites.

Syed reports that the Models link has been restored, and a new Tools link was
created to the ibischk3 executables.  Syed uploaded linux ibischk2+ and
ibischk3 executables.  Syed also reports the turn around time for web updates
should be 24 hours.

NEW MODELS AVAILABLE, LIBRARY UPDATE
Bob Ross reported some new links:

Altera buffers:

  http://www.altera.com/html/atlas/ibis.html

Pericom Semiconductor models:

  http://www.pericom.com/ibis

Bob Ross mentioned that we still need to clean up the models directory
under eda.org/pub/ibis and remove old subdirectories such as the National
subdirectory.

OPENS FOR NEW ISSUES
None.

INTERNATIONAL/EXTERNAL PROGRESS
- IEC 62014-1 (IBIS Version 2.1) - Bob Ross stated that the IEC plenary
  session is scheduled in London on September 23-25, 1998.  There might be
  some progress on moving IBIS Version 2.1 through some more steps.  Bob
  does not think IBIS will be ratified at that meeting.

- pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits
  (IMIC) - Bob Ross mentioned that he might meet again with the committee
  chairman Dr. Hideki Fukuda in Monday, October 5, 1998 to discuss I/O
  model plans.  Although this was set up as a private meeting, Bob Ross said
  others would be allowed to attend.

- IEC 93/67/NP IBIS and EMC Simulation - Bob Ross reported that a Task Group
  meeting is planned on September 22, 1998 in Paris, prior to the IEC plenary
  meeting in London to prepare a New Work Item to be distributed at the IEC
  meeting in London.

- JC-16.2 Subcommittee: Modeling and Test - Bob Ross initially reported that
  the joint IBIS and JEDEC meeting is planned for Wednesday, December 9, 1998
  in San Diego.  Bob noted that D.C. Sessions sent a note to the IBIS
  reflector on some recent JEDEC JC-16 and JC-42 activities.  He indicates
  that the IBIS format is being considered for Specifying memory products.
  There is growing interested in the IBIS format, but may participants are not
  familiar with its details or how well it works with simulators.  This is an
  opportunity for education.  The note also stated that there is interest in
  the IBIS format for FET switches since they are now being used in DDR SDRAM
  models.

  D.C. gave further details.  The memory manufacturers are not fully aware of
  what IBIS is or does.  D.C. is helping to educate them that it is a format
  for a specification.  If one manufacturer's IBIS specification is used as
  a basis for a memory specification, other manufacturers feel that their
  products may be cut out.  D.C. also provided the JEDEC group information
  about VT and [Ramp] data.  He also has recommended that they join the
  ibis-users reflector to become more familiar with IBIS.

  D.C. also stated that the memory manufacturers need to become familiar with
  IBIS related EDA tools.  He referred to an offer by HyperLynx to provide a
  free tool to semiconductor vendors to assist in doing IBIS model
  development.  Bob Haller stated that in response to a questionnaire sent out
  by Bruce Heilbrunn, several other EDA vendors indicated that they are
  offering free or low cost tools for IBIS model development.  D.C. proposed
  that such tools and offers be put on the EIA IBIS Web Page.  Then
  semiconductor vendors could use this for contact information.  Bob Ross was
  concerned that this was not an appropriate use of the EIA IBIS Web page.  It
  deals with vendor-specific relationships, and Bob suspects that in most
  cases such arrangements are not open-ended - the details and who gets the
  tools need to be worked out on a case-by-case basis directly.  Arpad Muranyi
  supported making the information available.  One possibility might be for EDA
  vendors to use the Roster page itself.  Here the EDA vendors can provide
  information as part of their IBIS Support statement.  Bob Ross noted that
  EDA vendors can notify D.C. directly (602-752-6545) and he can relay the
  information.

  The DDR SDRAM data sheet proposal was discussed.  This is a double data
  rate SDRAM with data transfers rates up to 2 million transfers per second.
  Thus signal integrity concerns are an issue.  The SSTL2 specification is
  designed for this.  The data sheet proposal is to consider IBIS formatted
  envelop tables and data for the I/O characteristics and pin capacitance.
  The IBIS format provides the template for the specification.  This will be
  voted on at the December JEDEC meeting - co-located with the IBIS Summit
  meeting.

  D.C. further elaborated that a compelling reason for the IBIS Version 3.1
  extensions was to support FET switches in memories that are used for 
  memory isolation.

  Bob Ross mentioned that he and D.C. need to work together on the logistics
  of the IBIS Summit meeting.  D.C. strongly urges the IBIS participants to
  also participate in the JEDEC meetings as invited guests.  So Bob and D.C.
  need to provide information on such meetings and how to become an "invited
  guest".   Bob plans for such details to be sent out in the next few weeks
  for early planning.

  AR - Bob Ross and D.C. Sessions work on the logistics of the IBIS Summit
  Meeting / JEDEC JC-42 and JC-16.2 meetings and communicate the information
  using the IBIS reflectors.

- IEEE Standard Component Data Sheet - Stephen Peters met on September 17, 1998
  in San Jose with a small group of people concerning initial discussions to
  prepare a Project Authorization Request (PAR).  Stephen summarized the
  Data Sheet contents.  It is intended to be an electronic data sheet covering
  mechanical, thermal, electrical, timing, topological, VHDL descriptions, and
  architectural specification aspects.  The Pinacles document is very large
  and is not the basis for this activity.  The IBIS format could be expanded
  to include power consumption, EMI susceptibility, pin definition, short
  circuit currents, etc.  Arpad Muranyi stated that the short circuit current
  information is already in the I/V tables.  Stephen noted to the group that
  the BIRD (Buffer Issue Resolution Document) process is available to make
  IBIS changes.  Stephen provided the email address for Bob Davis, Chair. of
  the committee as [email-masked] if people want more information directly.

  Bob Davis called in later and emphasized that the committee intends to look
  at and rely on existing standards where possible.  It does not intent to
  invent new formats.  A goal is transferrable information from an identifiable
  source.  He wants a succinct and tight format.  Bob provided his website at
  www.scsi.com under projects where more information and documents will be
  stored. 

IBIS (EAST) USERS GROUP MEETINGS
Bob Haller reported on the September 3, 1998 meeting.  It had good attendance
with about 20 participants.  IBIS Summit details were discussed.  The Accuracy
Specification is about one-half done as a rough draft.  The test board is
being built at Fairchild Semiconductor and should be available for display at
the October IBIS Summit.  The connector model BIRD is shaping up.  Ed Sayre
(NESA) and Joe Socha (Trilogic) are developing the IBIS training class and
intend to present the outline and highlights at the IBIS Summit Meeting.  Work
is continuing on a DesignCon paper.

OCTOBER 15, 1998 IBIS SUMMIT MEETING PLANS
Bob Ross noted that a tentative schedule and further details were sent to the
IBIS reflectors by Kathy Breda (NESA) who is coordinating the meeting.  Bob
Ross asked Bob Haller to report on the details.

Bob Haller noted that there is interest in actual case studies.  An
opportunity exists for demonstrations in the back (including the test board
demonstration).

Bob Ross stated that he will include the tentative schedule in the minutes
and reviewed it.  He noted that it will probably change as more presentations
are received and perhaps some time.  Bob summarized the schedule so far as
containing the following:

  A free two hour tutorial
  About six presentations
  A case study panel
  An optional Golf party from 4-6 PM for casual interaction (extra cost)

Arpad Muranyi indicated interest in comparing a computer simulation model with
silicon.

The tentative schedule is below (adapted from the mailing):

8:30 A.M.   Refreshments and informal gathering
9:00        Welcome, Introductions of participants - Ed Sayre (NESA)
9:15        General IBIS business - Bob Ross (Interconnectix/Mentor Graphics)
9:30        IBIS tutorial - Ed Sayre (NESA) /Joe Socha (Trilogic)/TBD
10:30       15 minute break
10:45       Continue with IBIS tutorial
11:30       IBIS Connector Model Definition BIRD - Fabrizio Zanella (EMC)
12:00 P.M.  Lunch
1:00        Case Study Panel - Using IBIS Models
		
	    Behavioral/IBIS modeling of a FET - Tay Ansari (Sun Microsystems)
            Bus using Cadence tools
		
            Measurement and simulations using various - Fabrizio Zanella
            Tools demonstrating and comparing 	
            1) Measurements 2) Spice using spice model
            2) vendors "A" and "B" using IBIS models

            IBIS Accuracy Specification	- Robert Haller (Compaq Computer)

            IBIS Accuracy Test Board - Peter Laflamme (Fairchild Semi.)

            Comparison between SPICE and IBIS - Jinhua Chen (NESA)
            I/O device simulations				

            MORE CASE STUDIES APPRECIATED!
		
2:00        Break	
2:15        Using SPICE to Validate IBIS keywords - Bob Ross (Mentor Graphics)
3:15        PRESENTATION NEEDED!
3:45        Business Wrap-up
4:00        IBIS Summit Golf Outing - Cyprian Keys Golf Club (20 minutes
            from meeting location)
	    Greens Fee ($12) to be paid by golfer. This is a Par 3, nine
            hole course, located twenty minutes from the meeting location. 
		
            284 East Temple St
            Bolyston MA 01505
            508-869-9900

Bob Ross noted that the PCB Conference East is being held nearby Monday
through Friday, October 12-16, 1998 in Marlborough, MA.  So several PCB
Conference attendees can also attend the IBIS Summit.  Bob also noted that
this was an excellent opportunity for some free IBIS training for local 
people and conference attendees.

Kathy is still seeking closure on joint sponsorship issues.  People should
contact Kathy for documentation.

As the emailing indicates, presenters and participants need to notify Kathy
at [email-masked]

EDITING COMMITTEE 
Bob Ross may upload a data model.  The editing committee BNF AR remains.

AR - Bob Ross generate and post a BNF for IBIS Version 3.0 (an IBIS Version
3.0 ratification AR).

IBISCHK EXECUTABLES
Bob Ross reported that the ibischk2+, Version 2.1.17 executables and the 
ibischk3 Version 3.1 executables have been uploaded on eda.org.  Thanks to
Chris Rokusek for creating these during the last meeting.  Also, Linux
executables created by Syed Huq have been uploaded as previously reported.
So the AR is completed.

VERSION 3.1/3.2 PARSER DEVELOPMENT
Bob Ross plans to upload ver3_2b.ibs document in the work in progress
directory with the resolution of BIRD53.1 below and some minor editorial
corrections.

As previously reported, Bob is still expecting the first version of ibischk3
for IBIS Version 3.2 by the end of September, 1998.  Atul asked some questions
about data value tests under the new [Submodel keyword.  Bob responded with a
set of tests that are similar to those of existing keywords.

COOKBOOK
No report from Stephen Peters.

IBIS MODEL REVIEW COMMITTEE DISCUSSION
Matthew Flora stated that Motorola has submitted several PECL Models for
review by the Model Review Committee.  Bob Ross believes several people have
already responded.  The committee is composed of EDA tool representatives,
and each should respond privately to the model provider.  The model provider
is expected to consider the comments and make changes, if necessary.

D.C. Sessions reported that VLSI Logic has revised its IBIS models.  Potential
reviewers need to notify D.C. directly by letter to get a copy of the new
library for review.  The letter should state that the reason is for review.
Reviewed models are not to be given to anyone else.

Matthew listed the companies doing the review: HyperLynx, Incases, Mentor
Graphics, Viewlogic, and Veribest.  He expects a new Cadence representative
soon.  Matthew still plans to send a note to the reflector.  His contact
address is listed at the end of these minutes.

AR - Matthew Flora issue to the IBIS reflector a short writeup on the IBIS
Model Review Committee.

BIRD53.1 - IBIS File Character Set
Geoffrey Ellis briefly summarized BIRD53.1 by stating that it limited the
line terminators to those supported by UNIX (linefeed) and DOS (carriage
return, line feed).  Geoffrey and Matthew Flora worked together to produce
BIRD53.1 in response to the editorial comments at the August 28, 1998 IBIS
meeting.  At that time we achieve a general consensus regarding approving
BIRD53.

Raj Raghuram requested that BIRD53.1 new text be read.  Bob Ross read the text
and called for a vote.

BIRD53.1 was approved by unanimous vote.

BUG29 - \n, \r. \r\n Line Terminators Need to be Handled
As a result of the BIRD53.1 approval, BUG29 then is closed with the status
"Will Not Fix".  BUG29 had requested additional terminators besides the UNIX
and DOS terminators above.

BUG31 - Error for [Pulldown] Decreasing Current Should be Warning
Bob Ross continued the discussion on BUG31 by stating that it remained open,
but we did not decide what action to take.  BUG31 requests that the [Pullup],
[Pulldown], [GND Clamp], and [POWER Clamp] table endpoint test be changed
so that it reports a Warning rather than an Error.  The example in BUG29
is confusing and does not appear to have realistic data.  Bob illustrated the
intent with the case that a ground clamp might exist only in the receiver
mode of an I/O buffer, but not appear in the driver mode.  The only way to
model this using IBIS Version 2.1 is to put a compensating current in the
[Pulldown] table (and technically the [Pullup] table).  Because of the 
dominance of the clamp currents, this work-around can create in an ibischk3
Error violation.

Arpad Muranyi and others pointed out that maybe ibischk3 should test the 
summated tables.  Then the endpoint violation would not be reported.

Bob felt there was danger in approving this because the model would be deemed
acceptable, but some simulators might still have problems dealing with this
extreme case.  So the model would have limited transportability.

Matthew Flora wanted to look at the IBIS Specification further to understand
better the problem.  We did not achieve a resolution and will continue the
discussion at a later meeting.

IBIS REFLECTOR ISSUES
No time remained for this discussion.

NEXT MEETING:
The meeting is the IBIS Summit Meeting on Thursday, October 15, 1998 at
Boxboro, Massachusetts.  No teleconference will be available.

The following meeting will be on Friday, November 6, 1998 from 8:00 AM to 
10:00 AM.
==============================================================================
                                      NOTES

IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
            [email-masked]
            Modeling Engineer, Interconnectix BU of Mentor Graphics
            8005 S.W. Boeckman Road, Wilsonville, OR 97070

VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515
            [email-masked]
            Senior Hardware Engineer, Intel Corporation
            M/S JF1-56
            2111 NE 25th Ave. 
            Hillsboro, Oregon 97124-5961

SECRETARY:  Matthew Flora (425) 869-2320, Fax: (425) 881-1008
            [email-masked]
            Senior Engineer, HyperLynx, Inc.
            17641 NE 67th Court
            Redmond, WA 98052

LIBRARIAN:  Jon Powell (805) 988-8250, Fax: (805) 988-8259
            [email-masked]
            Senior Scientist, Viewlogic (formerly Quad Design)
            1385 Del Norte Rd., Camarillo, CA 93010
 
This meeting was conducted in accordance with the EIA Legal Guides and EIA
Manual of Organization and Procedure.

The following e-mail addresses are used:

  [email-masked]
      To join, change, or drop from either the IBIS Open Forum Reflector
      ([email-masked]), the IBIS Users' Group Reflector ([email-masked])
      or both.  State your request.

  [email-masked]
      To obtain general information about IBIS, to ask specific questions
      for individual response, and to inquire about joining the EIA-IBIS
      Open Forum as a full Member.

  [email-masked]
      To send a message to the general IBIS Open Forum Reflector.  This
      is used mostly for IBIS Standardization business and future IBIS
      technical enhancements.  Job posting information is not permitted.

  [email-masked]
      To send a message to the IBIS Users' Group Reflector.  This is 
      used mostly for IBIS clarification, current modeling issues, and
      general user concerns.  Job posting information is not permitted.

  [email-masked]
      To report ibischk2 parser bugs.  The Bug Report Form Resides on
      eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.

      To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
      which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, 
      /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
      respectively.

Information on IBIS technical contents, IBIS participants, and actual
IBIS models are available on the IBIS Home page found by selecting the
Electronic Information Group under:

  http://www.eia.org

Check the pub/ibis directory on eda.org for more information on previous 
discussions and results.  You can get on via FTP anonymous.
==============================================================================

Matthew Flora
IBIS Open Forum Secretary
(425) 869-2320 PH
(425) 881-1008 FAX
[email-masked]
HyperLynx, 17641 NE 67th Court, Redmond, WA 98052 USA