Subject: EIA IBIS face-to-face meeting minutes 1/26

From: Stephen Peters <[email-masked]>
Date: Tue, 03 Feb 1998 09:33:05 -0800

DATE: 2/3/98

 SUBJECT: 1/26/98 EIA IBIS Open Forum Minutes
  
 VOTING MEMBERS AND 1998 PARTICIPANTS LIST:
 AMP                            (Martin Freedman) 
 Applied Simulation Technology  Norio Matsui*, Raj Raghuram*
 Cadence Design & UniCAD        C. Kumar*, Don Telian*, Patrick Riffault*, 
				Craig Lewis*, Greg Fitzgerald*, Paul Galloway*
 Cypress                        (Bruce Wenniger)
 Digital Equipment Corp.        Jeff Chu, Greg Edlund*, Bob Haller*
 Hewlett Packard 
   EEsof                        Karl Kachigan*, Henry Wu*
   Boise                        Paul Gregory*
 High Design Technology         (Razvan Ene)
 HyperLynx                      Kellee Crisafulli*, Matthew Flora*
 Incases                        Olaf Rethmeier, Scott Jacobson*
 Intel Corporation              Stephen Peters*, Arpad Muranyi*, Frank Kern*
   Columbia, SC (formerly NCR)  Dave Moxley
 Mentor Graphics                Mark Noneman* 
   Interconnectix               Bob Ross*
   Zeelan Technology            George Opsahl, Tom Dagostino*
 Mitsubushi                     Tam Cao*
 Motorola                       (Ron Werner)
 National Semiconductor         Syed Huq*, Cheng-Yang Kao*, John Goldie*,
				Ikchang Song*
 NEC                            (Hiroshi Matsumoto)
 Quantic EMC                    (Mike Ventham)
 Texas Instruments              Thomas Fisher*, Harvey Stiegler*,
				Vincent Chang*
 Thomson-CSF/SCTF               (Jean LeBrun)
 Viewlogic                      Jon Powell*, Chris Rokusek* 
 VeriBest                       Ian Dodd*
 VLSI Technology                D.C. Sessions*
 Zuken-Redac                    (John Berrie) 

 OTHER PARTICIPANTS IN 1998:
 Ansoft                         Eric Bogatin*
 Apple                          Fred Floresca*, Danny Itani*
 Apteq Design Systems           Dan FitzPatrick* 
 Compaq                         Shariq Rahman*
 EIA                            Patti Rusher*
 EMC                            Fawn Engelmann*
 Fairchild Semiconductor        Peter LaFlamme*
 NESA                           Edward Sayre*, Kathy Breda*
 North Carolina State U.        (Michael Steer)
 Philips Semiconductor          Todd Andersen*
 Seagate                        Vanessa Howard*
 Symmetry                       Andy Hughes*
 Tektronix                      Nassrin Ghahyasi*
 Ultratest International        Chris O'Connor*
 Xilinx                         Susan Wu*

 In the list above, attendees at the meeting are indicated by *.  Principal
 members or other active members who have not attended are in parentheses.
 Participants who no longer are in the organization are in square brackets.

 Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are as
 follows:
   
   Date               Bridge Number     Reservation #    Passcode
   February 13, 1998  (916) 356-9200    5-15348          8377869
   Thurday, February 26, 1998  EUROPEAN IBIS SUMMIT - NO BRIDGE
 
 All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas out 
 7 days before each Open Forum and meeting minutes out within 7 days after.  
 When you call into the meeting, ask for the IBIS Open Forum hosted by Will 
 Hobbs and give the reservation number and passcode.
 
 NOTE: "AR" = Action Required.

-------------------------------- MINUTES -------------------------------------

 INTRODUCTIONS AND MEETING QUORUM
 Syed Huq opened the meeting.  Syed asked the officers Syed, Bob Ross, 
 Jon Powell, and Stephen Peters to introduce themselves.  Then all 
 participants introduced themselves and company affiliation.  

 Bob surveyed the attendance and found good representation among users (of
 models and tools), EDA providers and Semiconductor Vendors.  The recorded
 attendance was 49.
 
 Bob also thanked National Semiconductor for their exceptional show of
 support of the EIA IBIS Open Forum for hosting the meeting and to Syed
 Huq for making the arrangements for the meeting and handling the logistics
 of scheduling the presentations.

 MEMBERSHIP UPDATE AND TREASURER'S REPORT
 Patti Rusher handed out invoices for 1998 EIA IBIS Open Forum membership
 to representatives of member companies in attendance.  The rest will be
 mailed directly.  
 
 Bob Ross reported that as a result of an error, Zuken-Redac should have
 been listed as a member company in 1997 and is now listed for 1998.  (The
 participation lists above are now reset to represent 1998 membership and
 participation.)  There should be some revisions as some recent company
 acquisitions and mergers are finalized.

				   PROGRAM

 The program was rearranged to accommodate several presenters and to offer
 a better flow.  The notes below represent the program in the order of
 presentation rather than in the original Agenda.  Copies of the electronic 
 presentations will be stored on eda.org, so the notes below will just
 be brief comments of some main points and related discussions that were
 captured.

 STATUS OF EIAJ I/O MODEL STANDARD 
 - Norio Matsui, Applied Simulation Technology
 Bob Ross introduced this presentation indicating that the Chair., Hideki 
 Fukuda, from Hitachi and Chair. of the subgroup could not attend.  He had 
 given a presentation to a small group in April, 1998, so Norio Matsui is 
 giving the report on the I/O Buffer Interface for ICs activity.  Norio 
 stated that Version 1.0 was  completed in January, 1998, and an English 
 translation is under preparation.  Like IBIS, the specification uses table 
 data for transistor descriptions rather than the process parameters.   
 Stimulus expressions for buffers were added.  The specification describes 
 I/O buffers and package models on a more detailed level than IBIS and is 
 used for signal integrity, power integrity and in the future, EMI.  Norio 
 showed examples of ground bounce simulation, reflections, and crosstalk.  
 Applied Simulation Technology processes table spice models and simulation 
 times are as fast as IBIS simulations.  In addition, Avent! is reportedly
 going to re-instate a ibis2spice converter. Future activities involve 
 extensions for EMI, a BGA (Power/Ground Plane) model, and development of 
 tools.

 Bob commented at the end that Fukuda-san had indicated that the English
 translations of Version 1.0 was planned by February 1998, and that a Web 
 site was also planned by March 1998 to give information and background.

 REPORT ON IBIS USER'S FORUM
 - Ed Sayre, Northeast Systems Associates (NESA)
 Ed summarized the three meetings held so far on September 18, 1997 (hosted
 by NESA), December 4, 1997 at Cadence, and January 18, 1998 at Stratus.  Two 
 sub-committees were formed.  Greg Edlund chairs a group on Accuracy and
 Validation, and Paul Galloway on Software Aspects of IBIS.  Greg and Bob 
 Haller have presented their thoughts on IBIS model accuracy, and Paul has
 reported that users are interested in an IBIS to Spice translation.  The
 next meeting is scheduled on Thursday, February 12, 1998 at EMC.  The 
 participants will report back on the IBIS Summit meeting and the sub-
 committees will report on progress.  Ed emphasized that there is strong 
 participation from the East Coast IBIS user community, but will accept help 
 from all over.  Ed also stressed that the communications industry (operating 
 in the GHz region and with fiber optics) is under-represented in IBIS.  The 
 IBIS East group will coordinate its activities with the IBIS Open Forum.

 HYPERLYNX IBIS DEVELOPERS KIT
 - Kellee Chrisafulli, HyperLynx
 Kellee introduced the HyperLynx IBIS Developers Tool Kit to assist in 
 producing better IBIS models and verifying them.  It will be available
 for free to semiconductor vendors who will provide the models to the public
 for free.  It will also be available to others for $4,000.  The Kit consists
 of the (free) Visual IBIS Editor with built in ibischk2+ rules checking,
 a simulator to run IBIS models, pre-built schematics with test loads,
 a schematic editor to create any type of load circuit, and over 800 IBIS
 models to be used as examples.  Plans for future releases include an
 "IBIS Model Wizard" to help you generate models by asking questions about
 output resistance, rise and fall times, etc., and a similar "Package Model
 Wizard" to provide first cut package information.  Kellee expects the 
 product to be available by the end of February, 1998.

 DEVELOPING AN IBIS ACCURACY SPECIFICATION
 - Greg Edlund, Digital Equipment
 Greg indicated that the focus has shifted to accuracy, defined as
 agreement between model prediction and lab measurements.  He chairs a sub-
 committee which intends to produce an accuracy specification by January,
 1999 and is looking for a semiconductor manufacturer to serve as a beta
 site.  The specification would cover relevant model parameters, minimum
 set of test loads, measurement methodology, a comparison metric and a
 characterization report.  Greg defined three levels of model accuracy and
 the comparison metric for AAPE: average absolute percent error.  The
 accuracy statistics would be added to the IBIS model header.
 As part of his presentation, Greg passed around a board they are using
 as a test fixture, along with the schematic.

 This presentation generated a general discussion on accuracy and a number
 of questions. D.C Sessions commented that to do correlation on EVERY model
 in an I/O cell library would be difficult.  Instead, the semi house must
 create a process that works for a few, then apply the process to get
 confidence.  There was some discussion on whether this process should be
 documented as part of the spec. 

 V-T CURVE MODELING
 - C. Kumar, Cadence
 Kumar argued that IBIS Models as currently specified with V/T tables can
 be processed by different algorithms, all satisfying the "golden data".
 He argues that specifying an IBIS model with one I/T curve and one V/T 
 table for 50 ohms terminated to Vcc/2 gives the internal staged switching 
 information to produce unambiguous and accurate results.  Kumar showed
 an example of a staged switch and also showed the assumed equations.  Upon
 questioning, Kumar stated that this specification method would work best for 
 Spice models and would be more difficult for physical devices.  Jon Powell
 argued that V/T curve modeling was still valid, but that the proper loads
 had to be selected -- "the selection of tests loads is not arbitrary".

 COMPARING THE PERFORMANCE AND ACCURACY OF SPICE AND IBIS MODELS IN HIGH
 FREQUENCY SIMULATION
 - Arpad Muranyi, Intel
 Arpad presented some preliminary results addressing the question of whether
 there is a frequency limit for using IBIS models.  He compared HSPICE models
 and behavioral Spice models for flight time simulation comparisons.  First 
 he established that his comparison was limited by time step resolution
 limitations.  Some suggested that he could have controlled this.  Then he
 showed very good correlation between the simulations under a resistor, 
 capacitor and set of transmission line loads.  He concludes that while
 v2.1 IBIS models are more accurate than v1.1 models, both are accurate to
 within a few pS, and IBIS models are applicable for higher frequency 
 simulations.

 A COMPARISON AND CORRELATION OF RESULTS FOR PHILIPS BICMOS ALVT16244 USING
 HSPICE AND PSTAR (INTERNAL) VERSUS SIMULATED AND MEASURED IBIS MODELS
 - Todd Andersen, Philips
 Todd presented a complete report of a comparison study based on measurement,
 simulation using HyperLynx LineSim, Philips Pstar, and HSPICE.  He showed
 the non-monotonic behavior of the input bus hold circuit.  In general, 
 the comparison of IV data and time simulations were excellent.  

 CORRELATING A SIMULATED MODELS (SPICE2IBIS) TO LAB MEASUREMENTS
 - Patrick Riffault, Cadence
 Patrick presented a methodology for doing a comparison.  An internal test
 board was used which could be populated with different technologies.  The
 process involves correlating the actual IBIS model with physical model
 measurements to adjust the RAMP times and I/V data.  When correlated, the
 measured results are then compared with simulation results.  Patrick's 
 results did show some differences, but there was only a 6% (max) error
 between the predicted and measured overshoot/undershoot .  As a general 
 design process, Patrick recommends using the min and max tables, since the
 IBIS model adjustment is a time consuming process requiring proper equipment.

 DATA REQUIREMENTS TO BUILD A COMPLETE IBIS MODEL - CADENCE'S MODEL 
 DEVELOPMENT PROCESSES
 - Paul Galloway, Cadence
 Paul presented a process for generating IBIS models from Spice models.  The
 process involves using s2ibis and then comparing the simulations using 
 SigNoise and Spice.  He showed that source data comes from Spice models,
 data sheets, measurements and legacy models.  All sources can be used, and
 he showed a table where keyword parameters are best obtained.  As part of
 the final QA process, he does syntax checking with ibischk, visual 
 inspection and simulation to examine the rising and falling waveforms.
 Paul showed some plots of results which showed excellent correlation.

 INSPECTING IBIS MODELS
 - Bob Ross, Interconnectix/Mentor Graphics
 Bob indicated that as a goal, IBIS models from commercial sources and
 semiconductor vendors should be plug-in compatible across simulators.
 This is a more stringent requirement than is satisfied with existing Spice
 models which have no standard syntax for I/O buffer models, may be
 different for different Spices, and require user Spice knowledge and
 user re-configuration for the application.  The presentation was concerned 
 with IBIS syntax and construction issues rather than on accuracy issues.
 Similar to Paul Galloway's presentation, Bob presented four areas that
 he checks:  ibischk2+ checking (after converting version 1.1 models to
 [IBIS Ver] 2.1, plotting (to view all the tables), and simulations (for
 amplitude and rise and fall time reality, and inspection of the contents.
 Bob showed some expected plots for CMOS, TTL, ECL and BiCMOS technologies.
 Some problems revealed by the inspection process may also be revealed by
 some of the other steps.  Among the items to be observed or tested are
 required Vinh and Vinl thresholds and values, endpoints of Waveform tables,
 Timing test load information and intersection, and monotonic data.  Typical
 voltage and current points at 0 A and 0 V crossings can be inspected for
 typical technologies.  Clean time responses should exist for the waveform
 tables.  Bob outlined areas of inspection and listed several points under
 each.  The areas included correctness, minimal completeness, correct 
 numerical values, accuracy of information, and relationship with CAE
 algorithms.  Bob also showed some older s2ibis defects which you would look
 for based on information on which s2ibis was used.  Basically, look for both  
 the expected and unexpected.  Many models can be fixed or completed, but 
 Plug-in compatibility should be an objective for commercial quality IBIS 
 models.

			      OTHER BUSINESS

 COMMERCIAL MODELS AND SERVICES
 At the suggestion of Jon Powell, Bob Ross asked for individuals who have
 commercial offerings to describe briefly what services, products or models
 they are offering.

 John Powell described that he is managing the Viewlogic Consulting Services.
 The service will provide IBIS models to semiconductor vendors and customers
 based on HSPICE or measurement.

 Andy Hughes of Symmetry used to be an IBIS Model provider prior to being
 acquired by Analogy.  Symmetry still supports existing customers.
 
 Tom Dagostino of Zeelan Technology (A Mentor Graphics business) has a 
 library of over 10,000 IBIS Components for sale that are measurement
 based.  Zeelan also will provide libraries in Quad and Cadence formats
 directly.  Zeelan also provides model development services for users
 and semiconductor vendors.

 Paul Galloway introduced the Cadence IBIS Modeling Service for developing
 IBIS Models from Spice models for semiconductor vendors and customers.

 The HyperLynx tool was discussed in the main presentation.  About 800
 IBIS Models are available to customers.

 Chris O'Connor discussed the UltraTest International programmable curve
 tracer which can be configured to automatically extract the IBIS Model
 I/V tables for any set of pins.  
 
 Scott Jacobson mentioned that Incases provides IBIS models through its
 consulting services to customers.

 Bob noted that other commercial IBIS model providers not mentioned above 
 also exist.

 MODEL REVIEW COMMITTEE
 Bob Ross mentioned that an EDA tool vendor IBIS Model Review committee has
 been formed and coordinated by Matthew Flora.  These individuals will be 
 available to review models that are submitted to them from semiconductor
 vendors, commercial vendors, or users, and will provide feedback to the
 originator of the model regarding correctness and how the models performed
 in their simulators.  In that way the model developers will learn about the
 common set of features that need to be supported in addition to learn about
 possible problems in the models common to all.  The members consist of the
 following people:

   Matthew Flora, HyperLynx
   Bob Ross, Interconnectix/Mentor Graphics
   Olaf Rethmeier, Incases
   Chris Rokusek, Viewlogic

 Bob asked for and got additional members:

   Paul Galloway, Cadence
   Ian Dodd, VeriBest
   Jon Powell, Viewlogic

 IBISCHK2.1.15 STATUS
 Bob Ross indicated the ibischk2+ Version 2.1.15 is waiting a fix for BUG21 
 and creation of executables before being posted.  Matthew Flora has sent
 the revised code with BUG20 fixed to Chris Rokusek, and Chris needs to fix
 BUG21 and send the source code to Atul Agarwal and Bob and Matthew.  Chris
 will also send the executables to Bob to be put on eda.org.

 IBISCHK3 STATUS
 Bob Ross indicated that 10 companies have committed to the development
 project.  Bob will check whether a few more companies will join.  He expects 
 to decide on issuing invoices at the February 13, 1998 meeting based on 
 commitments at that date.  So far Bob has commitments or payment from the
 following companies:

   Applied Simulation Technology
   Cadence
   Digital Equipment
   HyperLynx
   Incases
   Intel
   Interconnectix/Mentor Graphics
   Mitsubishi Semiconductor 
   National Semiconductor
   Viewlogic

 Bob reported that Atul Agarwal has completed 5 of the eight items.
 He expects to have a Beta Version of the Source Code available by the
 beginning of March, 1998.  Bob will distribute it to the companies who
 have funded the development.  Atul is awaiting ibischk2 Version 2.1.15
 as the new baseline.

 S2IBIS2/3
 Bob Ross stated that the spice2ibis project could be turned over to 
 industry to create a commercial product.  Currently, a student, R. Sanjeev,
 also known as Presi is working on improvements.

 VERSION 3.1 OBJECTIVE
 Bob Ross indicated that it would be nice to close out all of the issues
 and vote for ratification of Version 3.1 at the June IBIS Summit meeting
 at the Design Automation Convention.  The ibischk3 development project is
 part of the process to check and stabilize Version 3.1.

 EUROPEAN IBIS SUMMIT
 Bob Ross showed the tentative agenda consisting of 10 presentations to date.
 He indicated good sign up so far, but will send out another notice for
 sign up and additional presentations.  The European IBIS Summit is being
 co-sponsored by Cadence, High Design Technology, and Mentor Graphics and
 will be held on Thursday, February 26, 1998 in Paris, France.

 ADJOURNMENT
 The meeting was adjourned after once again thanking Syed Huq and National
 Semiconductor for taking care of all of the arrangement.

 NEXT MEETING:
 The next teleconference meeting is on Friday, February 13, 1998, 8:00 A.M. to 
 9:55 A.M.
 ==============================================================================
                             NOTES
 
 IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
	     [email-masked]
	     Modeling Engineer, Interconnectix BU of Mentor Graphics
	     8005 S.W. Boeckman Road, Wilsonville, OR 97070

 VICE CHAIR: Syed Huq (408) 721-4874, Fax: (408) 721-4785
	     [email-masked]
	     Staff Applications Engineer, National Semiconductor, M/S A-2595
	     2900 Semiconductor Drive, Santa Clara, CA 95052
 
 SECRETARY:  Stephen Peters (503) 264-4108, Fax: (503) 264-4515
	     [email-masked]
	     Senior Hardware Engineer, Intel Corporation
	     M/S JF1-56
	     2111 NE 25th Ave. 
	     Hillsboro, Oregon 97124-5961

 LIBRARIAN:  Jon Powell (805) 988-8250, Fax: (805) 988-8259
	     [email-masked]
	     Senior Scientist, Viewlogic (formerly Quad Design)
	     1385 Del Norte Rd., Camarillo, CA 93010
  
 This meeting was conducted in accordance with the EIA Legal Guides and EIA
 Manual of Organization and Procedure.
 
 The following e-mail addresses are used:

   [email-masked]
       To join, change, or drop from either the IBIS Open Forum Reflector
       ([email-masked]), the IBIS Users' Group Reflector ([email-masked])
       or both.  State your request.

   [email-masked]
       To obtain general information about IBIS, to ask specific questions
       for individual response, and to inquire about joining the EIA-IBIS
       Open Forum as a full Member.

   [email-masked]
       To send a message to the general IBIS Open Forum Reflector.  This
       is used mostly for IBIS Standardization business and future IBIS
       technical enhancements.  Job posting information is not permitted.

   [email-masked]
       To send a message to the IBIS Users' Group Reflector.  This is 
       used mostly for IBIS clarification, current modeling issues, and
       general user concerns.  Job posting information is not permitted.

   [email-masked]
       To report ibischk2 parser bugs.  The Bug Report Form Resides on
       eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.

       To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
       which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, 
       /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
       respectively.

 Information on IBIS technical contents, IBIS participants, and actual
 IBIS models are available on the IBIS Home page found by selecting the
 Electronic Information Group under:

   http://www.eia.org

 Check the pub/ibis directory on eda.org for more information on previous 
 discussions and results.  You can get on via FTP anonymous.
 
 "IBIS Spoken Here" placards are available from Jon Powell ([email-masked]) for 
 use at trade shows.
 ==============================================================================

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