Subject: IBIS Open Forum Face-to-Face Meeting Minutes

From: Stephen Peters <[email-masked]>
Date: Mon, 29 Jun 1998 10:31:29 -0700

DATE: 6/23/98

 SUBJECT: 6/18/98 EIA IBIS Open Forum Minutes
     
 VOTING MEMBERS AND 1998 PARTICIPANTS LIST:
 AMP                            (Martin Freedman) 
 Applied Simulation Technology  Norio Matsui*, Raj Raghuram*
 Cadence Design (& UniCAD)      C. Kumar, Don Telian, Patrick Riffault, 
				Craig Lewis, Greg Fitzgerald, Paul Galloway,
				Patrick Dos Santos, Catherine Weiss, 
				Alain Tribaudot, Geoffrey Ellis 
 Cypress                        Bruce Wenniger*
 Digital Equipment Corp.        Jeff Chu, Greg Edlund, Bob Haller
 Hewlett Packard (EEsof, etc.)  Karl Kachigan, Henry Wu*, Paul Gregory
 High Design Technology         Razvan Ene
 HyperLynx			Kellee Crisafulli*, Matthew Flora*
 Incases                        Olaf Rethmeier, Scott Jacobson,
				Werner Rissiek
 Intel Corporation              Stephen Peters*, Arpad Muranyi*, Frank Kern,
				Will Hobbs*, Prakash Radhakrishnan,
				Mohammed Hawana*, Martin Chang*
   Columbia, SC (formerly NCR)  Dave Moxley
 Mentor Graphics (Zeelan,       Bob Ross*, George Opsahl, Mark Noneman,
   Interconnectix, etc.)        Tom Dagostino, Karine Loudet, Jean Oudinot,
				Manuel De Almeida, Stephane Rousseau, 
				Neven Orhanovic*, Mohamed Mahmoud*
 Mitsubishi                     Hoang Nguyen, Tam Cao
 Motorola                       (Ron Werner)
 National Semiconductor         Syed Huq*, Cheng-Yang Kao, John Goldie,
				Ikchang Song
 North East Systems Associates  Edward Sayre, Kathy Breda
   (NESA)
 NEC                            (Hiroshi Matsumoto)
 Quantic EMC                    (Mike Ventham)
 Symbios                        Larry Barnes*
 Texas Instruments              Thomas Fisher, Harvey Stiegler,
				Vincent Chang, Jean-Claude Perrin,
				Peter Forstner
 Thomson-CSF                    Jean-Marc Claveau, Laurent Duzaic,
				Saverio Lerose, Benoit Meyniel,
				Jean Lefebvre  
 Viewlogic                      Jon Powell, Chris Rokusek*, Guy de Burgh, 
				Gary Mandel
 VeriBest                       Ian Dodd*, David Weins, Ian Gabbitas
 VLSI Technology                D.C. Sessions*
 Zuken-Redac                    (John Berrie) 

 OTHER PARTICIPANTS IN 1998:
 Actel                          Eric Tardif, Emmonvelle Gaudin 
 Aerospatiale                   Lionel Dreux, Claude Huet
 Alcatel (Bell, Espace, etc.)   John Fitzpatrick, W. Temmerman, 
				Laure Bessettes, Jean-Claude Pourtau,
				Daniel Peron
 ALS Design                     Yves Mouquet
 Ansoft                         Eric Bogatin
 Apple                          Fred Floresca, Danny Itani
 Apteq Design Systems           Dan FitzPatrick 
 Atmel                          Ali Baktashian*
 Avanti                         Nik Bannov*
 CERN                           Olivier Clere, Jean-Michel Sainson, 
				Rudi Zurbroken
 Compaq                         Shariq Rahma
 Crucial Technology             Rathna Reddy
 EIA                            Patti Rusher*
 EMC                            Fawn Engelmann, Fabrizio Zanella
 ENST, Paris                    Jean-Jacques Charlot
 European CAD Standardization   Adam Morawiec
   Intitiative (ECSI)
 Fairchild Semiconductor        Peter LaFlamme
 H.A.S Electronics              Haruny Said
 IBM                            Richard Steinle*, Kevin Jackson*
 Intracon Design Ltd.           Derek Laidlaw
 Philips Semiconductor          Todd Andersen
 Scottish Electronics           Robert Easson
   Manufacturing Center (SEMC)
 Seagate                        Vanessa Howard
 SGS-Thomson                    Philippe Lefevre
 Siemens                        Gerald Bannert, Bernhard Unger, 
				Christian Marot, Miguel Hernandez,
				Gil Russell
 Sun Microsystems               Lam Dong*, Kevin Ko*
 Symmetry                       Andy Hughes
 Tektronix                      Nassrin Ghahyasi
 Ultratest International        Chris O'Connor
 Xilinx                         Susan Wu

 In the list above, attendees at the meeting are indicated by *.  Principal
 members or other active members who have not attended are in parentheses.
 Participants who no longer are in the organization are in square brackets.

 Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are as
 follows:
   
   Date               Bridge Number     Reservation #    Passcode
   July 17, 1998      (916) 356-9200    6-57211		 5683488

 All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas out 
 7 days before each Open Forum and meeting minutes out within 7 days after.  
 When you call into the meeting, ask for the IBIS Open Forum hosted by Will 
 Hobbs and give the reservation number and passcode.
 
 NOTE: "AR" = Action Required.

 -------------------------------- MINUTES -------------------------------------

 INTRODUCTIONS AND MEETING QUORUM
 The meeting was held all day at the Marriott Hotel, San Francisco, California.
 Bob Ross opened the meeting and everyone introduced themselves.  The meeting
 attracted 26 people from 14 organizations with a good representation from 
 semiconductor vendors, EDA tool vendors and users.  Atmel, Cypress, Sun, and 
 IBM had new attendees for 1998.

 Note that several presentations were given, and some of these will be 
 uploaded to eda.org under /pub/ibis/summits/june98.

 Bob noted that the meeting would start with business and then continue with
 presentations and technical discussions.  A number of BIRDs would be 
 discussed in order to achieve general consensus so they could be voted on 
 at the next meeting.

 IBIS 1997-1998 REVIEW - Bob Ross (Mentor Graphics)
 Bob Ross gave a summary of the activities for the year from June 1997 to the
 present.  The interest in IBIS has become widespread with many IBIS models
 supplied by semiconductor and commercial vendors.  Bob showed some
 participation numbers and linkages with IBIS from other organizations.  Bob
 concluded that the main work continues toward Version 3.1 closure and ibischk3
 completion.  
 
 (This presentation will be uploaded to eda.org.)

 ELECTION OF OFFICERS (1998-1999)
 Bob Ross called for nominations.  After several nominations and discussions
 of positions, D.C, Sessions moved that the following slate be elected by
 acclimation.  This was seconded and the following slate was approved.

   Chair: Bob Ross, Interconnectix B.U., Mentor Graphics
   Vice-Chair: Stephen Peters, Intel Corporation
   Secretary: Matthew Flora, HyperLynx, Inc.
   Librarian: Jon Powell, Viewlogic

 Patti Rusher presented recognition plaques with the new IBIS logos to last
 years officers: Jon Powell, Librarian, Stephen Peters, Secretary, Syed Huq,
 Vice-Chair, and Bob Ross, Chair.  Syed plans to continuing managing the
 EIA/IBIS Web Site.

 (Added Note: Bob thanks Syed for his outstanding service as Vice-Chair to the
 EIA IBIS Open Forum and for promoting IBIS internally at National.  Also, Bob
 thanks Stephen for supplying the EIA IBIS Open Forum Fact Sheet for the EIA 
 booth at the Design Automation Conference (DAC).  Finally, Bob thanks Patti 
 for developing the large IBIS poster for the EIA booth (with a high 
 resolution per IBIS logo) and for handling the EIA IBIS Open Forum meeting 
 arrangements including the outstanding lunch.)

 OPENS FOR NEW ISSUES (Some during the meeting)
 Will Hobbs on IBIS Evolution and Adoption (presentation)
 Will Hobbs on actual processes, parser, timeline
 Will Hobbs on Version 4.0 needs
 Will Hobbs on EDA Tool Support for Version 3.1
 Chris Rokusek on ibischk2+ Version 2.1.16 executables
 Kellee Chrisafulli on Connector Model Status
 D.C. Sessions on SSO Considerations - (ad hoc presentation)

 IBIS MODEL VALIDATION ON LINUX - Syed Huq (National Semiconductor)
 Syed Huq shared his experiences using the Linux operating system on personal
 computers.  This operating system is attractive because it -- along with
 various support utilities -- are free.  As part of IBIS model validation, 
 Syed listed these steps: Visual Inspection, s2iplt, Parser Inspection, and
 Simulation.  IBIS tools can be made available on Linux.  Syed will make 
 available the ibischk2+ Version 2.1.15, and s2ibis2 utilities.  s2iplt can
 be installed by simply changing the perl path to /usr/bin/perl.
 Simulators need to be compiled on Linux to complete the task.

 (This presentation will be uploaded to eda.org.)

 AR - Syed Huq provide Linux executables for uploading to eda.org [DONE]

 SIMULATION TOOL ENHANCEMENTS - Arpad Muranyi (Intel)
 Arpad Muranyi noted that new problems arise from fast buses.  Interconnect
 delays are a major part of the bus clock cycle time.  Reflections, cross
 talk, SSO noise, ring back, ring, etc. can significantly alter interconnect 
 delays.  Arpad noted that RAMBUS and AGP architectures are source-
 synchronous, making skews the most relevant factor.  Source-synchronous
 architecture (where the clock and signal are initiated from the same chip)
 require only that the delays be matched and the skews be minimized.  A large  
 number of simulations are required to deal with length variations, cross 
 talk effects and load mismatch, and these simulations need to be automated.

 Arpad advocates flexible simulator architectures that supports batch mode
 operation and can be controlled by its own programming language.  Arpad
 also supports better graphical display for parameter interaction and 
 statistical plotting of Monte Carlo data.  A number of examples including
 a 3-D presentations illustrated this.

 Arpad also presented some flight time measurement considerations.  The
 test load for which Tco is based is different than the actual load - a
 source of uncertainty.  The tester slope method of specification at the
 receiver (usually 1 V/ns) is used to refine the limits.  Slower waveforms
 at the receiver can create setup violations or conservative flight times.
 measurement enhancements.  Arpad suggested a method to measure flight time
 using the slope specification.
 
 (This presentation may be uploaded to eda.org.)

 A short discussion followed this presentation, in which Larry Barnes 
 mentioned a presentation from the uWave symposium on doing simulation in 
 the frequency domain.  This is supposed to yield faster results.  D.C.
 Sessions also commented that if source synchronous clocking is to become 
 the norm, the industry needed a better/more realistic way to spec input 
 thresholds.

 IBIS EVOLUTION AND ADOPTION (New Presentation) - Will Hobbs (Intel)
 Will Hobbs also supported the notion that models and simulators must keep
 up with technological advances.  Models need to be comprehensive and
 include some subtle effects.  Finally, Will advocates releasing IBIS 
 Version 3.1 along with its parser as soon as possible.  The development
 has already taken too long.  The committee needs to clarify that EIA
 supports semiconductor vendors releasing Version 3.1 level IBIS models.

 Will showed a case study of real problem where a glitch was due to a
 combination of effects.  These effects included SSO interactions for
 specific patterns, coincident reflections, and noise margin erosion
 associated with termination plane noise, routing topology, package routing,
 Vcc bypassing, connector inductance, and sub-optimal ground return path.

 Will questioned whether behavioral simulation has reached its limits.
 If not, then the IBIS needs to push its limits to address emerging needs
 and concerns.

 EDA TOOL SUPPORT FOR VERSION 3.1 (New Item)
 Bob asked the EDA Tool vendors to state what there support plans were for
 Version 3.1 of IBIS.  The responses ranged from future commitment to support
 the features of IBIS Version 3.1 to actual support being phased in.

 A discussion followed on the 'chicken and egg' problem of new models
 and simulators.  Mohammed Hawana (Intel) stated that the simulation
 tools are needed before models are released.  Stephen Peters (Intel)
 and Kellee Crisafulli (Hyperlynx) both countered that for technical and 
 business reasons models must be made available before tools vendors will
 commit to supporting new IBIS features.
 
 BIRD46.1 - RELAXATION OF SOME IBIS FILE NAME RESTRICTIONS
 Bob Ross summarized BIRD46.1 changing the maximum number of characters in a
 file name from 8 to 20 characters for .ibs, .pkg, and .ebd file names.  This
 had been discussed at the previous meeting and everyone had supported this
 change.  Bob called for a vote.
 
 BIRD46.1 was approved without objections.

 BIRD48.3 - ADD SUBMODEL
 BIRD49.2 - ADD SUBMODEL DYNAMIC CLAMPS
 BIRD50.2 - ADD SUBMODEL BUS HOLD
 Bob Ross started the discussion by indicating that he prepared a draft of
 these BIRDs, but did not send them out on the reflector since many IBIS
 individuals would out that week at DAC.  Instead, Bob presented some examples 
 of how the BIRDs would be implemented.

 The first example showed the new syntax using the [Add Submodel] keyword
 under the [Model].  The second column showed submodes 'Non-Driving' and 
 'All' (in place of the reserved word 'NA').  The functionality of the
 referenced submodels would be added to the top-level models from which
 the submodels were called.
 
 The submodel for dynamic clamp operation was illustrated for the Triggered,
 Static, and Clocked modes.  The added submodel adds additional power or
 ground clamps using the [POWER Clamp] and [GND Clamp] keywords.  The 
 Triggered mode showed both the appropriate trigger subparameters and the 
 pulse tables.  The static mode showed the exclusion of the pulse table.  The 
 clocked mode showed the pulse table, but no trigger subparameters.  All 
 examples showed a [Voltage Range] keyword.  Bob noted that the Clocked mode
 was controversial.  It could only be modeled properly by introducing timing
 details with the IBIS format - a direction beyond the scope of IBIS.  The
 actual clocked delays would have to be made relative to a separate clock
 during simulation, and the delays controlled individually for each instance
 of the model in a net.  Arpad Muranyi noted that this was a real operation.
 However, it could be approximated using the Triggered mode with some hard
 work.  In order to move forward, Bob proposed that the Clocked mode would
 not be included in the dynamic clamp proposal.  The mode or a better 
 solution, if found could be added later.

 Bob then illustrated the bus hold operation with [Pullup] and [Pulldown]
 keywords and a [Ramp].  Bob elaborated that while the bus hold structure
 was described, the syntax was also appropriate for other stronger
 termination schemes that were being developed.  D.C. Sessions noted that
 this was an active latching scheme.  In practice a variation with two
 trigger voltages was possible on a single transition.  For a rising
 transition, the first trigger would turn off the pulldown transistor to
 put the submodel in a 3-state mode, and then the second trigger would
 turn on the pullup transistor.  However, D.C. stated that the trigger
 levels (often spread on a 1/3 Vcc and 2/3 Vcc levels) were not significant
 and one approximation level was adequate.  Arpad Muranyi noted that the
 functionality could be used for active termination.  However, the group
 supported that the 'bus hold' name was still appropriate since it was a 
 recognized feature in digital devices.

 In the discussion that followed, Bob listed some Add Submodel issues.  These
 were discussed and the following changes were made:

 (1) [Add Submodel] could be called from Terminator models.  D.C. noted that
     dynamic terminators were a reality.

 (2) The submodel mode entry changed from 'NA' to 'All'.

 (3) The [Voltage Range], [Temperature Range] and reference voltage entries
     are inherited from the top-level model.  These keywords are not allowed
     in a submodel.  This avoids the confusion of which entry takes precedence.
     (The keywords could be entered in as comments to document the voltage
     references that are assumed within the submodel).  This reduces the 
     allowed keywords for a submodel to be [GND Clamp], [POWER Clamp], 
     [Pullup], [Pulldown], [Ramp], [Rising Waveform], [Falling Waveform], 
     and the new keywords for submodel.

 (4) C_comp is not defined for a submodel.  This avoids the problem of deciding
     whether (scattered) submodel entry values are added to the top-level
     C_comp (and if the mode of operation is a concern).  

 (5) Keywords that are not meaningful for the particular application (for
     example, the [Pullup] and [Pulldown] keywords for Dynamic_clamp submodel
     type) would be ignored - similar to how keywords under [Model] are 
     handled.  This was mentioned, but not fully described at the meeting.

 (6) Clocked mode would not be included for dynamic clamps.

 AR - Bob Ross generate revised BIRD48.4, BIRD49.3, and BIRD50.3 with the 
 above changes included [Done].

 AR - Bob Ross upload example files for the above BIRDs.

 BIRD42.3 - MODELING CURRENT WAVEFORMS
 Bob Ross introduced BIRD42.3.  Several people still questioned whether the
 additional current tables provided enough valuable information to justify
 their inclusion.  D.C. Sessions is still requesting a real test case showing
 that BIRD42.3 gives useful information beyond the existing two voltage
 method.  Since we need to decide on this functionality soon, Bob is putting 
 BIRD42.3 for a vote at the next meeting.

 ACTIVITIES OF EIAJ IMIC STANDARD 
 - Norio Matsui (Applied Simulation Technology)
 Norio Matsui provided a comprehensive update on the progress of the
 Electronic Industries Association of Japan (EIAJ) activity on behalf of the 
 I/O Interface Model Project Group and the Electrical Characterization of 
 Semiconductor Packages Project Group.  
 
 Norio illustrated the need and basic ideas under the Interface Model for 
 Integrated Circuit (IMIC) document.  The need is to deal with signal
 integrity (SI), power integrity (PI) and electromagnetic interference (EMI)
 issues.  The IMIC approach is to consider power and ground plane modeling
 using a network description, and a table description for devices extended 
 from Berkeley Spice.  This approach allows flexible equivalent circuitry for
 all types of devices without revealing proprietary information.  Spice to
 IMIC converters are under development.  Also IMIC to IBIS conversion is
 planned.
 
 Norio listed the participants in Project and Package Groups and noted that
 Version 1.1 of IMIC has been released.  The home pages are listed:
 
   http://tsc.eiaj.or.jp
   http://www.eiaj.or.jp
 
 Norio showed good correlation with HSpice analysis and IMIC analysis for a
 48 pin transceiver model with coupled package model pins.
 
 Based on existing density trends, Norio sees packages complexity increasing
 with the number of pins approaching 10,000 around year 2000.
 
 New activities for 1998 include continued evaluation (IMIC vs HSpice, IBIS,
 and measurement), improved modeling technology (slew rate control, current
 flow from Vcc to GND), EMI model, IMIC to IBIS conversion, and more examples
 of packages including a power and ground model.

 CONNECTOR MODELING STATUS (New Item)
 As a new item Kellee Chrisafulli reviewed the IBIS Users Group connector
 model standardization.  Kellee indicated that the group is headed by Fabrizio
 Zanella of EMC and consists of participants from Molex, Teradyne, Berg,
 Ansoft, and Hyperlynx.  The goal is to provide a format that can work with
 Spice and Field solver applications.  Kellee listed a number of points under
 discussion (without elaboration).  The committee is considering (series) 
 cascaded L/R/C sections with coupling using a matrix format.  The connector
 vendors want maximum bandwidth (minimum risetime) information such that EDA
 simulators will issue soft warnings if the limits are exceeded.  The sections
 sections can be extracted from 2-D or 3-D solvers, or by other methods
 such as by LCZ or TDR measurements, with or without an external reference.
 Partial or loop inductances can be formatted.

 Kellee invited others to participate in the weekly discussions.

 SSO CONSIDERATIONS (Ad hoc Presentation) - D.C. Sessions (VLSI Technology)
 D.C. Sessions sketched and showed the equations for estimating SSO effects on
 timing measurements.  His example derived from a real situation showed that
 SSO effects for an 8:1:1 I/O:PWR:GND ration would generate a 1.33ns time
 constant to 63% value.  For a .35u design he showed that the Tco(max) number
 90% changed from 1.9ns without considering SSO to 3.0ns considering SSO -
 30% of the cycle time.

 D.C. noted that currently customers must deal with this the hard way.  s2ibis
 can be used to generate a best case model with no supply inductance for hold
 analysis.  s2ibis can also be used to generate waveforms with SSO power and
 ground inductance (single values multiplied by the number of switching
 stages) to get degraded waveforms.  However, he consider this to be a
 kludge.  D.C finished his presentation by emphasizing the the various
 simulation tools need better support for SSO type simulations.

 (This presentation will be uploaded to eda.org.)

 VERSION 3.1/3.2 AND IBISCHK3 RELEASE PLANS (With Some New Items)
 As a result of the expressed need to get both IBIS Version 3.1 and the
 ibischk3 parser ratified as soon as possible, Bob Ross outlined the following
 plan for discussion:

 The development of the IBISCHK2 parser is effectively done.  We will
 vote at the next meeting to close (freeze) this effort.

 Ratify IBIS Version 3.1 as just a Version 3.0 editorial upgrade consistent
 with the ibischk3 parser work to date.  No recent enhancement BIRD would
 be included since that would result in a parser turn.  Focus on cleaning
 up some specification technical and editorial issues.  This could be done
 by the next meeting.

 Ratify the ibischk3 parser at the next meeting.  Atul Agarwal is ready to
 send ibischk3 Version 3.0.2 immediately after Bob reports back to him on
 some questions.  All the issues raised so far should be resolved.  The
 ibischk3 portion should be in excellent shape.  The ebdchk3 should also have
 all problems and questions resolved, but we should learn more as we get
 experience with real test cases.  The released parser will be designated
 ibischk3 Version 3.1.0.  Bob noted that this release should have one
 executable with the EBD checking initiated with the -ebd flag.

 Move the new enhancement BIRDs in to an IBIS Version 3.2 release and to make
 the corresponding ibischk3 Version 3.2.0 with the new features.  Expect to
 make the release as soon as possible and before the end of the year.

 The technical features moved to the Version 3.2 release are:

   BIRD51 - 3-state_ECL Model Type
   BIRD46.1 - 20 Character File Name Extension
   BIRD48-50 - Add Submodel Extension
   BIRD42.3 - Current Tables (if ratified)
   Any others that are immediately processed

 Bob discussed some technical questions that were raised by Atul during the
 development of the ibischk3 and ebdchk3 parser.  Technically BIRDs would
 need to be generated to resolve these details.  However, the next version
 of the IBIS document would include the committee decisions.  These issues
 were discussed:

 (1)  The pin length name is five characters for the [Pin] keyword and 
      eight characters for the [Pin List] keyword for EBD files.  The ebdchk3
      parser currently test for a five character limit only per some early
      advice.  The committee resolved to keep the Specification as is and
      to ask for a change in the parser code.  [The change will be done].

 (2)  There are some restrictions on the order of certain keywords that are
      assumed in ibischk3 and ebdchk3 testing.  For example, the keywords
      giving the number of entries and list order are presumed to come before
      the actual lists.  This needs to be documented.  The committee resolved
      to accept these practical restrictions and just document them as 
      editorial additions.

 (3)  For EBD files, Fork and Endfork must be on separate lines to avoid some
      ambiguity in detecting some error conditions.  (This would not be
      needed if the other syntax is correct.)  The committee accepted this
      as an editorial change.

 (4)  Similarly, for EBD files the section sequence 'Len = ... /' must all 
      be on one line to avoid some ambiguity in testing for errors.  This 
      restriction was also accepted and will be included as an editorial
      change.

 (5)  As an editorial note, the reserved word 'NC' needs to be listed along
      with the subparameters as entries for EBD files.  It is currently 
      buried in the description.  This can be done as an editorial change.

 (6)  The length limit of the reference designator was not given.  The 
      existing parser sets the limit to five characters based on an early
      recommendation.  However, Bob recommended this be specified as ten
      characters.  This was discussed along with the fact that the reference
      designator syntax is standardized.  Ten characters would allow the
      multiple board numbering systems with the first set of characters to
      correspond do different boards.  Ten characters would also work with
      the just approved BIRD46.1 extending the file name limit to twenty
      characters.  This change was approved.  [The parser will be changed.]

 (7)  Bob asked whether the maximum number of Vgs optional tables under
      the [Series MOSFET] keyword needs to be specified.  Currently the limit
      is set to a very high value of 100.  This will be entered, if needed
      into the Specification.

 (8)  While the [Series MOSFET] keyword was never intended to be used for the
      [Off] condition, this was never prohibited.  The document will not
      prohibit this usage, nor will the parser test for this.

 (9)  BIRD52 - [Driver Schedule] Clarifications:  Bob noted that this is
      really an editorial BIRD that states that [Driver Schedule] is located
      under the [Model] keyword.  Bob expects the substance of BIRD52 to be
      added to the document.

      Also, the comment that an example is needed will be addressed.  So Bob
      plans to have BIRD52 voted on at the next meeting.

 (10) Matthew Flora added that the  [Pin] subparameters R_pin, L_pin and 
      C_pin can be in any order according to the parser tests.  This was
      not clear in the document.  This note can be added.

 As part of the closure and completion of the BIRDs, Bob will generate 
 example files showing how the new BIRDs would be implemented.  These will
 provide more test cases for parser development.  In particular, BIRD48-50
 and the [Driver Schedule] keywords will be illustrated.

 AR - Bob Ross develop and upload example files for the Version 3.1 and
 Version 3.2 IBIS features.

 Regarding Editorial Completion, Stephen Peters volunteered to help in this
 process.  Bob and Matthew will join.  Anyone else is welcome.  We many need
 to meet for a day or so to go over some details.
 
 BIRD44 - Interpretation of min/max/weak/strong Data:  Bob indicated that
 BIRD44 needs to be closed.  No progress has occurred, and the specification
 has advanced so that it may need to be reconstructed.  Bob will put it for
 a vote at the next meeting.

 To summarize, the plan is to resolve all of the open BIRDs at the next
 meeting, to generate a draft Version 3.1 (and Version 3.1e file) for review
 and for voting at the next meeting, to get the latest Version 3.0.2 parser
 code (to be sent shortly) for review, and to ratify it as the Version 3.1.0
 parser at the next meeting.  Work will then continue to include the new
 features in a Version 3.2 IBIS release and a corresponding Version 3.2.0
 parser release.

 AR - Bob Ross upload the Version 3.1e and draft Version 3.1 IBIS document
 for review.

 IBISCHK2+ PARSER PLANS (New Item)
 Chris Rokusek asked what the plans were for ibischk2+.  Bob Ross suggested
 that one final release be generated with all the fixes that could be done
 against existing BUGs.  This would be incorporated in ibischk2+ and also
 in ibischk3.  From that point on only ibischk3 would be maintained.  Note,
 the ibischk2+ code is included in ibischk3.  (Atul Agarwal advises Bob that
 the approved BUG fixes through BUG28 are included in ibischk3 and the 
 ibischk2+ portion of ibischk3.)

 IBIS VERSION 4.0 FEATURES
 Before adjourning, the group listed a number of IBIS model and simulation
 features that might be candidates for IBIS Version 4.0.  This generated
 some discussion.  The features are listed without comment or clarification:

 (1)  Better Input Characterization, also Variable Capacitance
 (2)  Package Model for SSO
 (3)  Supply Distribution Beyond [Pin Mapping]
 (4)  Lead Coupling in Package Group (large K factors)
 (5)  Interface to Structural Models
 (6)  Interface to Equation Description
 (7)  IBIS Models Invoke External Executable (OMI Interface)
 (8)  Connector Models
 (9)  Die in Multiple Packages
 (10) Package Model Extensions for Coupling

 NEXT MEETING:
 The next meeting will be on Friday, July 17, 1998 from 8:00 AM to 10:00 AM.
 Votes are scheduled on the BIRD42.3, BIRD44, BIRD48.4, BIRD49.3, BIRD50.3,
 and BIRD52.1.  Also a ratification vote is scheduled on IBIS Version 3.1.
 The acceptance of the ibischk3 parser will be put to a vote.  Stephen Peters
 will conduct the meeting since Bob will be on vacation.

 ==============================================================================
				       NOTES
 
 IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
	     [email-masked]
	     Modeling Engineer, Interconnectix BU of Mentor Graphics
	     8005 S.W. Boeckman Road, Wilsonville, OR 97070

 VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515
	     [email-masked]
	     Senior Hardware Engineer, Intel Corporation
	     M/S JF1-56
	     2111 NE 25th Ave. 
	     Hillsboro, Oregon 97124-5961

 SECRETARY:  Matthew Flora (425) 869-2320, Fax: (425) 881-1008
	     [email-masked]
	     Senior Engineer, HyperLynx, Inc.
	     17641 NE 67th Court
	     Redmond, WA 98052

 LIBRARIAN:  Jon Powell (805) 988-8250, Fax: (805) 988-8259
	     [email-masked]
	     Senior Scientist, Viewlogic (formerly Quad Design)
	     1385 Del Norte Rd., Camarillo, CA 93010
  
 This meeting was conducted in accordance with the EIA Legal Guides and EIA
 Manual of Organization and Procedure.
 
 The following e-mail addresses are used:

   [email-masked]
       To join, change, or drop from either the IBIS Open Forum Reflector
       ([email-masked]), the IBIS Users' Group Reflector ([email-masked])
       or both.  State your request.

   [email-masked]
       To obtain general information about IBIS, to ask specific questions
       for individual response, and to inquire about joining the EIA-IBIS
       Open Forum as a full Member.

   [email-masked]
       To send a message to the general IBIS Open Forum Reflector.  This
       is used mostly for IBIS Standardization business and future IBIS
       technical enhancements.  Job posting information is not permitted.

   [email-masked]
       To send a message to the IBIS Users' Group Reflector.  This is 
       used mostly for IBIS clarification, current modeling issues, and
       general user concerns.  Job posting information is not permitted.

   [email-masked]
       To report ibischk2 parser bugs.  The Bug Report Form Resides on
       eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.

       To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
       which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, 
       /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
       respectively.

 Information on IBIS technical contents, IBIS participants, and actual
 IBIS models are available on the IBIS Home page found by selecting the
 Electronic Information Group under:

   http://www.eia.org

 Check the pub/ibis directory on eda.org for more information on previous 
 discussions and results.  You can get on via FTP anonymous.
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