Subject: ibis-users V1 #19
From: owner-ibis-users@ (ibis-users)
To: [email-masked]

ibis-users           Thursday, April 3 2003           Volume 01 : Number 019

----------------------------------------------------------------------

Date: Wed, 5 Mar 2003 16:17:44 -0500
From: "Todd Westerhoff" <[email-masked]>
Subject: [IBIS-Users] [Pin Mapping] syntax

Hi all,

If I have a [Pin Mapping] section in an IBIS model, I expect to see the
mapping for an output or bidirectional buffer show something like:

[Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref  power_clamp_ref
A10            GND              VDDQ         GND            VDDQ

... but what about an input pin?  The input pin has no pullup/pulldown
device, so is "NC" the appropriate entry in the first two fields, as in:

[Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref  power_clamp_ref
A11            NC               NC           GND            VDDQ

... or is some other syntax supposed to be used?

Todd.

Todd Westerhoff
High Speed Design Specialist
Cisco Systems
1414 Massachusetts Ave - Boxboro, MA - 01719
email:[email-masked]
ph: 978-936-2149
============================================

"When did the choices get so hard, with so much more at stake?
 Life gets mighty precious when there's less of it to waste"

- - Bonnie Raitt, "Nick of Time"

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------------------------------

Date: Wed, 5 Mar 2003 14:04:20 -0800
From: "Mirmak, Michael" <[email-masked]>
Subject: RE: [IBIS-Users] [Pin Mapping] syntax

Todd,

From the definitions in the IBIS specification plus the latest BIRDs, you have two options:

1) declare the signal pin as you have written it; the pulldown_ref and pullup_ref "NC" entries will be overridden by the clamp column entries

2) declare the signal pin as follows:

[Pin Mapping]  pulldown_ref  pullup_ref  gnd_clamp_ref  power_clamp_ref 
A11               GND           VDDQ 

Your way is, I think, much more clear and is preferable to the second option, but both are allowed.

The spec is written assuming that tools will look first to the pullup_ref and pulldown_ref columns, in the case of signal pins, for information about the power rails of that device, *even if that device is an input buffer.*   

Under IBIS 3.2, you are allowed to have three or five columns of information (three, five or six under 4.1 with BIRD 80).  With only three columns of data, the clamps on an input-only buffer would be connected to the pulldown and pullup references. If connection information is given under all the voltage columns, the clamp reference connections should override any assumptions made by tools about the clamps and the pullup and pulldown references.

I hope this helps!

- - Michael Mirmak, Intel Corp.
 
 -----Original Message-----
From: Todd Westerhoff [mailto:[email-masked]]
Sent: Wednesday, March 05, 2003 1:18 PM
To: [email-masked]
Subject: [IBIS-Users] [Pin Mapping] syntax

Hi all, 
If I have a [Pin Mapping] section in an IBIS model, I expect to see the 
mapping for an output or bidirectional buffer show something like: 
[Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref  power_clamp_ref 
A10            GND              VDDQ         GND            VDDQ 
... but what about an input pin?  The input pin has no pullup/pulldown 
device, so is "NC" the appropriate entry in the first two fields, as in: 
[Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref  power_clamp_ref 
A11            NC               NC           GND            VDDQ 
... or is some other syntax supposed to be used? 
Todd. 
Todd Westerhoff 
High Speed Design Specialist 
Cisco Systems 
1414 Massachusetts Ave - Boxboro, MA - 01719 
email:[email-masked] 
ph: 978-936-2149 
============================================ 
"When did the choices get so hard, with so much more at stake? 
 Life gets mighty precious when there's less of it to waste" 
- - Bonnie Raitt, "Nick of Time" 
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------------------------------

Date: Wed, 5 Mar 2003 14:17:09 -0800
From: "Mirmak, Michael" <[email-masked]>
Subject: RE: [IBIS-Users] [Pin Mapping] syntax

This is a multi-part message in MIME format.

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An addendum to my own message: as "GND" is a reserved word, it's =
preferable to use "GNDBUS" or something similar in the [Pin Mapping] =
signal pin and supply pin declarations.
=20
- - Michael Mirmak, Intel Corp.

- -----Original Message-----
From: Mirmak, Michael=20
Sent: Wednesday, March 05, 2003 2:04 PM
To: Todd Westerhoff; [email-masked]
Subject: RE: [IBIS-Users] [Pin Mapping] syntax

Todd,=20

From the definitions in the IBIS specification plus the latest BIRDs, =
you have two options:=20

1) declare the signal pin as you have written it; the pulldown_ref and =
pullup_ref "NC" entries will be overridden by the clamp column entries

2) declare the signal pin as follows:=20

[Pin Mapping]  pulldown_ref  pullup_ref  gnd_clamp_ref  power_clamp_ref=20
A11               GND           VDDQ=20

Your way is, I think, much more clear and is preferable to the second =
option, but both are allowed.=20

The spec is written assuming that tools will look first to the =
pullup_ref and pulldown_ref columns, in the case of signal pins, for =
information about the power rails of that device, *even if that device =
is an input buffer.*  =20

Under IBIS 3.2, you are allowed to have three or five columns of =
information (three, five or six under 4.1 with BIRD 80).  With only =
three columns of data, the clamps on an input-only buffer would be =
connected to the pulldown and pullup references. If connection =
information is given under all the voltage columns, the clamp reference =
connections should override any assumptions made by tools about the =
clamps and the pullup and pulldown references.

I hope this helps!=20

- - Michael Mirmak, Intel Corp.=20
 =20
 -----Original Message-----=20
From: Todd Westerhoff [ mailto:[email-masked]]=20
Sent: Wednesday, March 05, 2003 1:18 PM=20
To: [email-masked]=20
Subject: [IBIS-Users] [Pin Mapping] syntax=20

Hi all,=20
If I have a [Pin Mapping] section in an IBIS model, I expect to see the=20
mapping for an output or bidirectional buffer show something like:=20
[Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref  =
power_clamp_ref=20
A10            GND              VDDQ         GND            VDDQ=20
... but what about an input pin?  The input pin has no pullup/pulldown=20
device, so is "NC" the appropriate entry in the first two fields, as in: =

[Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref  =
power_clamp_ref=20
A11            NC               NC           GND            VDDQ=20
... or is some other syntax supposed to be used?=20
Todd.=20
Todd Westerhoff=20
High Speed Design Specialist=20
Cisco Systems=20
1414 Massachusetts Ave - Boxboro, MA - 01719=20
email:[email-masked]=20
ph: 978-936-2149=20
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=20
"When did the choices get so hard, with so much more at stake?=20
 Life gets mighty precious when there's less of it to waste"=20
- - Bonnie Raitt, "Nick of Time"=20
|------------------------------------------------------------------=20
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<TITLE>RE: [IBIS-Users] [Pin Mapping] syntax</TITLE>

<META content=3D"MSHTML 6.00.2800.1106" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D552471522-05032003><FONT face=3DArial color=3D#0000ff =
size=3D2>An=20
addendum to my own message: as "GND" is a reserved word, =
it's&nbsp;preferable to=20
use "GNDBUS" or something similar in the [Pin Mapping] signal pin and =
supply pin=20
declarations.</FONT></SPAN></DIV>
<DIV><SPAN class=3D552471522-05032003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D552471522-05032003><FONT face=3DArial color=3D#0000ff =
size=3D2>-=20
Michael Mirmak, Intel Corp.</FONT></SPAN></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
  <DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
  size=3D2>-----Original Message-----<BR><B>From:</B> Mirmak, Michael=20
  <BR><B>Sent:</B> Wednesday, March 05, 2003 2:04 PM<BR><B>To:</B> Todd=20
  Westerhoff; [email-masked]<BR><B>Subject:</B> RE: [IBIS-Users] =
[Pin=20
  Mapping]=20
  syntax<BR><BR></FONT></DIV><!-- Converted from text/plain format =
- --><BR>
  <P><FONT size=3D2>Todd,</FONT> </P>
  <P><FONT size=3D2>From the definitions in the IBIS specification plus =
the latest=20
  BIRDs, you have two options:</FONT> </P>
  <P><FONT size=3D2>1) declare the signal pin as you have written it; =
the=20
  pulldown_ref and pullup_ref "NC" entries will be overridden by the =
clamp=20
  column entries</FONT></P>
  <P><FONT size=3D2>2) declare the signal pin as follows:</FONT> </P>
  <P><FONT size=3D2>[Pin Mapping]&nbsp; pulldown_ref&nbsp; =
pullup_ref&nbsp;=20
  gnd_clamp_ref&nbsp; power_clamp_ref </FONT><BR><FONT=20
  =
size=3D2>A11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;=20
  GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; VDDQ=20
  </FONT></P>
  <P><FONT size=3D2>Your way is, I think, much more clear and is =
preferable to the=20
  second option, but both are allowed.</FONT> </P>
  <P><FONT size=3D2>The spec is written assuming that tools will look =
first to the=20
  pullup_ref and pulldown_ref columns, in the case of signal pins, for=20
  information about the power rails of that device, *even if that device =
is an=20
  input buffer.*&nbsp;&nbsp; </FONT></P>
  <P><FONT size=3D2>Under IBIS 3.2, you are allowed to have three or =
five columns=20
  of information (three, five or six under 4.1 with BIRD 80).&nbsp; With =
only=20
  three columns of data, the clamps on an input-only buffer would be =
connected=20
  to the pulldown and pullup references. If connection information is =
given=20
  under all the voltage columns, the clamp reference connections should =
override=20
  any assumptions made by tools about the clamps and the pullup and =
pulldown=20
  references.</FONT></P>
  <P><FONT size=3D2>I hope this helps!</FONT> </P>
  <P><FONT size=3D2>- Michael Mirmak, Intel Corp.</FONT> <BR><FONT=20
  size=3D2>&nbsp;</FONT> <BR><FONT size=3D2>&nbsp;-----Original =
Message-----</FONT>=20
  <BR><FONT size=3D2>From: Todd Westerhoff [<A=20
  =
href=3D"mailto:[email-masked]">mailto:[email-masked]</A>]</FONT> =

  <BR><FONT size=3D2>Sent: Wednesday, March 05, 2003 1:18 PM</FONT> =
<BR><FONT=20
  size=3D2>To: [email-masked]</FONT> <BR><FONT size=3D2>Subject: =
[IBIS-Users]=20
  [Pin Mapping] syntax</FONT> </P><BR>
  <P><FONT size=3D2>Hi all, </FONT><BR><FONT size=3D2>If I have a [Pin =
Mapping]=20
  section in an IBIS model, I expect to see the </FONT><BR><FONT =
size=3D2>mapping=20
  for an output or bidirectional buffer show something like: =
</FONT><BR><FONT=20
  size=3D2>[Pin Mapping]&nbsp; pulldown_ref&nbsp;&nbsp;&nbsp;&nbsp;=20
  pullup_ref&nbsp;&nbsp; gnd_clamp_ref&nbsp; power_clamp_ref =
</FONT><BR><FONT=20
  =
size=3D2>A10&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;=20
  =
GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;=20
  VDDQ&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
  GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
VDDQ=20
  </FONT><BR><FONT size=3D2>... but what about an input pin?&nbsp; The =
input pin=20
  has no pullup/pulldown </FONT><BR><FONT size=3D2>device, so is "NC" =
the=20
  appropriate entry in the first two fields, as in: </FONT><BR><FONT =
size=3D2>[Pin=20
  Mapping]&nbsp; pulldown_ref&nbsp;&nbsp;&nbsp;&nbsp; =
pullup_ref&nbsp;&nbsp;=20
  gnd_clamp_ref&nbsp; power_clamp_ref </FONT><BR><FONT=20
  =
size=3D2>A11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;=20
  =
NC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;=20
  NC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
  GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
VDDQ=20
  </FONT><BR><FONT size=3D2>... or is some other syntax supposed to be =
used?=20
  </FONT><BR><FONT size=3D2>Todd. </FONT><BR><FONT size=3D2>Todd =
Westerhoff=20
  </FONT><BR><FONT size=3D2>High Speed Design Specialist =
</FONT><BR><FONT=20
  size=3D2>Cisco Systems </FONT><BR><FONT size=3D2>1414 Massachusetts =
Ave - Boxboro,=20
  MA - 01719 </FONT><BR><FONT size=3D2>email:[email-masked] =
</FONT><BR><FONT=20
  size=3D2>ph: 978-936-2149 </FONT><BR><FONT=20
  =
size=3D2>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
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</FONT><BR><FONT=20
  size=3D2>"When did the choices get so hard, with so much more at =
stake?=20
  </FONT><BR><FONT size=3D2>&nbsp;Life gets mighty precious when there's =
less of=20
  it to waste" </FONT><BR><FONT size=3D2>- Bonnie Raitt, "Nick of Time"=20
  </FONT><BR><FONT=20
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------------------------------

Date: Wed, 5 Mar 2003 18:46:52 -0500
From: "Todd Westerhoff" <[email-masked]>
Subject: RE: [IBIS-Users] [Pin Mapping] syntax

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RE: [IBIS-Users] [Pin Mapping] syntaxThanks for the feedback.  The original
model hadn't used the reserved keyword GND, I made the mistake when altering
the pin names for posting.

Thanks for pointing out that the

A11               GND           VDDQ

syntax - though bizarre, is allowed.

Todd.

Todd Westerhoff
High Speed Design Specialist
Cisco Systems
1414 Massachusetts Ave - Boxboro, MA - 01719
email:[email-masked]
ph: 978-936-2149
============================================

"When did the choices get so hard, with so much more at stake?
 Life gets mighty precious when there's less of it to waste"

- - Bonnie Raitt, "Nick of Time"

  -----Original Message-----
  From: [email-masked] [mailto:[email-masked]]On Behalf
Of Mirmak, Michael
  Sent: Wednesday, March 05, 2003 5:17 PM
  To: Todd Westerhoff; [email-masked]
  Subject: RE: [IBIS-Users] [Pin Mapping] syntax

  An addendum to my own message: as "GND" is a reserved word, it's
preferable to use "GNDBUS" or something similar in the [Pin Mapping] signal
pin and supply pin declarations.

  - Michael Mirmak, Intel Corp.
    -----Original Message-----
    From: Mirmak, Michael
    Sent: Wednesday, March 05, 2003 2:04 PM
    To: Todd Westerhoff; [email-masked]
    Subject: RE: [IBIS-Users] [Pin Mapping] syntax

    Todd,

    From the definitions in the IBIS specification plus the latest BIRDs,
you have two options:

    1) declare the signal pin as you have written it; the pulldown_ref and
pullup_ref "NC" entries will be overridden by the clamp column entries

    2) declare the signal pin as follows:

    [Pin Mapping]  pulldown_ref  pullup_ref  gnd_clamp_ref  power_clamp_ref
    A11               GND           VDDQ

    Your way is, I think, much more clear and is preferable to the second
option, but both are allowed.

    The spec is written assuming that tools will look first to the
pullup_ref and pulldown_ref columns, in the case of signal pins, for
information about the power rails of that device, *even if that device is an
input buffer.*

    Under IBIS 3.2, you are allowed to have three or five columns of
information (three, five or six under 4.1 with BIRD 80).  With only three
columns of data, the clamps on an input-only buffer would be connected to
the pulldown and pullup references. If connection information is given under
all the voltage columns, the clamp reference connections should override any
assumptions made by tools about the clamps and the pullup and pulldown
references.

    I hope this helps!

    - Michael Mirmak, Intel Corp.

     -----Original Message-----
    From: Todd Westerhoff [mailto:[email-masked]]
    Sent: Wednesday, March 05, 2003 1:18 PM
    To: [email-masked]
    Subject: [IBIS-Users] [Pin Mapping] syntax

    Hi all,
    If I have a [Pin Mapping] section in an IBIS model, I expect to see the
    mapping for an output or bidirectional buffer show something like:
    [Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref
power_clamp_ref
    A10            GND              VDDQ         GND            VDDQ
    ... but what about an input pin?  The input pin has no pullup/pulldown
    device, so is "NC" the appropriate entry in the first two fields, as in:
    [Pin Mapping]  pulldown_ref     pullup_ref   gnd_clamp_ref
power_clamp_ref
    A11            NC               NC           GND            VDDQ
    ... or is some other syntax supposed to be used?
    Todd.
    Todd Westerhoff
    High Speed Design Specialist
    Cisco Systems
    1414 Massachusetts Ave - Boxboro, MA - 01719
    email:[email-masked]
    ph: 978-936-2149
    ============================================
    "When did the choices get so hard, with so much more at stake?
     Life gets mighty precious when there's less of it to waste"
    - Bonnie Raitt, "Nick of Time"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>RE: [IBIS-Users] [Pin Mapping] syntax</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D911354423-05032003>Thanks=20
for the feedback.&nbsp; The original model hadn't used the reserved =
keyword=20
GND,&nbsp;I made the mistake when altering the&nbsp;pin names=20
for&nbsp;posting.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D911354423-05032003></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D911354423-05032003>Thanks=20
for pointing out that the&nbsp;&nbsp; </SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D911354423-05032003></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT size=3D2><SPAN=20
class=3D911354423-05032003>A11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; VDDQ=20
</SPAN></FONT></DIV>
<DIV><FONT size=3D2><SPAN =
class=3D911354423-05032003></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D911354423-05032003><SPAN=20
class=3D911354423-05032003>syntax - though bizarre, is=20
allowed.</SPAN></SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D911354423-05032003><SPAN=20
class=3D911354423-05032003></SPAN></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D911354423-05032003><SPAN=20
class=3D911354423-05032003>Todd.</SPAN></SPAN></FONT></DIV>
<DIV><FONT size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT size=3D2>Todd Westerhoff<BR>High Speed Design =
Specialist<BR>Cisco=20
Systems<BR>1414 Massachusetts Ave - Boxboro, MA -=20
01719<BR>email:[email-masked]<BR>ph:=20
978-936-2149<BR>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
<BR><BR>"When did=20
the choices get so hard, with so much more at stake?<BR>&nbsp;Life gets =
mighty=20
precious when there's less of it to waste"<BR><BR>- Bonnie Raitt, "Nick =
of=20
Time"<BR></DIV></FONT>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
  <DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
  size=3D2>-----Original Message-----<BR><B>From:</B> =
[email-masked]=20
  [mailto:[email-masked]]<B>On Behalf Of </B>Mirmak,=20
  Michael<BR><B>Sent:</B> Wednesday, March 05, 2003 5:17 =
PM<BR><B>To:</B> Todd=20
  Westerhoff; [email-masked]<BR><B>Subject:</B> RE: [IBIS-Users] =
[Pin=20
  Mapping] syntax<BR><BR></FONT></DIV>
  <DIV><SPAN class=3D552471522-05032003><FONT face=3DArial =
color=3D#0000ff size=3D2>An=20
  addendum to my own message: as "GND" is a reserved word, =
it's&nbsp;preferable=20
  to use "GNDBUS" or something similar in the [Pin Mapping] signal pin =
and=20
  supply pin declarations.</FONT></SPAN></DIV>
  <DIV><SPAN class=3D552471522-05032003><FONT face=3DArial =
color=3D#0000ff=20
  size=3D2></FONT></SPAN>&nbsp;</DIV>
  <DIV><SPAN class=3D552471522-05032003><FONT face=3DArial =
color=3D#0000ff size=3D2>-=20
  Michael Mirmak, Intel Corp.</FONT></SPAN></DIV>
  <BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
    <DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
    size=3D2>-----Original Message-----<BR><B>From:</B> Mirmak, Michael=20
    <BR><B>Sent:</B> Wednesday, March 05, 2003 2:04 PM<BR><B>To:</B> =
Todd=20
    Westerhoff; [email-masked]<BR><B>Subject:</B> RE: [IBIS-Users] =
[Pin=20
    Mapping] syntax<BR><BR></FONT></DIV><!-- Converted from text/plain =
format --><BR>
    <P><FONT size=3D2>Todd,</FONT> </P>
    <P><FONT size=3D2>From the definitions in the IBIS specification =
plus the=20
    latest BIRDs, you have two options:</FONT> </P>
    <P><FONT size=3D2>1) declare the signal pin as you have written it; =
the=20
    pulldown_ref and pullup_ref "NC" entries will be overridden by the =
clamp=20
    column entries</FONT></P>
    <P><FONT size=3D2>2) declare the signal pin as follows:</FONT> </P>
    <P><FONT size=3D2>[Pin Mapping]&nbsp; pulldown_ref&nbsp; =
pullup_ref&nbsp;=20
    gnd_clamp_ref&nbsp; power_clamp_ref </FONT><BR><FONT=20
    =
size=3D2>A11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;=20
    GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; VDDQ =

    </FONT></P>
    <P><FONT size=3D2>Your way is, I think, much more clear and is =
preferable to=20
    the second option, but both are allowed.</FONT> </P>
    <P><FONT size=3D2>The spec is written assuming that tools will look =
first to=20
    the pullup_ref and pulldown_ref columns, in the case of signal pins, =
for=20
    information about the power rails of that device, *even if that =
device is an=20
    input buffer.*&nbsp;&nbsp; </FONT></P>
    <P><FONT size=3D2>Under IBIS 3.2, you are allowed to have three or =
five=20
    columns of information (three, five or six under 4.1 with BIRD =
80).&nbsp;=20
    With only three columns of data, the clamps on an input-only buffer =
would be=20
    connected to the pulldown and pullup references. If connection =
information=20
    is given under all the voltage columns, the clamp reference =
connections=20
    should override any assumptions made by tools about the clamps and =
the=20
    pullup and pulldown references.</FONT></P>
    <P><FONT size=3D2>I hope this helps!</FONT> </P>
    <P><FONT size=3D2>- Michael Mirmak, Intel Corp.</FONT> <BR><FONT=20
    size=3D2>&nbsp;</FONT> <BR><FONT size=3D2>&nbsp;-----Original=20
    Message-----</FONT> <BR><FONT size=3D2>From: Todd Westerhoff [<A=20
    =
href=3D"mailto:[email-masked]">mailto:[email-masked]</A>]</FONT> =

    <BR><FONT size=3D2>Sent: Wednesday, March 05, 2003 1:18 PM</FONT> =
<BR><FONT=20
    size=3D2>To: [email-masked]</FONT> <BR><FONT size=3D2>Subject: =
[IBIS-Users]=20
    [Pin Mapping] syntax</FONT> </P><BR>
    <P><FONT size=3D2>Hi all, </FONT><BR><FONT size=3D2>If I have a [Pin =
Mapping]=20
    section in an IBIS model, I expect to see the </FONT><BR><FONT=20
    size=3D2>mapping for an output or bidirectional buffer show =
something like:=20
    </FONT><BR><FONT size=3D2>[Pin Mapping]&nbsp;=20
    pulldown_ref&nbsp;&nbsp;&nbsp;&nbsp; pullup_ref&nbsp;&nbsp;=20
    gnd_clamp_ref&nbsp; power_clamp_ref </FONT><BR><FONT=20
    =
size=3D2>A10&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;=20
    =
GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;=20
    VDDQ&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
    =
GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
VDDQ=20
    </FONT><BR><FONT size=3D2>... but what about an input pin?&nbsp; The =
input pin=20
    has no pullup/pulldown </FONT><BR><FONT size=3D2>device, so is "NC" =
the=20
    appropriate entry in the first two fields, as in: </FONT><BR><FONT=20
    size=3D2>[Pin Mapping]&nbsp; pulldown_ref&nbsp;&nbsp;&nbsp;&nbsp;=20
    pullup_ref&nbsp;&nbsp; gnd_clamp_ref&nbsp; power_clamp_ref =
</FONT><BR><FONT=20
    =
size=3D2>A11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;=20
    =
NC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;=20
    NC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
    =
GND&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
VDDQ=20
    </FONT><BR><FONT size=3D2>... or is some other syntax supposed to be =
used?=20
    </FONT><BR><FONT size=3D2>Todd. </FONT><BR><FONT size=3D2>Todd =
Westerhoff=20
    </FONT><BR><FONT size=3D2>High Speed Design Specialist =
</FONT><BR><FONT=20
    size=3D2>Cisco Systems </FONT><BR><FONT size=3D2>1414 Massachusetts =
Ave -=20
    Boxboro, MA - 01719 </FONT><BR><FONT =
size=3D2>email:[email-masked]=20
    </FONT><BR><FONT size=3D2>ph: 978-936-2149 </FONT><BR><FONT=20
    =
size=3D2>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
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</FONT><BR><FONT=20
    size=3D2>"When did the choices get so hard, with so much more at =
stake?=20
    </FONT><BR><FONT size=3D2>&nbsp;Life gets mighty precious when =
there's less of=20
    it to waste" </FONT><BR><FONT size=3D2>- Bonnie Raitt, "Nick of =
Time"=20
    </FONT><BR><FONT=20
    =
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------------------------------

Date: Fri, 07 Mar 2003 10:38:39 +0100
From: Gaspard Thaller <[email-masked]>
Subject: [IBIS-Users] Operating conditions and sweep ranges

Hello all,

All I/V curves of an IBIS model are generated for a given voltage swing 
range, depending on the rail power supply value.
That is [-Vcc, 2Vcc] for [Pulldown] and [Pullup] tables, [Vcc, 2Vcc] for 
[Power Clamp], etc...
The sweep range is defined as a single variable in s2ibis2 C source 
code, and the tables are all given for the same voltage swing (mainly 
based on typical voltage values), without regard to the voltage 
variations due to operating conditions (min, max).
I mean you got Vcc(typ), Vcc(min), Vcc(max), it should define a 
different voltage swing value for each operating condition.
What does the IBIS spec says about that?
Are all s2ibis2 simulations done with the same voltage swing values?
How are the current data gathered and grouped under the same sweep 
range, when the sweep ranges are supposed to be different?
I hope I made myself clear.

Gaspard

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------------------------------

Date: Fri, 7 Mar 2003 09:09:06 -0800
From: "Muranyi, Arpad" <[email-masked]>
Subject: [IBIS-Users] RE: [IBIS] Operating conditions and sweep ranges

Gaspard,

The problem is that the IBIS specification was not written well enough
to define and get this detail clearly across.  There is also another
rule that says that none of the tables can have NA as their first or
last data point.  So if you sweep strictly according to the -Vcc to
2Vcc rule, you would end up with NAs in the typical and minimum curves.
What this means is that you have to sweep each case across the same range.

You have two choices:  You can sweep all cases with the maximum supply
values that will extend the range for the typ and min slightly, or just
go with the typ supply value which cuts the max a little short, and adds
to the min case a bit.  I wouldn't recommend to use the min supply value,
because that is cutting both typ and max curves short.

Another area that the spec overlooked is that there are cases when the
signal swing is much smaller than the rail voltages, as in GTL, DDR, LVDS,
etc.  For example, we can have a GTL signal that swings from about 0.4
to 1.5 volts, while its supply is 3.3 volts.

The reason the -Vcc to 2Vcc rule was established is based on the reflection
phenomena of T-lines.  If you have a full reflection, the signal doubles
at the unterminated end.  We wanted to make sure that the IV curves cover
the entire signaling range.  So if you double the signal of a CMOS buffer
that switches rail to rail, then provided that your buffer is strong enough
to launch a rail to rail incident wave (i.e. it is a superconductor) than
doubling that wave you could have a signal at the end of the (lossless)
T-line that could reach -Vcc or 2Vcc.  These are the extreme possible
values which will actually never happen for obvious reasons.

Now, going back to a low voltage swing buffer, like the GTL example above,
you really shouldn't have to cover -Vcc to 2Vcc (-3.3 to 6.6 V), because
based on the signaling levels you would see at most -1.5 to 3.0 V if it
was an unterminated system, but GTL is actually parallel terminated, so
you would probably never even see that much.

Even though the spec says -Vcc to 2Vcc, the IBIS checker program doesn't
reject models (as far as I know) if you don't cover that range exactly.
I usually recommend that the range should make sense based on the argument
I described here that considers the signal swing as the decision factor.

I hope this helps,

Arpad Muranyi
Intel Corporation
============================================================================

- -----Original Message-----
From: Gaspard Thaller [mailto:[email-masked]]
Sent: Friday, March 07, 2003 1:39 AM
To: [email-masked]; [email-masked]
Subject: [IBIS] Operating conditions and sweep ranges

Hello all,

All I/V curves of an IBIS model are generated for a given voltage swing 
range, depending on the rail power supply value.
That is [-Vcc, 2Vcc] for [Pulldown] and [Pullup] tables, [Vcc, 2Vcc] for 
[Power Clamp], etc...
The sweep range is defined as a single variable in s2ibis2 C source 
code, and the tables are all given for the same voltage swing (mainly 
based on typical voltage values), without regard to the voltage 
variations due to operating conditions (min, max).
I mean you got Vcc(typ), Vcc(min), Vcc(max), it should define a 
different voltage swing value for each operating condition.
What does the IBIS spec says about that?
Are all s2ibis2 simulations done with the same voltage swing values?
How are the current data gathered and grouped under the same sweep 
range, when the sweep ranges are supposed to be different?
I hope I made myself clear.

Gaspard

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------------------------------

Date: Mon, 10 Mar 2003 09:09:27 -0700
From: rrwolff <[email-masked]>
Subject: [IBIS-Users] [IBIS] Open forum minutes (03/07/03)

DATE: 03/10/03

SUBJECT: March 7, 2003 EIA IBIS Open Forum Meeting Minutes

VOTING MEMBERS AND 2003 PARTICIPANTS LIST:
Ansoft Corporation             (Eric Bracken)
Apple Computer                 Kim Helliwell
Applied Simulation Technology  Fred Balistreri
Cadence Design                 Lynne Green* 
Cisco Systems                  Syed Huq, Val Mandruson, Hung Pham 
Cypress Semiconductor          (Rajesh Manapat)
Huawei Technologies            (Jiang Xiang Zhong)
IBM                            (Pravin Patel)
Intel Corporation              Stephen Peters*, Michael Mirmak*,
                               Arpad Muranyi*
LSI Logic                      Frank Gasparik*
Matsushita (Panasonic)         Atsuji Ito
Mentor Graphics                Bob Ross*, Ian Dodd, Guy de Burgh*,
                               John Angulo*, Mike Donnelly, Weston Beal
Micron Technology              Randy Wolff*
Mitsubishi                     (Pat Hefferan)
Molex Incorporated             Gus Panella
Motorola                       (Rick Kingen)
National Semiconductor         Milt Schwartz, Tim Coyle
NEC Electric Corporation       (Itsuki Yamada)
North East Systems Associates  Edward Sayre 
Philips Semiconductor          (D.C. Sessions)
Quantic EMC                    (Mike Ventham)
Siemens (& Automotive) AG      Eckhard Lenski
Signal Integrity Software      (Bob Haller), Barry Katz, Doug Burns
Sigrity                        Raj Raghuram
SiQual                         (Rob Hinz)
Texas Instruments              Thomas Fisher
Teraspeed                      Scott McMorrow, Tom Dagostino,
                               Kevin Simpson
Time Domain Analysis Systems   Dima Smolyansky, Steve Corey
Via Technologies               (Weber Chuang)
Zuken (& Incases)              (Michael Schaeder)

OTHER PARTICIPANTS IN 2003:
Brocade                        Frank Yuan, Yongrue Yu
Conexant                       Gary Felker
EMC Corporation                Brian Arsenault
Fujitsu                        Tadashi Arai
GEIA                           (Chris Denham)
Hitachi ULSI Systems           Kazuyoshi Shoji
Independent                    Kelly Green
Marvell Semiconductor          Itzik Peleg*
NetLogic Microsystems          Eric Hsu
Plexus                         Joseph Socha
Xilinx                         Susan Wu

In the list above, attendees at the meeting are indicated by *.  Principal
members or other active members who have not attended are in parentheses. 
Participants who no longer are in the organization are in square brackets.

Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are 
as follows:

  Date                Bridge Number    Reservation #    Passcode
  March 28, 2003      (916) 356-2663       4            1471937

All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas 
out 7 days before each Open Forum, and meeting minutes out within 7 days 
after.  When you call into the meeting, ask for the IBIS Open Forum hosted 
by Stephen Peters and give the reservation number and passcode.

NOTE: "AR" = Action Required.

- -------------------------------- MINUTES -----------------------------------
INTRODUCTIONS AND MEETING QUORUM
Itzik Peleg from Marvell Semiconductor in Israel introduced himself. Itzik
is a signal integrity engineer who both uses and creates IBIS models and
is interested in tracking IBIS modeling developments.

Stephen Peters noted that the European IBIS Summit Meeting was held in 
Munich, Germany earlier on Friday, March 7, 2003.

Bob Ross mentioned that John Angulo is taking over as the primary 
representative from Mentor Graphics. Bob plans to leave Mentor, but he 
expects to become active in the future with a new affiliation.

CALL FOR PATENTS
Stephen Peters called for any patents or pending patents related to the IBIS 
Version 4.0 Standard. No companies declared a patent.

MEMBERSHIP UPDATE AND TREASURER'S REPORT
Stephen Peters reported that, at last report, the EIA has received a total
of eight IBIS dues payments for the year out of 35 companies invoiced. 
However, Stephen noted that the last update was in mid January, so the
total may have increased. Stephen is working with the EIA to obtain the
latest ledger reports. Stephen also noted that he has not received a final
2002 financial report.

REVIEW OF MINUTES AND AR'S
The minutes of February 14, 2003 were approved without comment.

ARs will be discussed during the meeting.

MISCELLANY/ANNOUNCEMENTS
None.

PRESS AND WEB PAGE UPDATES
Stephen Peters reported that Syed Huq is making ongoing IBIS roster
updates. 

NEW MODELS AVAILABLE, LIBRARY UPDATE
No new models reported.

OPENS FOR NEW ISSUES
None.

INTERNATIONAL/EXTERNAL PROGRESS
- - IEC 62014-3 (ICEM) Integrated Circuit Electromagnetic Model Proposal
  (formerly, IEC 93/67/NP IBIS and EMC Simulation) - No report.
- - JEDEC Activity Report. Lynne Green commented that people can still sign
  up for the following IBIS Modeling class at the JEDEX conference on
  March 24, 2003

     http://www.jedex.org/  

  Lynne is presenting two seminars. Seminar A is entitled "An Introduction
  to IBIS Models and Model Validation." Seminar B is called "IBIS Models
  for High-Speed Interfaces."

  The cost is $349 for members of JEDEC and $399 for non-members.

DATE2003 EUROPEAN IBIS SUMMIT MEETING REPORT
Bob Ross reported that he had received an e-mail from a participant stating 
that the IBIS summit meeting was a success.  Stephen stated that he will
add a report on the meeting to the March 28, 2003 teleconference agenda. In
the mean time, minutes will be published and will be available on the IBIS 
web page at the following URL:

  http://www.eda.org/pub/ibis/summits/mar03/

DAC2003 AND DESIGNCON2003 EAST MEETING PROPOSALS
Stephen Peters reported that planning for an IBIS summit meeting at
Designcon2003 East in Boston continues. Stephen has signed the contract
with the DesignCon officials, and a date of June 23, 2003 has been selected.
Stephen noted that we will co-sponsor DesignCon2003 East. The next step 
will be to confirm a meeting room at the hotel. Stephen mentioned that we
have traded refreshments for a telephone line so that the meeting can be
web telecast.

Planning also continues for an IBIS summit at the Design Automation 
Conference (DAC) on Thursday, June 5 2003 in Anahiem California. Stephen 
stated that this meeting costs about $2000, and if we do not meet our
membership goals for this year we may be forced to cancel this summit. 
Stephen asked that any companies interested in co-sponsoring the event
please contact him. Bob Ross and John Angulo will work together to reserve
a room for IBIS at the Marriot Hotel in Anaheim. Bob Ross noted that 
presentations given at the DAC summit can be presented again at the
DesignCon East summit in Boston.

IBIS VERSION 4.0 PARSER FUNDING AND STATUS
Stephen Peters reported that the EIA has received IBIS 4.0 parser payments 
from two companies, and verbal confirmation that one more company has paid.
Five more companies have indicated that they are processing the paperwork.
Stephen is working with EIA to get updated numbers.

IBIS QUALITY COMMITTEE
Lynne Green reported that the IBIS Quality Committee met on February 25, 
2003 and will meet again on March 11, 2003. Lynne stated that the quality 
committee continues to review the quality documentation before release to
the forum.  Lynne noted that the review is going more slowly than expected.

IBIS MODEL REVIEW COMMITTEE
Lynne Green reported no new models to review. Lynne confirmed with Bob Ross 
that John Angulo will replace Bob on the model review committee.

NEW ADMINISTRATIVE ISSUES
None.

IBIS FUTURES AND CONNECTOR WORKING GROUP REPORT
Stephen Peters reported that the IBIS futures and connector working group 
met February 21, 2003 and again on February 28, 2003 to resolve the issues 
raised by Michael Mirmak and Kelly Green and captured at the January 2003 
Summit Meeting.  All the technical and editorial issues have been resolved,
and Michael Mirmak is working to incorporate the changes into a revised
draft specification.  The futures and connector working group will review
the final document at the next connector meeting before forwarding the 
revised specification to the IBIS Open Forum. 

Stephen also reported that Kelly Green, the ICM parser developer, is waiting
for a final version of the ICM specification before releasing an alpha 
version of the parser.  Kelly expects two weeks of testing before releasing
a beta version.

Stephen also reported that Lynne Green has offered to act as a 'gatekeeper' 
for the ICM parser.  A gatekeeper is required as the ICM parser code will
be open source. During the discussion on gatekeeper responsibilities, 
Guy de Burgh offered to assist Lynne in code compilation on Solaris and HP
platforms. 

Bob Ross and Michael Mirmak asked if a separate bug reporting structure 
would be set up to report ICM parser bugs. After a short discussion, the 
consensus was reached to set up an ICM bug reporting list separate
from the existing IBIS parser bug list.

BIRD74.2 - EMI Parameters
BIRD79 - Non-linear buffer impedance (extension to C_comp) 
Stephen Peters opened discussion by noting that action has been deferred on
these BIRDS. Previous discussions have indicated that the modeling issues
addressed by these BIRDS are best covered by the multi-lingual modeling
extensions. Stephen proposed an up or down vote on BIRD74.2 and BIRD79 at
the next teleconference. Arpad Muranyi asked what options exist for 
capturing the information contained in BIRD 79 if it is rejected. Stephen
recommends that a white paper be written that captures the method for 
modeling complex output impedance. Arpad agrees and remarked that future
technical enhancements to the IBIS specification will focus more on 
documenting modeling techniques (equations, etc.) rather than BIRDS. Bob
Ross suggested expanding the IBIS cookbook to include this information.
Arpad pointed out that some of the modeling techniques may go into more
detail and depth than usually placed in the cookbook.

Finally, Bob pointed out that BIRD74 is really an extension of IBIS into a
new area rather than a technical enhancement, and the strategy for
documenting BIRD74.2 might be different.  Bob also suggested that the BIRD 
authors should suggest alternate ways of documenting the ideas encompassed 
by BIRD74 if it is indeed rejected. 

Stephen will schedule a vote on BIRDS74.2 and BIRD79 at the March 28, 2003 
teleconference meeting.

IBISCHK3 & BUG TRACKING STATUS
Stephen Peters noted that there are 12 open bugs against the current parser.
Of these 12 bugs, two of them (BUG75 and BUG76) have a code fix supplied. In
addition, BUG68 requires only a straightforward message change from 'error'
to 'warning'. Stephen will ask Atual Argarwal if he can incorporate these
three bug fixes into the IBIS 4.0 code as part of the IBIS 4.0 code 
delivery. 

As for the remaining BUGS, three BUGS (BUG71, BUG74 and BUG78) are still 
being discussed and no final resolution has been reached. This leaves 
five bugs that require investigation into a proposed fix. These bug
are as follows:

- - BUG68, False messages with repeated voltages. John Angulo agreed to look
  into a proposed fix for this bug.

- - BUG70, [Model Selector] fails for [Series Pin Mapping] Models. Michael 
  Mirmak agreed to look into a proposed fix for this bug

- - BUG72, Tab warning message promotion. No person assigned.
 
- - BUG73, Extreme Non-monotonic I-V tables cause end point test to fail. As
  this bug may be related to BUG68, John Angulo agreed to look into this
  bug also.

- - BUG77, Test for Series* Models in [Pin] error - Michael Mirmak agreed to
  investigate this bug and propose a fix.

It was noted that BUG70 and BUG77 are specification violation bugs, and so 
are the ones we most want to fix in the IBIS 3.2 parser and propagate into
the IBIS4.0 parser.

- - BUG71 - Monotonic Checking for Combined I-V Tables
  Bob Ross has been discussing the clarification of I-V table combinations 
  with Bob Haller. Stephen will post Bob Haller's response to the reflector
  for discussion and resolution at the next teleconference. The current
  thinking is that changing the non-monotonic checks to check the summed 
  curves is the proper thing to do. In response to a question, Stephen Peters 
  mentioned that these proposed checks would replace the existing 
  non-monotonic checks.  

- - BUG74 - Missing Timing Test Load Warning Messages
  Greg Edlund has updated this bug with clarification of assumed default
  values for Cref, Vref, etc.  Further action is postponed until the 
  rest of the Open Forum has had a chance to review the contents of the
  bug report. Stephen will post the clarification to the IBIS reflector for
  discussion and disposition at the next teleconference.

- - BUG78 - Clamp Current Double Counting Test
  Bob Ross mentioned that BUG78 has not yet been classified because it
  contains a general problem, but no recommended proposal.  Bob does not
  expect any further work on it. Bob suggests we classify it as Enhancement,
  LOW, and WILL NOT FIX.  A new BUG report could be filed if the problem
  needs to be raised again. 

NEW TOPIC:
  Arpad Muranyi asked about the timeline for consideration of IBIS 4.1 and 
when it might be ready for ballot. Stephen replied that barring unexpected 
issues with the incorporation of BIRD75 (multi-lingual modeling), he expects
that a vote to ratify IBIS 4.1 will occur in late May.

NEXT MEETING:
The next teleconference meeting is scheduled for March 28, 2003 from 8:00 AM 
to 10:00 AM Pacific time.  A vote on BIRD74.2 and BIRD79 is scheduled.
============================================================================

                                      NOTES

IBIS CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-1831
            [email-masked]
            Senior Hardware Engineer, Intel Corporation
            M/S JF4-215
            2111 NE 25th Ave.
            Hillsboro, OR 97124-5961

VICE CHAIR: Lynne Green (425) 788-0412, Fax: (425) 788-4289
            [email-masked]
            Senior Modeling Engineer, Cadence Design Systems
            20 120th Ave NE, Suite 103, Bellevue, WA 98005-3016

SECRETARY:  Randy Wolff (208) 363-1764, Fax: (208) 368-3475
            [email-masked]
            Simulation Engineer, Micron Technology, Inc.
            8000 S. Federal Way
            Mail Stop: 711
            Boise, ID 83707-0006
        
LIBRARIAN:  Roy Leventhal (847) 590-9398
            [email-masked]
            Consultant, Leventhal Design and Communications
            1924 North Burke Drive
            Arlington Heights, Illinois 60004

WEBMASTER:  Syed Huq (408) 525-3399, Fax: (408) 526-5504
            [email-masked]
            Manager, Hardware Engineering, Cisco Systems
            170 West Tasman Drive
            San Jose, CA 95134-1706

POSTMASTER: John Angulo (425) 497-5077, Fax: (425) 881-1008
            [email-masked]
            Development Engineer, Mentor Graphics
            14715 N.E. 95th Street, Suite 200
            Redmond, WA 98052

This meeting was conducted in accordance with the EIA Legal Guides and EIA 
Manual of Organization and Procedure.

The following e-mail addresses are used:

  [email-masked]
      In the body, for the IBIS Open Forum Reflector:
      subscribe ibis <your e-mail address>

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      Help and other commands:
      help

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      To join, change, or drop from either the IBIS Open Forum Reflector
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      To send a message to the general IBIS Open Forum Reflector.  This
      is used mostly for IBIS Standardization business and future IBIS
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      To send a message to the IBIS Users' Group Reflector.  This is
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      general user concerns.  Job posting information is not permitted.

  [email-masked]
      To report ibischk2/3 parser bugs.  The Bug Report Form Resides on
      eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported
      bugs.

      To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
      which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt,
      /pub/ibis/bugs/s2ibis2/bugs2i2.txt, and
      /pub/ibis/bugs/s2iplt/bugsplt.txt respectively.

Information on IBIS technical contents, IBIS participants, and actual IBIS 
models are available on the IBIS Home page found by selecting the Electronic 
Information Group under:

  http://www.eigroup.org/ibis/ibis.htm

Check the pub/ibis directory on eda.org for more information on previous 
discussions and results.  You can get on via FTP anonymous.

============================================================================
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------------------------------

Date: Tue, 11 Mar 2003 10:51:14 -0800
From: "Angulo, John" <[email-masked]>
Subject: [IBIS-Users] IBIS modeling

The following is posted on behalf of Nitin Sood.  Please send any private replies to [email-masked] only.

- -----Original Message-----

I have a question involving IBIS modeling which is a part of my project. I will be glad if anyone  can give suggestions to my problems.

Problem: Is there any way I can extract IBIS parameters from an IC for example a HEX inverter DM74LS04 with physical measurements?

If it is not possible then does it mean that I can do this only for Driver IC's? using High Speed scope and other lab equipment.

If its possible then how do I proceed? Also I do not have means for a JTAG setup based measurements.

Your help is highly appreciated.

Thank you in advance

Regards

Nitin

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------------------------------

Date: Fri, 14 Mar 2003 06:54:23 -0600
From: John Gunser <[email-masked]>
Subject: [IBIS-Users] Need help with IBIS/ECL question

Hi All,

I have a few questions I was hoping someone here could help me out with.

Background: I am attempting to perform signal integrity on a 10-15 year old
circuit pack that uses the 100K series of ECL devices. This pack is being
redesigned to replace some DA components and we need to verify the quality of
the other signals.  On this circuit pack, these ECL devices interface to
standard 74F, ABT and HC devices that are connected and operating "under water"
(with VCC tied to ground and GRD connected to -5 volts) I have obtained ibis
models for the 74F, ABT and HC parts but now need to modify them to correctly
reflect how they are being used in the circuit. 

Questions: Can I simply change the pull up, pull down, ground clamp and power
clamp reference values to reflect the -5V to 0 operation rather than 0 to +5V?
For Vinl, am I correct in assuming it should change to .8V more than -5 or -4.2
volts? Similarly Vinh would be -5 + 2 = -3?? In the output model where Vmeas and
Vref are specified (currently 1.5V and 0v), If I change the Vref to -5V, is the
Vmeas specified to be relative to the Vref (1.5V more than Vref) or is Vmeas
absolute and need to be specified as -3.5V? Any help in sorting this out will be
greatly appreciated! Thanks in advance!

Best Regards
John Gunser
[email-masked]
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------------------------------

Date: Fri, 14 Mar 2003 09:07:22 -0800
From: "Beal, Weston" <[email-masked]>
Subject: RE: [IBIS-Users] Need help with IBIS/ECL question

John,

I don't recall anything in the IBIS specification that prohibits this method, but the more important issue is whether or not your simulator will interpret it as you desire.  I kind of doubt that this will work in any of the simulators that I'm familiar with.

If I were in your position, I would just try one simple model and try a simulation in my favorite simulator.  You'll need to remove any rising and falling waveforms for the first test, as they surely will cause confusion.  If you find that the first test works and you want to add the waveforms back in, then you'll have to find a method to adjust the voltage values to line up with your new model.

Good Luck,
Weston

- -----Original Message-----
From: John Gunser [mailto:[email-masked]]
Sent: Friday, March 14, 2003 4:54 AM
To: [email-masked]
Subject: [IBIS-Users] Need help with IBIS/ECL question

Hi All,

I have a few questions I was hoping someone here could help me out with.

Background: I am attempting to perform signal integrity on a 10-15 year old
circuit pack that uses the 100K series of ECL devices. This pack is being
redesigned to replace some DA components and we need to verify the quality of
the other signals.  On this circuit pack, these ECL devices interface to
standard 74F, ABT and HC devices that are connected and operating "under water"
(with VCC tied to ground and GRD connected to -5 volts) I have obtained ibis
models for the 74F, ABT and HC parts but now need to modify them to correctly
reflect how they are being used in the circuit. 

Questions: Can I simply change the pull up, pull down, ground clamp and power
clamp reference values to reflect the -5V to 0 operation rather than 0 to +5V?
For Vinl, am I correct in assuming it should change to .8V more than -5 or -4.2
volts? Similarly Vinh would be -5 + 2 = -3?? In the output model where Vmeas and
Vref are specified (currently 1.5V and 0v), If I change the Vref to -5V, is the
Vmeas specified to be relative to the Vref (1.5V more than Vref) or is Vmeas
absolute and need to be specified as -3.5V? Any help in sorting this out will be
greatly appreciated! Thanks in advance!

Best Regards
John Gunser
[email-masked]
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------------------------------

Date: Fri, 14 Mar 2003 10:17:18 -0700
From: rrwolff <[email-masked]>
Subject: [IBIS-Users] [IBIS] Open forum European Summit minutes (03/07/03)

DATE: 03/14/03

SUBJECT: March 7, 2003 EIA IBIS Open Forum European Summit Minutes

VOTING MEMBERS AND 2003 PARTICIPANTS LIST:
Ansoft Corporation             (Eric Bracken)
Apple Computer                 Kim Helliwell
Applied Simulation Technology  Fred Balistreri
Cadence Design                 Lynne Green
Cisco Systems                  Syed Huq, Val Mandruson, Hung Pham 
Cypress Semiconductor          (Rajesh Manapat)
Hitachi ULSI Systems           Kazuyoshi Shoji*
Huawei Technologies            (Jiang Xiang Zhong)
IBM                            (Pravin Patel)
Intel Corporation              Stephen Peters, Michael Mirmak,
                               Arpad Muranyi
LSI Logic                      Frank Gasparik
Matsushita (Panasonic)         Atsuji Ito
Mentor Graphics                Bob Ross, Ian Dodd, Guy de Burgh,
                               John Angulo, Mike Donnelly, Weston Beal 
Micron Technology              Randy Wolff
Mitsubishi                     (Pat Hefferan)
Molex Incorporated             Gus Panella
Motorola                       (Rick Kingen)
National Semiconductor         Milt Schwartz, Tim Coyle
NEC Electric Corporation       (Itsuki Yamada)
North East Systems Associates  Edward Sayre 
Philips Semiconductor          (D.C. Sessions), Stephanie Goedecke*
Quantic EMC                    (Mike Ventham)
Siemens (& Automotive) AG      Eckhard Lenski*, Michael Kindij*, 
                               Burkhard Muller*, Katja Koller*, 
                               Andre Goerisch*, Manfred Maurer*, 
                               Bernard Unger*, Amir Motamedi*, 
                               Hartmut Ibowski*, Gerald Bannert*
Signal Integrity Software      (Bob Haller), Barry Katz, Doug Burns
Sigrity                        Raj Raghuram
SiQual                         (Rob Hinz)
Texas Instruments              Thomas Fisher
Teraspeed                      Scott McMorrow, Tom Dagostino,
                               Kevin Simpson
Time Domain Analysis Systems   Dima Smolyansky, Steve Corey
Via Technologies               (Weber Chuang)
Zuken (& Incases)              Michael Schaeder*, Ralf Bruning*,

OTHER PARTICIPANTS IN 2003:
Agilent Technologies           Herbert Lage*
Brocade                        Frank Yuan, Yongrue Yu
Conexant                       Gary Felker
EADS CCR                       Alix de la Villeguerin*
EFM                            Ekkehard Miersch*
EMC Corporation                Brian Arsenault
Fraunhofer IZM                 Ege Engin*
Fujitsu                        Tadashi Arai
GEIA                           (Chris Denham)
Independent                    Kelly Green
Infineon Tech AG               Christian Sporrer*
Marvell Semiconductor          Itzik Peleg
NetLogic Microsystems          Eric Hsu
Plexus                         Joseph Socha
Politechnico de Torino         Igor Stievano*
Sintecs BV                     Hans Klos*, Bob te Nijenhuis*
Xilinx                         Susan Wu

In the list above, attendees at the meeting are indicated by *.  Principal
members or other active members who have not attended are in parentheses. 
Participants who no longer are in the organization are in square brackets.

Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are 
as follows:

  Date                Bridge Number    Reservation #    Passcode
  March 28, 2003      (916) 356-2663       4            1471937

All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas 
out 7 days before each Open Forum, and meeting minutes out within 7 days 
after.  When you call into the meeting, ask for the IBIS Open Forum hosted 
by Stephen Peters and give the reservation number and passcode.

NOTE: "AR" = Action Required.
- -------------------------------- MINUTES -----------------------------------
INTRODUCTIONS AND MEETING QUORUM
The European IBIS Summit Meeting was held all day at the ICM conference in
Munich, Germany.  About 22 people from 11 companies and institutes attended.
The notes below capture some of the meeting content and discussions.  The
meeting presentations and other material are uploaded at: 

  http://www.eda.org/pub/ibis/summits/mar03/

Ralf Bruening opened the meeting and asked everyone to introduce themselves.
The EDA, user and semiconductor groups were well represented.  Ralf thanked
the co-sponsors for the meeting, Mentor Graphics, Siemens, and Zuken for
sharing the meeting expenses.  In particular, Ralf thanked Françoise
Lindecker of Mentor, Eckhard Lenski and Manfred Maurer of Siemens, and the 
Zuken staff for helping in the meeting logistics, collecting registrations,
and copying presentations.

Ralf then gave a brief overview of the meeting agenda:

9:00 Sign-In/Welcome                         (R. Buening/Zuken)
    - Introduction of Meeting/Objectives/Schedule    all
    - Participants                                   all

9:40  Basic IBIS Tutorial                    (E. Lenski, Siemens AG)

10:10 IBIS Version 4.0 Overview - What's New Compared to Version 3.2
                                            (R. Bruening/M. Schaeder, Zuken)

10:35 IBIS Quality Committee Overview       (B. Katz/ E. Lenski, Siemens AG)
 
10:50 IBIS EBD's - What They Are and How They Could/Should be Handled in the 
                   Design Process
                                             (Michael Schaeder, Zuken)

11:25 Quality of IBIS models, IBIS for LVDS  (C. Sporrer,Infineon)

12:00 Casual Sandwich Lunch

12:45 IBIS Extension for High Speed Simulation in the Gigahertz Range
                                             (E. Miersch / EFM)
                                                      
13:00 Three-Pole Modeling                    (E. Engin, FhG/IZM))

12:25 Radial Based Function Modeling    (F. Canavero, Politecnico di Torino)

13:45 Discussion/Question & Answers          (all)

14:30 End of Meeting

IBIS BASICS TUTORIAL
Eckhard Lenski, Siemens AG, Germany
Eckhard Lenski started the presentation with an overview of the increased 
complexity of IBIS models starting with IBIS 1.1 up to IBIS 4.0. He showed
an example of a current IBIS 3.2 model separated into 4 parts: pin and 
package information, different model spec parameters, V-I curves, and V-T 
curves. Eckhard presented a table that showed which V-I curves are
referenced to VCC, depending on the model type and technology used. He 
continued with examples for a power clamp curve, a pullup curve, and ECL
pullup and pulldown curves. He gave an overview of the parameters used for
ramp and waveforms, their default values, and how to use them properly.
He ended with a summary about different model-types, where each foil 
contained the basic IBIS block, the IO-structure and the corresponding
waveforms.

IBIS VERSION 4.0 OVERVIEW - WHATS NEW COMPARED TO VERSION 3.2
Ralf Bruening and Michael Schaeder, Zuken Germany
Ralf Bruening began with information about the IBIS versions of models 
obtained from the internet for the designs they analyzed for their
customers. It was about 30% in IBIS 3.2 format, 65% in IBIS 2.1 format, and
still about 5% of the models in IBIS 1.1 format. He gave an overview of the
BIRDS that are now part of IBIS 4.0. The golden waveform shows how the IO 
should react at a given test load with spice simulation. He pointed out that
the fall back submodel was introduced due to the lack of trigger functions
available for the bus-hold submodel. He explained that the new receiver
threshold parameters are necessary due to new technologies, including
information about the slew rates at the inputs. He explained that the C_comp
parameter is now split into 4 parts. Then he asked the question that when
there are the 4 reference parameters (instead of voltage range), where is
the C_comp value referenced to. No one in the audience could give him a
quick answer. He also mentioned that the expansion to 1000 points in the
rising/falling waveform tables would further increase the accuracy of IBIS
models. He mentioned that there are future expansions planned (especially
BIRD75) and ended with the statement that IBIS is a living standard that is
driven by the users.

In the followup discussion he pointed out that the golden waveform is not
limited to just a resistive load, but that there are possibilities for a
test load, including transmission lines scenarios. It was noted that,
for example, the C_comp split up into 4 parts will complicate the model
creation and that a black box extraction for the C_comp value will be
difficult.

IBIS QUALITY COMMITTEE OVERVIEW
Barry Katz, Signal Integrity Software (SiSoft), USA, and
Eckhard Lenski, Siemens AG, Germany
Eckhard Lenski began by noting that the goal of the quality committee is to
achieve models with no parser errors or warnings. The focus over the past
year has been the creation of a quality checklist and rating system.
Eckhard defined the quality levels as:

 level 0  - passes IBISCHK and includes a few required keywords
 level 1  - complete with all needed keywords, pin lists, and data for all
            three corners. 
 level 2a - models have been run through a simulator and correlated to a
            transistor level model
 level 2b - models have been correlated to bench measurements
 level 3  - level 2a and level 2b

The committee is now working on a document that explains the various
checklist items. All attendees said that the quality committee is a very
good approach to getting more accurate models. In the discussion there was
a proposal for a golden buffer, which should be discussed in the quality
committee. Further on, Eckhard pointed out that the results of the checklist
will be part of the IBIS model itself, marked by the comment character "|" 
and followed by "IQ" for IBIS Quality.  

QUALITY OF IBIS MODELS, IBIS FOR LVDS
Christian Sporrer, Infineon AG, Germany
Dr. Sporrer started with some references to the standards for LVDS and
pointed out that there are a number of publications available to help the 
model maker create LVDS-models. He mentioned that it is not possible to 
model one output as standalone. So, for the model creation process, the 
differential character of LVDS must be taken into account. He explained 
that he had created two models, one for CMOS technology and one for bipolar
technology. Then, he compared the models from spice with transistor level
spice simulations using the IBIS model and also with a PCB analysis tool.
For the CMOS model he saw differences. With the IBIS model in spice there
was a shift of the crossing point for the differential output curves from 
1.2V up to a voltage of 1.3V. This made the outputs unsymmetrical. Looking
only at the differential signal shows very good correlation. The comparison
of spice and PCB tools showed a big overshoot at the inputs, and it was not
clear where this overshoot came from.  For the bipolar LVDS-model, the
appearance of the signal with PCB tools was unsymmetrical.  The main problem
was the difference in pulse width symmetry and the dc-shift of the waveform
crossing. He said that it was not clear whether the origin of this problem 
came from the IBIS model or the IBIS simulation. One reason may be the model
for the transmission line itself. From the discussion came up the clue that
LVDS is a current driver technology, but the way it is modeled in IBIS is as
a voltage controlled technology. Another idea was to model the LVDS with
four waveforms instead of two as in this example.  The last idea was to
create a kind of golden test buffer (similar to the golden waveform) for
the different tools, but it is clear that this would be very problematical
concerning tool revisions, etc.  He ended with the statement that he is
looking for more information on how to define/check the quality of a model.

IBIS EBD'S - WHAT THEY ARE AND HOW THEY COULD/SHOULD BE HANDLED IN THE
DESIGN PROCESS
Michael Schaeder, Zuken Germany
Michael Schaeder explained why a description for DIMM modules, etc. is
necessary.  He continued with a list of limitations, like coupling between
paths and how to get transmission line parameters for the EBD. In the next
slides he showed different examples of EBD paths, and then he switched over
to some common problems like unsolved external references, unclear order of
lumped R, L, and C elements (with Len=0), and the confusion among new users
with the arbitrary unit length. He then showed two ways of using an EBD file
in PCB simulations. The first was to read in the .ebd/.ibs files at 
simulation time, which means that the design and the EBD data must fit
together. The second way was to convert the EBD file into the simulation
environment. That way the EBD behaves as normal parts/transmission lines on
the board itself. He ended with some hints about describing multi-level dies
in an EBD format and a question of when the coupling between lines might
be possible.

LUNCH
The group recessed for a brief working lunch.

IBIS Extension for High Speed Simulation in the Gigahertz Range
Dr. E. Miersch, EMC / SIGRITY, Inc.
Dr. Miersch made a short ad-hoc-presentation. He showed that simulation with
IBIS models having a rise/fall time of about 100ps is possible, but the key
to doing this is both good models of the IO buffer and the package. The
package model for the ASIC shown was created for a 4-layer BGA. He showed
good agreements between measurement and simulation.

THREE-CONDUCTOR MODELING OF POWER/GROUND NOISE
Ege Engin, Fraunhofer Institute Reliability and Microintegration, Germany
Ege Engin described the reasons why there is a need to enhance modeling of
Power/Ground noise in chip packages. He explained the differences between
the 2-conductor model and the new 3-conductor model. He showed an example of
a 3-conductor spice model, which contains an ibis output driver model and a
3-conductor interconnect model. The ideal power distribution system of the
2-conductor model will be replaced by one model for the power plane and
one model for the ground plane. Doing this, all current return paths can be
considered. The 3-conductor model shows that for H-L transitions the current
return path is mostly in the power line and for L-H transitions it is mostly
in the ground line. Assuming that the ratio of signal lines to power lines
plus ground lines must be equal, he showed that furthermore the ratio of
power lines to gnd line must also be equal. In his conclusions he remarked
that an extended IBIS model that includes coupling between the package pins
is necessary for further improvements, and also an enhanced IBIS model of
the driver that contains data for non-ideal power supply conditions would be
welcome.  In the discussion he pointed out that the model is at moment
frequency limited, but this can also be improved.

M(PI)LOG, MACROMODELING VIA PARAMETRIC IDENTIFICATION OF LOGIC
F.G. Canevero, I.A. Maio, I.S. Stievano, Politecnico di Torino, Italy
Igor Stievano showed a new approach for behavioral models in the case that
spice models are not available and IBIS models are not adequate enough. The
new model will also contain information about temperature and VCC
fluctuations. It is a mathematical expression that reproduces the electrical
behavior of the IO stage. The reaction of the IO stage to a convenient
stimulation is used to build a model by creating a set of non-linear
Gaussian radial basis functions. This solution conforms with the BIRD75.8
multilingual modeling. The created model of a tri-state output shows good
correlation with spice simulations, and the computation rate is about 20 to
100 times faster. A tool creates the models, and it takes about 5 minutes of
CPU-time. He observed no load dependency of his model in the examined range
of 20-100 Ohm test loads. The model also contains voltage-variations in the
range of +/- 15%. In the discussion he pointed out that the next step would
be to use this approach to model a differential output. He also mentioned
that the M(PI)LOG model could be included like a normal spice subcircuit.

CONCLUDING REMARKS
Ralf Bruening thanked the participants for attending and the presenters for 
providing a fine set of presentations.  Ralf also thanked the sponsors for
keeping the European IBIS Summit Meeting active.

Ralf mentioned that there was much interaction during the breaks and that it
was a very successful meeting.

NEXT MEETING
The next teleconference meeting is scheduled for March 28, 2003 from 8:00 AM 
to 10:00 AM Pacific time.  A vote on BIRD74.2 and BIRD79 is scheduled.
============================================================================

                                      NOTES

IBIS CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-1831
            [email-masked]
            Senior Hardware Engineer, Intel Corporation
            M/S JF4-215
            2111 NE 25th Ave.
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VICE CHAIR: Lynne Green (425) 788-0412, Fax: (425) 788-4289
            [email-masked]
            Senior Modeling Engineer, Cadence Design Systems
            20 120th Ave NE, Suite 103, Bellevue, WA 98005-3016

SECRETARY:  Randy Wolff (208) 363-1764, Fax: (208) 368-3475
            [email-masked]
            Simulation Engineer, Micron Technology, Inc.
            8000 S. Federal Way
            Mail Stop: 711
            Boise, ID 83707-0006
        
LIBRARIAN:  Roy Leventhal (847) 590-9398
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WEBMASTER:  Syed Huq (408) 525-3399, Fax: (408) 526-5504
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            170 West Tasman Drive
            San Jose, CA 95134-1706

POSTMASTER: John Angulo (425) 497-5077, Fax: (425) 881-1008
            [email-masked]
            Development Engineer, Mentor Graphics
            14715 N.E. 95th Street, Suite 200
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------------------------------

Date: Fri, 14 Mar 2003 18:37:49 -0800
From: "Jeremy Plunkett" <[email-masked]>
Subject: RE: [IBIS-Users] Need help with IBIS/ECL question

John,
I suggest you use a simulator that allows you to set up the supply rails to
the IBIS model yourself, rather than generating the supply connections
internally.  This way there is no need to modify your IBIS model.

The only such tool I am aware of is Hspice, but other simulators may allow
this also with some special option.  In Hspice, you'll need to set
power=off, connect the pullup and power clamp nodes to your GND rail and the
pulldown and groundclamp nodes to the -5v rail, and connect a 5v voltage
source (and a power delivery model if you have it) with the + node on GND.

The signals that control the IBIS model on the "core" side don't have any
relationship to the IO rails so they will still need to switch from 0-1v.

I haven't tried this myself but as far as I know it should work.

Jeremy

- -----Original Message-----
From: [email-masked]
[mailto:[email-masked]]On Behalf Of Beal, Weston
Sent: Friday, March 14, 2003 9:07 AM
To: [email-masked]
Subject: RE: [IBIS-Users] Need help with IBIS/ECL question

John,

I don't recall anything in the IBIS specification that prohibits this
method, but the more important issue is whether or not your simulator will
interpret it as you desire.  I kind of doubt that this will work in any of
the simulators that I'm familiar with.

If I were in your position, I would just try one simple model and try a
simulation in my favorite simulator.  You'll need to remove any rising and
falling waveforms for the first test, as they surely will cause confusion.
If you find that the first test works and you want to add the waveforms back
in, then you'll have to find a method to adjust the voltage values to line
up with your new model.

Good Luck,
Weston

- -----Original Message-----
From: John Gunser [mailto:[email-masked]]
Sent: Friday, March 14, 2003 4:54 AM
To: [email-masked]
Subject: [IBIS-Users] Need help with IBIS/ECL question

Hi All,

I have a few questions I was hoping someone here could help me out with.

Background: I am attempting to perform signal integrity on a 10-15 year old
circuit pack that uses the 100K series of ECL devices. This pack is being
redesigned to replace some DA components and we need to verify the quality
of
the other signals.  On this circuit pack, these ECL devices interface to
standard 74F, ABT and HC devices that are connected and operating "under
water"
(with VCC tied to ground and GRD connected to -5 volts) I have obtained ibis
models for the 74F, ABT and HC parts but now need to modify them to
correctly
reflect how they are being used in the circuit.

Questions: Can I simply change the pull up, pull down, ground clamp and
power
clamp reference values to reflect the -5V to 0 operation rather than 0 to
+5V?
For Vinl, am I correct in assuming it should change to .8V more than -5
or -4.2
volts? Similarly Vinh would be -5 + 2 = -3?? In the output model where Vmeas
and
Vref are specified (currently 1.5V and 0v), If I change the Vref to -5V, is
the
Vmeas specified to be relative to the Vref (1.5V more than Vref) or is Vmeas
absolute and need to be specified as -3.5V? Any help in sorting this out
will be
greatly appreciated! Thanks in advance!

Best Regards
John Gunser
[email-masked]
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------------------------------

Date: Mon, 17 Mar 2003 16:15:56 -0500
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] Need help with IBIS/ECL question

Other tools, including SPECCTRAQuest, allow you to set up
the correct ECL rail voltages.

The problem is that many IBIS models, particularly inputs, tend to
use the [Voltage Range] keyword, which makes the implied reference
voltages for the PullDown and GroundClamp (zero volts) incorrect.

- - Lynne

- -----Original Message-----
From: Jeremy Plunkett [mailto:[email-masked]] 
Sent: Friday, March 14, 2003 6:38 PM
To: Beal, Weston; [email-masked]; [email-masked]
Subject: RE: [IBIS-Users] Need help with IBIS/ECL question

John,
I suggest you use a simulator that allows you to set up the supply rails
to the IBIS model yourself, rather than generating the supply
connections internally.  This way there is no need to modify your IBIS
model.

The only such tool I am aware of is Hspice, but other simulators may
allow this also with some special option.  In Hspice, you'll need to set
power=off, connect the pullup and power clamp nodes to your GND rail and
the pulldown and groundclamp nodes to the -5v rail, and connect a 5v
voltage source (and a power delivery model if you have it) with the +
node on GND.

The signals that control the IBIS model on the "core" side don't have
any relationship to the IO rails so they will still need to switch from
0-1v.

I haven't tried this myself but as far as I know it should work.

Jeremy

- -----Original Message-----
From: [email-masked]
[mailto:[email-masked]]On Behalf Of Beal, Weston
Sent: Friday, March 14, 2003 9:07 AM
To: [email-masked]
Subject: RE: [IBIS-Users] Need help with IBIS/ECL question

John,

I don't recall anything in the IBIS specification that prohibits this
method, but the more important issue is whether or not your simulator
will interpret it as you desire.  I kind of doubt that this will work in
any of the simulators that I'm familiar with.

If I were in your position, I would just try one simple model and try a
simulation in my favorite simulator.  You'll need to remove any rising
and falling waveforms for the first test, as they surely will cause
confusion. If you find that the first test works and you want to add the
waveforms back in, then you'll have to find a method to adjust the
voltage values to line up with your new model.

Good Luck,
Weston

- -----Original Message-----
From: John Gunser [mailto:[email-masked]]
Sent: Friday, March 14, 2003 4:54 AM
To: [email-masked]
Subject: [IBIS-Users] Need help with IBIS/ECL question

Hi All,

I have a few questions I was hoping someone here could help me out with.

Background: I am attempting to perform signal integrity on a 10-15 year
old circuit pack that uses the 100K series of ECL devices. This pack is
being redesigned to replace some DA components and we need to verify the
quality of the other signals.  On this circuit pack, these ECL devices
interface to standard 74F, ABT and HC devices that are connected and
operating "under water" (with VCC tied to ground and GRD connected to -5
volts) I have obtained ibis models for the 74F, ABT and HC parts but now
need to modify them to correctly reflect how they are being used in the
circuit.

Questions: Can I simply change the pull up, pull down, ground clamp and
power clamp reference values to reflect the -5V to 0 operation rather
than 0 to
+5V?
For Vinl, am I correct in assuming it should change to .8V more than -5
or -4.2 volts? Similarly Vinh would be -5 + 2 = -3?? In the output model
where Vmeas and Vref are specified (currently 1.5V and 0v), If I change
the Vref to -5V, is the Vmeas specified to be relative to the Vref (1.5V
more than Vref) or is Vmeas absolute and need to be specified as -3.5V?
Any help in sorting this out will be greatly appreciated! Thanks in
advance!

Best Regards
John Gunser
[email-masked]
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------------------------------

Date: Thu, 20 Mar 2003 17:32:33 -0800
From: "Peters, Stephen" <[email-masked]>
Subject: [IBIS-Users] Agenda, IBIS Open Forum Meeting 2/28

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- ------_=_NextPart_001_01C2EF49.BEF789E0
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                  IBIS Open Forum Meeting Agenda
                          for 3/28/03
 
                 Bridge Number    Reservation #   Passcode
                 1-916-356-2663      4            1471937
                 (International Dial-In: 1-617-801-9781)
 
All meetings are 8:00 AM to 9:55 AM Pacific Time.  When you call into the 
meeting, ask for the IBIS Open Forum hosted by Stephen Peters and give the
Reservation Number and Passcode.
 
8:00 Check-In, Intros, Announcements                         Peters
 
     - Intros of New IBIS Participants, Meeting Quorum       Peters
     - Call for Patents                                      Peters
     - Membership Update and Treasurers Report               Peters
     - Review of Previous Meeting's Minutes (and ARs)        Peters
     - Miscellany/Announcements                              All
     - Press & Web Page Updates                              Huq, All
     - New Models Available, Library Update                  Leventhal, All
     - Opens for New Issues                                  All
 
8:15 Administrative and Project Discussions
 
     International/External Progress
     - IEC 62014-3 (ICEM) Integrated Circuits Electromagnetic 
       Model Proposal (IEC 93/67/NP IBIS and EMC Simulation) Perrin/Peters
     - JEDEC Committee Report                                Green
 
     DATE2003 European IBIS Summit Meeting Report            Lenski
 
     DAC2003 and DesignCon2003 East Meeting Planning         Peters
 
     IBIS Version 4.0 Parser Funding                         Peters
 
     IBIS Quality Committee                                  Katz
 
     IBIS Model Review Committee                             Green
 
     New Administrative Issues                               All
 
8:45 Technical Discussion
 
     IBIS Connector Group Report                             Peters/Green
 
     BIRD74.2 - EMI Parameters (Vote)                        de Burgh
 
     BIRD79 - Non-linear Buffer Impedance (extension to
Muranyi/Giacotto
              C_comp)  (Vote)
 
     ibischk3 Status                                         Ross
     - BUG71 - Monotonic Checking for Combined I-V Tables    Haller
     - BUG74 - Missing Timing Test Load Warning Messages     Haller
 
     New Technical Issues                                    All
 
9:50 Wrap Up and Next Meetings Plans                         Peters
 
9:55 Sign Off

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Dus-ascii">
<TITLE>Message</TITLE>

<META content=3D"MSHTML 6.00.2722.900" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D157133101-21032003>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
I</SPAN>BIS Open Forum Meeting=20
Agenda<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<SPAN=20
class=3D157133101-21032003>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
</SPAN>for 3/28/03</FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;<SPAN=20
class=3D157133101-21032003>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</SPAN>Bridge=20
Number&nbsp;&nbsp;&nbsp; Reservation #&nbsp;&nbsp;=20
Passcode<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
1-916-356-2663&nbsp;&nbsp;&nbsp;<SPAN =
class=3D157133101-21032003>&nbsp;&nbsp;=20
</SPAN>4&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;1471937<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
(International Dial-In: 1-617-801-9781)</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>All meetings are 8:00 AM to =
9:55 AM Pacific=20
Time.&nbsp; When you call into the <BR>meeting, ask for the IBIS Open =
Forum=20
hosted by Stephen Peters and give the Reservation Number and=20
Passcode.</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>8:00 Check-In, Intros,=20
Announcements&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;=20
Peters</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; - =
Intros of New=20
IBIS Participants, Meeting Quorum&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Peters<BR>&nbsp;&nbsp;&nbsp;&nbsp; - Call for=20
Patents&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;=20
Peters<BR>&nbsp;&nbsp;&nbsp;&nbsp; - Membership Update and Treasurers=20
Report&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;=20
Peters<BR>&nbsp;&nbsp;&nbsp;&nbsp; - Review of Previous Meeting's =
Minutes (and=20
ARs)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Peters<BR>&nbsp;&nbsp;&nbsp;&nbsp; -=20
Miscellany/Announcements&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
All<BR>&nbsp;&nbsp;&nbsp;&nbsp; - Press &amp; Web Page=20
Updates&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Huq, All<BR>&nbsp;&nbsp;&nbsp;&nbsp; - New Models Available, Library=20
Update&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Leventhal, All<BR>&nbsp;&nbsp;&nbsp;&nbsp; - Opens for New=20
Issues&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
All</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>8:15 Administrative and =
Project=20
Discussions</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp;=20
International/External Progress<BR>&nbsp;&nbsp;&nbsp;&nbsp; - IEC =
62014-3 (ICEM)=20
Integrated Circuits Electromagnetic =
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Model Proposal (IEC 93/67/NP IBIS and EMC Simulation)=20
Perrin/Peters<BR>&nbsp;&nbsp;&nbsp;&nbsp; - JEDEC Committee=20
Report&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Green</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; =
DATE2003 European=20
IBIS Summit Meeting=20
Report&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
=20
Lenski</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; =
DAC2003 and=20
DesignCon2003 East Meeting=20
Planning&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
Peters</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; IBIS =
Version 4.0=20
Parser=20
Funding&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;=20
Peters</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; IBIS =
Quality=20
Committee&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Katz</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; IBIS =
Model Review=20
Committee&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Green</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; New =
Administrative=20
Issues&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
All</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>8:45 Technical =
Discussion</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; IBIS =
Connector=20
Group=20
Report&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Peters/Green</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; =
BIRD74.2 - EMI=20
Parameters=20
(Vote)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
=20
de Burgh</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; =
BIRD79 -=20
Non-linear Buffer Impedance (extension to&nbsp;&nbsp;&nbsp;<SPAN=20
class=3D157133101-21032003>&nbsp;&nbsp;=20
</SPAN>Muranyi/Giacotto<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
C_comp)&nbsp; (Vote)</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; =
ibischk3=20
Status&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Ross<BR>&nbsp;&nbsp;&nbsp;&nbsp; - BUG71 - Monotonic Checking for =
Combined I-V=20
Tables&nbsp;&nbsp;&nbsp; Haller<BR>&nbsp;&nbsp;&nbsp;&nbsp; - BUG74 - =
Missing=20
Timing Test Load Warning Messages&nbsp;&nbsp;&nbsp;&nbsp; =
Haller</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>&nbsp;&nbsp;&nbsp;&nbsp; New =
Technical=20
Issues&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
=20
All</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>9:50 Wrap Up and Next Meetings =

Plans&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;=20
Peters</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2>9:55 Sign=20
Off<BR></FONT></DIV></BODY></HTML>

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------------------------------

Date: Thu, 27 Mar 2003 08:01:45 +0200
From: Lior Aviv <[email-masked]>
Subject: [IBIS-Users] Differences between '*_fixture' & '*_ref' parameters

Hi,

While creating an ibis model, I encountered a misunderstanding
regarding the differences between the '*_ref' parameters and the
'*_fixture' parameters.

It seems like both are being used for loads.

In addition, I have noticed that the '*_fixture' parameters are being
used only at the 'rising/falling waveform' simulations.

Does anybody know what the differences are ?

Thanks in advance,

                              Lior Aviv
                              Motorola Semiconductor Israel.

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------------------------------

Date: Thu, 27 Mar 2003 09:22:09 -0800
From: "Muranyi, Arpad" <[email-masked]>
Subject: RE: [IBIS-Users] Differences between '*_fixture' & '*_ref' parameters

Lior,

The *-fixture parameters are used when you generate the
waveform tables to load the driver with known loads.
The *-ref parameters tell the simulator how to load
the IBIS model when running simulations with it.  These
supposed to indicate the load at which the buffer's Tco
was derived with in the data sheet.

I hope this helps.

Arpad Muranyi
Intel Corporation
=======================================================

- -----Original Message-----
From: Lior Aviv [mailto:[email-masked]]
Sent: Wednesday, March 26, 2003 10:02 PM
To: [email-masked]
Cc: Yoked Erlich
Subject: [IBIS-Users] Differences between '*_fixture' & '*_ref'
parameters

Hi,

While creating an ibis model, I encountered a misunderstanding
regarding the differences between the '*_ref' parameters and the
'*_fixture' parameters.

It seems like both are being used for loads.

In addition, I have noticed that the '*_fixture' parameters are being
used only at the 'rising/falling waveform' simulations.

Does anybody know what the differences are ?

Thanks in advance,

                              Lior Aviv
                              Motorola Semiconductor Israel.

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------------------------------

Date: Thu, 27 Mar 2003 08:24:45 -0800
From: "Peters, Stephen" <[email-masked]>
Subject: RE: [IBIS-Users] Differences between '*_fixture' & '*_ref' parame ters

Hello Lior:

  The _fixture subparameters are intended to document the fixture parasitic
in the case where the [Rising Waveform]/[Falling Waveform] data comes an
actual bench measurement.  In general, the rising and falling waveform data
should be taken from simulations into a pure resistive load and the _fixture
subparameters are not used. 

  On the other hand, the _ref subparameters document the 'standard test
load' -- the loading conditions under which the devices propagation or
clock-to-output delay is measured.  This information is required if one want
to understand how to derate a devices propagation delay due to various
output loading conditions.

Hope this helps.

 Regards,
 Stephen Peters
 Intel Corp.

- -----Original Message-----
From: Lior Aviv [mailto:[email-masked]] 
Sent: Wednesday, March 26, 2003 10:02 PM
To: [email-masked]
Cc: Yoked Erlich
Subject: [IBIS-Users] Differences between '*_fixture' & '*_ref' parameters

Hi,

While creating an ibis model, I encountered a misunderstanding regarding the
differences between the '*_ref' parameters and the '*_fixture' parameters.

It seems like both are being used for loads.

In addition, I have noticed that the '*_fixture' parameters are being used
only at the 'rising/falling waveform' simulations.

Does anybody know what the differences are ?

Thanks in advance,

                              Lior Aviv
                              Motorola Semiconductor Israel.

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------------------------------

Date: Thu, 27 Mar 2003 13:32:49 -0800
From: Fred Balistreri <[email-masked]>
Subject: Re: [IBIS-Users] Differences between '*_fixture' & '*_ref' parameters

Not to add to the confusion but Stephen's reply is not totally correct. 
R_fixture, V_fixture, and C_fixture are the load conditions under
which the device is tested for generation of the v/t curves.
It is recommended that C_fixture be omitted if at all possible
during the v/t testing. R_fixture in particular is not a parasitic
resistance it is the total resistance connected between the 
output pin under test and V_fixture, in other words the load
resistor. 

Stephen is correct about the _ref parameters. It is important to
note that the _ref parameters specified in IBIS are NOT used to
generate the IBIS data. The _ref parameters are supposed to be
the IC manufacturer's recommended load conditions for measuring
timing.

The _dut parameters are analogous to the _pkg parameters. They
represent the parasitics of the package. These can be avoided
when generating the model from SPICE. However when IBIS is
generated from measured real devices there may be _dut parameters
that are un-avoidable due to package, ic socket or other such
parasitics. In that case the _dut parameters should be included
in the IBIS data since the data was taken with those parameters
present.

Hope this clears things up a bit.

Best Regards,
 
"Peters, Stephen" wrote:
> 
> Hello Lior:
> 
>   The _fixture subparameters are intended to document the fixture parasitic
> in the case where the [Rising Waveform]/[Falling Waveform] data comes an
> actual bench measurement.  In general, the rising and falling waveform data
> should be taken from simulations into a pure resistive load and the _fixture
> subparameters are not used.
> 
>   On the other hand, the _ref subparameters document the 'standard test
> load' -- the loading conditions under which the devices propagation or
> clock-to-output delay is measured.  This information is required if one want
> to understand how to derate a devices propagation delay due to various
> output loading conditions.
> 
> Hope this helps.
> 
>  Regards,
>  Stephen Peters
>  Intel Corp.
> 
> -----Original Message-----
> From: Lior Aviv [mailto:[email-masked]]
> Sent: Wednesday, March 26, 2003 10:02 PM
> To: [email-masked]
> Cc: Yoked Erlich
> Subject: [IBIS-Users] Differences between '*_fixture' & '*_ref' parameters
> 
> Hi,
> 
> While creating an ibis model, I encountered a misunderstanding regarding the
> differences between the '*_ref' parameters and the '*_fixture' parameters.
> 
> It seems like both are being used for loads.
> 
> In addition, I have noticed that the '*_fixture' parameters are being used
> only at the 'rising/falling waveform' simulations.
> 
> Does anybody know what the differences are ?
> 
> Thanks in advance,
> 
>                               Lior Aviv
>                               Motorola Semiconductor Israel.
> 
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- -- 
Fred Balistreri
[email-masked]

http://www.apsimtech.com
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------------------------------

Date: Fri, 28 Mar 2003 11:26:50 -0800
From: "Eric Hsu" <[email-masked]>
Subject: [IBIS-Users] pull-up/down and schmitt trigger modeling issue

Hi,

In the IBIS spec., is there any key word designed for output buffer if it have pullup/pulldown feature? also the same question for input buffer with schmitt trigger option?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198

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------------------------------

Date: Fri, 28 Mar 2003 13:43:03 -0800
From: "Eric Hsu" <[email-masked]>
Subject: RE: [IBIS-Users] pull-up/down and schmitt trigger modeling issue

Hi Tom,

Thanks for answering. Maybe I didn't describe question clearly. The pull-up/down case I mean is under buffer be tristate condition, pad might be needed to pull-up/down weakly.
As for schmitt trigger input buffer, does ibis spec. allow input buffer with and without schmitt trigger (if it could be enable/disable) feature in one single model? which mean it could be defined Vinh/Vinl (disable case) and Vinh+,Vinh-/Vinl+,Vinl- (enable case) together? 

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198

- -----Original Message-----
From: Tom Dagostino [mailto:[email-masked]]
Sent: Friday, March 28, 2003 1:25 PM
To: Eric Hsu
Subject: RE: [IBIS-Users] pull-up/down and schmitt trigger modeling
issue

Eric

IBIS assumes for the Output, Tri-state and I/O buffer that both pullup and pulldown are present.  If not the open sink or open source buffer types are used.  ECL has its own buffer type.

Input with schmitt trigger characteristics can be specified in the Model Spec section.

Tom Dagostino
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
                                   Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065 
[email-masked] 

- -----Original Message-----
From: [email-masked]
[mailto:[email-masked]]On Behalf Of Eric Hsu
Sent: Friday, March 28, 2003 11:27 AM
To: [email-masked]
Subject: [IBIS-Users] pull-up/down and schmitt trigger modeling issue

Hi,

In the IBIS spec., is there any key word designed for output buffer if it have pullup/pulldown feature? also the same question for input buffer with schmitt trigger option?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198

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------------------------------

Date: Fri, 28 Mar 2003 14:22:33 -0800
From: "Tom Dagostino" <[email-masked]>
Subject: RE: [IBIS-Users] pull-up/down and schmitt trigger modeling issue

This is a multi-part message in MIME format.

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You can accommodate the resistive (?) pullup or pulldown in a tri-stated
buffer by placing that resistive characteristic in the power or ground clamp
table.  

For the input you can use a model selector to have the user select between
an input with normal vin/vinh and an input with the schmitt characteristics
specified in the model spec section.

Tom Dagostino
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
                                   Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065 
[email-masked] 

- -----Original Message-----
From: [email-masked]
[mailto:[email-masked]]On Behalf Of Eric Hsu
Sent: Friday, March 28, 2003 1:43 PM
To: [email-masked]
Cc: [email-masked]
Subject: RE: [IBIS-Users] pull-up/down and schmitt trigger modeling
issue

Hi Tom,

Thanks for answering. Maybe I didn't describe question clearly. The
pull-up/down case I mean is under buffer be tristate condition, pad might be
needed to pull-up/down weakly.
As for schmitt trigger input buffer, does ibis spec. allow input buffer with
and without schmitt trigger (if it could be enable/disable) feature in one
single model? which mean it could be defined Vinh/Vinl (disable case) and
Vinh+,Vinh-/Vinl+,Vinl- (enable case) together? 

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198

- -----Original Message-----
From: Tom Dagostino [mailto:[email-masked]]
Sent: Friday, March 28, 2003 1:25 PM
To: Eric Hsu
Subject: RE: [IBIS-Users] pull-up/down and schmitt trigger modeling
issue

Eric

IBIS assumes for the Output, Tri-state and I/O buffer that both pullup and
pulldown are present.  If not the open sink or open source buffer types are
used.  ECL has its own buffer type.

Input with schmitt trigger characteristics can be specified in the Model
Spec section.

Tom Dagostino
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
                                   Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065 
[email-masked] 

- -----Original Message-----
From: [email-masked]
[mailto:[email-masked]]On Behalf Of Eric Hsu
Sent: Friday, March 28, 2003 11:27 AM
To: [email-masked]
Subject: [IBIS-Users] pull-up/down and schmitt trigger modeling issue

Hi,

In the IBIS spec., is there any key word designed for output buffer if it
have pullup/pulldown feature? also the same question for input buffer with
schmitt trigger option?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198

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------------------------------

Date: Mon, 31 Mar 2003 09:16:35 -0700
From: rrwolff <[email-masked]>
Subject: [IBIS-Users] [IBIS] Open forum minutes (03/28/03)

DATE: 03/31/03

SUBJECT: March 28, 2003 EIA IBIS Open Forum Meeting Minutes

VOTING MEMBERS AND 2003 PARTICIPANTS LIST:
Ansoft Corporation             (Eric Bracken)
Apple Computer                 Kim Helliwell
Applied Simulation Technology  Fred Balistreri
Cadence Design                 Lynne Green*
Cisco Systems                  Syed Huq, Val Mandruson, Hung Pham 
Cypress Semiconductor          (Rajesh Manapat)
Fairchild Semiconductor        (Graham Connolly)
Hitachi ULSI Systems           Kazuyoshi Shoji
Huawei Technologies            (Jiang Xiang Zhong)
IBM                            (Pravin Patel)
Intel Corporation              Stephen Peters*, Michael Mirmak*,
                               Arpad Muranyi*
LSI Logic                      Frank Gasparik
Matsushita (Panasonic)         Atsuji Ito
Mentor Graphics                Bob Ross*, Ian Dodd, Guy de Burgh*,
                               John Angulo*, Mike Donnelly, Weston Beal 
Micron Technology              Randy Wolff*
Mitsubishi                     (Pat Hefferan)
Molex Incorporated             Gus Panella
Motorola                       (Rick Kingen)
National Semiconductor         [Milt Schwartz], Tim Coyle
NEC Electric Corporation       (Itsuki Yamada)
North East Systems Associates  Edward Sayre 
Philips Semiconductor          (D.C. Sessions), Stephanie Goedecke
Quantic EMC                    (Mike Ventham)
Siemens (& Automotive) AG      Eckhard Lenski*, Michael Kindij, 
                               Burkhard Muller, Katja Koller, 
                               Andre Goerisch, Manfred Maurer, 
                               Bernard Unger, Amir Motamedi, 
                               Hartmut Ibowski, Gerald Bannert
Signal Integrity Software      Bob Haller*, Barry Katz, Doug Burns
Sigrity                        Raj Raghuram
SiQual                         (Rob Hinz)
Texas Instruments              Thomas Fisher
Teraspeed                      Scott McMorrow, Tom Dagostino,
                               Kevin Simpson
Time Domain Analysis Systems   Dima Smolyansky, Steve Corey
Via Technologies               (Weber Chuang)
Zuken (& Incases)              Michael Schaeder, Ralf Bruning,

OTHER PARTICIPANTS IN 2003:
Agilent Technologies           Herbert Lage
Brocade                        Frank Yuan, Yongrue Yu
Conexant                       Gary Felker
EADS CCR                       Alix de la Villeguerin
EFM                            Ekkehard Miersch
EMC Corporation                Brian Arsenault
Fraunhofer IZM                 Ege Engin
Fujitsu                        Tadashi Arai
GEIA                           (Chris Denham)
Independent                    Kelly Green, Luca Giacotto*
Infineon Tech AG               Christian Sporrer
Marvell Semiconductor          Itzik Peleg
NetLogic Microsystems          Eric Hsu
Plexus                         Joseph Socha
Politechnico de Torino         Igor Stievano
Sintecs BV                     Hans Klos, Bob te Nijenhuis
Xilinx                         Susan Wu

In the list above, attendees at the meeting are indicated by *.  Principal
members or other active members who have not attended are in parentheses. 
Participants who no longer are in the organization are in square brackets.

Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are 
as follows:

  Date                Bridge Number    Reservation #    Passcode
  April 18, 2003      (916) 356-2663         2          1139683        

All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas 
out 7 days before each Open Forum, and meeting minutes out within 7 days 
after.  When you call into the meeting, ask for the IBIS Open Forum hosted 
by Stephen Peters and give the reservation number and passcode.

NOTE: "AR" = Action Required.

- -------------------------------- MINUTES -----------------------------------
INTRODUCTIONS AND MEETING QUORUM
No new participants.

CALL FOR PATENTS
Stephen Peters called for any patents or pending patents related to the 
IBIS Version 4.0 Standard. No companies declared a patent.

MEMBERSHIP UPDATE AND TREASURER'S REPORT
Stephen Peters reported that the EIA has received a total of 16 membership
payments so far. This is an unofficial total as the official ledger report
has not yet been received.  Stephen also noted that he has not yet received
a final 2002 financial report or a budget and expense statement for 2003.
Stephen is working with the EIA to obtain these reports.

REVIEW OF MINUTES AND AR'S
Stephen Peters noted that two formal IBIS Meetings were held on the same
day, one in Europe and one via teleconference.

The minutes of the March 7, 2003 IBIS Summit Meeting held in Munich,
Germany were approved without comment.

The minutes of the March 7, 2003 IBIS teleconference Meeting were approved
without comment.  

ARs will be discussed during the meeting.

MISCELLANY/ANNOUNCEMENTS
None.

PRESS AND WEB PAGE UPDATES
Bob Ross reported that the latest book by Drs. Howard Johnson and Martin
Graham, "High-Speed Signal Propagation, Advanced Black Magic" contains a 
chapter on Time Domain Simulation Tools and Methods with ample references
to IBIS. 

Stephen Peters reported that Syed Huq is making ongoing updates to the IBIS
roster and upcoming events link. 

NEW MODELS AVAILABLE, LIBRARY UPDATE
None.

OPENS FOR NEW ISSUES
Stephen Peters requested to add a discussion of the upcoming IBIS officer
election to the agenda.

INTERNATIONAL/EXTERNAL PROGRESS
- - IEC 62014-3 (ICEM) Integrated Circuit Electromagnetic Model Proposal
  (formerly, IEC 93/67/NP IBIS and EMC Simulation) - No report.
- - JEDEC Activity Report. Lynne Green reported that 35 persons attended her
  IBIS Modeling class at the JEDEX conference on March 24, 2003 in San
  Diego, California.  Seminar A was entitled "An Introduction to IBIS 
  Models and Model Validation." Seminar B was called "IBIS Models for 
  High-Speed Interfaces."  Class material is not yet available on the web.

DATE2003 EUROPEAN IBIS SUMMIT MEETING REPORT
Eckhard Lenski gave a brief report on the European IBIS summit. Eckhard
noted that only one EDA vendor was in attendance.  Eckhard also remarked
that there were questions on the status of various IBIS projects, and it
would have been good to have an IBIS officer in attendance to answer those
questions. 

Bob Ross reported positive comments from several people who attended.  The
presentations were interesting and informative, and people enjoyed good
interaction.

Bob noted that a DATE2004 meeting is scheduled in the Paris area in April
2004.  We will put it on the Upcoming events link.  Chances are good that
Zuken will be able to help again on this meeting.

DAC2003 AND DESIGNCON2003 EAST MEETING PROPOSALS
Stephen Peters indicated that we need to decide on holding an IBIS Summit
meeting at DAC2003 in Anaheim California on Thursday, June 5, 2003.  John
Angulo reserved a room through Mentor Graphics at the Marriot Hotel, but 
needs a quick decision.  We are planning to also hold a meeting at the 
DesignCon East conference in Marlborough, Massachusetts on Monday, June 23,
2003.

Stephen reported that as much as he would like to be able to attend and
hand off the chairmanship, he will not be able to travel to DAC this year.
He also noted that early indications are that membership will be down
this year, and that we need to keep in mind that the hotel room and 
conference will cost on the order of $2,000USD. 

In the following discussion, Lynn Green indicated that she can attend. 
Representatives from Mentor Graphics and Intel will also be attending.
Arpad Muranyi noted that many persons plan on attending the June DAC 
conference, and for consistency we should continue to hold this meeting.
It was noted by several folks that whatever we decide there is no reason
not to hold a summit at DesignCon East.  After further discussion we 
agreed to hold an IBIS summit meeting at DAC on June 5th.

Stephen reported that planning for an IBIS summit meeting at Designcon2003 
East in Marlborough, Massachusetts continues. The summit is scheduled for 
June 23, 2003 in the Royal Plaza Hotel in Marlborough, Massachusetts. The
meeting room is yet to be determined. Stephen noted that we are also a
co-sponsor of DesignCon2003 East. Barry Katz from SiSoft has indicated that
he is willing to serve as the contact for registration and sign-up, so if
you are planning on attending please let Barry know. The upcoming events
link on the IBIS web page will be updated with more details as they become
available. Finally, Stephen mentioned that we have traded refreshments for
a telephone line so that the meeting can be web telecast. Bob Ross remarked
that we will be soliciting companies to sponsor the lunch.

It was noted that we will need to obtain an LCD projector for the room at
DAC. Guy de Burgh will check on projector availability.  Finally, Stephen
mentioned that announcements for both the DAC and DesignCon East summit
meetings will go out early next week.

IBIS VERSION 4.0 PARSER FUNDING AND STATUS
Stephen Peters reported that the EIA has received IBIS 4.0 parser payments 
from five companies, with three more pending. Stephen is working with EIA 
to get updated numbers. 

UPCOMING IBIS OFFICER ELECTIONS
Stephen Peters announced that the annual election of IBIS officers will be
held at the June 5, 2003 summit meeting at DAC.  Officer positions are open
to representatives of any member company, and nominations are open from now
until the election.  You need not attend the summit meeting in person to 
be elected. 

Stephen also announced that he will not run for a third term as IBIS chair.
Stephen asked for early nominations for IBIS chair, and Bob Ross nominated 
Michael Mirmak to serve as IBIS Chair for 2003-2004. Stephen stated that
nominations for the other IBIS officer positions are welcome, however please
check with the nominee beforehand to ensure that they are willing to serve.
Stephen noted that Lynne Green, Randy Wolff, Syed Huq, Roy Leventhal and 
John Angulo have all agreed to continue in their current positions of 
Vice-Chair, Secretary, Webmaster, Librarian, and Postmaster respectively.

IBIS QUALITY COMMITTEE
Bob Haller reported on the IBIS Quality Committee meeting on March 25, 2003.
The next meeting is scheduled for April 8, 2003. The Quality Committee is
continuing to work on the quality checklist, compiling individual sections
into one document. The goal is to have a draft document available at
DesignCon East. Bob noted that there was a lot of interest expressed in
IBIS quality at the European IBIS Summit, and he also expects good
attendance from Quality Committee members at the DesignCon East Summit in
June.

IBIS MODEL REVIEW COMMITTEE
Lynne Green reported that a model from the Marvell Technology Group has
been distributed to committee members for review. 

NEW ADMINISTRATIVE ISSUES
None.

IBIS FUTURES AND CONNECTOR WORKING GROUP REPORT
Stephen Peters reported that the IBIS connector working group met on March
13, March 21, and again on March 27, 2003.  The editorial and technical 
issues raised previously have all been addressed, but several new issues
dealing with S-parameter representation and usage have been raised. The
committee is working through these issues and expects to do a final read
through of the document at their next meeting on April 4, 2003.  Stephen
expects a final draft of the Rev. 1.0 ICM specification to be available
for IBIS Open Forum review by April 15, 2003.  

In response to a question from Michael Mirmak, Stephen stated that we 
would review and accept comment on the ICM specification for a period of
three teleconference meetings before putting it up for a formal vote.  This 
will give time for comment, as well as additional testing by the parser
developer. 

On a related topic, Arpad Muranyi noted that he has sent Stephen a list of 
editorial comments on the Touchstone format specification that appears on
the IBIS website.  Arpad asked how these comments should be handled. After
a short discussion it was agreed to review these comments in the next
connector working group meeting. Arpad will forward his comments to the
connector working group members.  Stephen noted that we will formally 
consider adopting the Touchstone format specification document along with
the ICM specification. 

BIRD79 - Non-linear buffer impedance (extension to C_comp)
Stephen Peters opened the discussion on BIRD79 by summarizing the previous
discussions on this BIRD. The consensus was that modeling the effects of 
non-linear buffer impedances is best done using the multi-lingual modeling
extensions to IBIS.  Because of this, BIRD79 should be rejected and instead
the methodology should be documented in a technical paper.  BIRD79 co-author
Luca Giacotto agreed with this recommendation.  After a formal vote BIRD79 
was rejected.  Luca agreed to work with Arpad Muranyi to author a technical
white paper on modeling the effects of non-linear output impedance in
IBIS using the multi-lingual extensions. In response to a question from
Arpad, it was agreed that this paper should include an implementation 
written in one of the -AMS languages. 

BIRD74.2 - EMI Parameters
Guy de Burgh stated that Eckhard Lenski at Siemens and the representative 
from Zuken are still very interested in BIRD74 and would like to see 
further discussion of including EMI modeling in IBIS. Stephen Peters
agreed to defer a vote on this BIRD. Guy agreed to put together a review
of BIRD74 for discussion at the next teleconference meeting. Bob Ross noted
that the EMI modeling parameters and information introduced by BIRD74 are
not something covered by the multi-lingual modeling extensions. Bob also
noted EMI modeling should be targeted for an IBIS release beyond the pending 
IBIS 4.1.  

IBISCHK3 & BUG TRACKING STATUS
In follow-up to last teleconferences discussion on bug fixes, Stephen
Peters reported that Atul Agarwal has agreed to incorporate the fixes for
BUG75, BUG76 and BUG68 into the code for the IBIS 4.0 parser.

John Angulo reported that he has taken a preliminary look at BUG68 and 
BUG73. BUG68, entitled "False messages with Repeated Voltages", is a very
simple fix. However, BUG73, entitled "Extreme Non-monotonic I-V Tables Cause
End Point Test to Fail," is more complicated. In brief, non-monotonic
points in the clamp table cause the parser to extrapolate the table
endpoints incorrectly, thus the end point test fails. After further 
discussion it was decided that John will pursue this problem further and
propose a specific fix.  Arpad Muranyi requested that he be involved in
reviewing the proposed fix. 

- - BUG71 - Monotonic Checking for Combined I-V Tables
  Stephen Peters will post Bob Haller's response to the reflector for
  discussion and resolution at the next teleconference. 

- - BUG74 - Missing Timing Test Load Warning Messages
  Stephen Peters will post the clarification text to the IBIS reflector for
  discussion and disposition at the next teleconference.

NEXT MEETING:
The next teleconference meeting is scheduled for April 18, 2003 from 8:00 
AM to 10:00 AM Pacific Daylight Time.
============================================================================
                                      NOTES

IBIS CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-1831
            [email-masked]
            Senior Hardware Engineer, Intel Corporation
            M/S JF4-215
            2111 NE 25th Ave.
            Hillsboro, OR 97124-5961

VICE CHAIR: Lynne Green (425) 788-0412, Fax: (425) 788-4289
            [email-masked]
            Senior Modeling Engineer, Cadence Design Systems
            20 120th Ave NE, Suite 103, Bellevue, WA 98005-3016

SECRETARY:  Randy Wolff (208) 363-1764, Fax: (208) 368-3475
            [email-masked]
            Simulation Engineer, Micron Technology, Inc.
            8000 S. Federal Way
            Mail Stop: 711
            Boise, ID 83707-0006
        
LIBRARIAN:  Roy Leventhal (847) 590-9398
            [email-masked]
            Consultant, Leventhal Design and Communications
            1924 North Burke Drive
            Arlington Heights, Illinois 60004

WEBMASTER:  Syed Huq (408) 525-3399, Fax: (408) 526-5504
            [email-masked]
            Manager, Hardware Engineering, Cisco Systems
            170 West Tasman Drive
            San Jose, CA 95134-1706

POSTMASTER: John Angulo (425) 497-5077, Fax: (425) 881-1008
            [email-masked]
            Development Engineer, Mentor Graphics
            14715 N.E. 95th Street, Suite 200
            Redmond, WA 98052

This meeting was conducted in accordance with the EIA Legal Guides and EIA 
Manual of Organization and Procedure.

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      To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
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Information on IBIS technical contents, IBIS participants, and actual IBIS 
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------------------------------

Date: Tue, 1 Apr 2003 11:21:02 -0800 
From: "Peters, Stephen" <[email-masked]>
Subject: [IBIS-Users] IBIS parser bug74 update

This message is in MIME format. Since your mail reader does not understand
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Hello All:
 
  At the last IBIS teleconference I took the action item to post additional
information from Greg Edlund on ibischk BUG74 ("Missing Timing Test Load
Warning Messages") so that this bug report could be considered at the next
teleconference.  The additional information, which deals with default
assumptions for timing test loads and what combinations are required per
model type, is below.  To see the entire bug report, visit the following
URL.
http://www.eda.org/pub/ibis/bugs/ibischk/bug74
<http://www.eda.org/pub/ibis/bugs/ibischk/bug74> 
 
Regards,
Stephen Peters
Intel Corp.
 
********************************************
1. Implied defaults Cref=0, Vref=0, Rref=infinity

   I don't think this belongs in the error message because it is tool
   specific.  Each tool vendor must decide on the default value of these
   parameters.

2. Model_types (I/0*, Output*, 3-state*, Open*
   Covered by table below.

3. Possible Rref value needed for Open*
   Covered by table below.

4. Mention that [Model Spec] may contain the parameters and needs to be
   part of the check, if it exists.

   As I read the IBIS spec, the Vmeas subparameter defined under the
   [Model Spec] keyword pertains to input timing thresholds, whereas
   BUG74 pertains to output timing test loads.  These are two different
   things; therefore the bug fix can ignore the Vmeas subparameter when
   it occurs under the [Model Spec] keyword.

                   Vmeas       Rref/Vref
                   Required    Required
                   --------    --------
Input              NO          NO
I/O                YES         NO
I/O_open_drain     YES         YES
I/O_open_sink      YES         YES
I/O_open_source    YES         YES
Input_ECL          NO          NO
I/O_ECL            YES         YES
Terminator         NO          NO
Output             YES         NO
3-state            YES         NO
Open_sink          YES         YES
Open_drain         YES         YES
Open_source        YES         YES
Input_ECL          NO          NO
Output_ECL         YES         YES
I/O_ECL            YES         YES
3-state_ECL        YES         YES
Series             NO          NO
Series_switch      NO          NO

****************************************************************************
**
****************************************************************************
**

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<DIV><SPAN class=359121219-01042003><FONT face=Arial size=2>Hello 
All:</FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial size=2>&nbsp; At the last 
IBIS teleconference I took the action item to post&nbsp;additional information 
from Greg Edlund on ibischk BUG74&nbsp;("Missing Timing Test Load&nbsp;Warning 
Messages") so that this bug report could be considered at the next 
teleconference.&nbsp; The additional information, which deals with default 
assumptions for timing test loads and what combinations are required per model 
type,&nbsp;is below.&nbsp; To see the entire bug report, visit the following 
URL.</FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial size=2><A 
href="http://www.eda.org/pub/ibis/bugs/ibischk/bug74">http://www.eda.org/pub/ibis/bugs/ibischk/bug74</A></FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial 
size=2>Regards,</FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial size=2>Stephen 
Peters</FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial size=2>Intel 
Corp.</FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=359121219-01042003><FONT face="Courier New" 
size=2>********************************************</FONT></SPAN></DIV>
<DIV><SPAN class=359121219-01042003><FONT face="Courier New" size=2>1. Implied 
defaults Cref=0, Vref=0, Rref=infinity<BR><BR>&nbsp;&nbsp; I don't think this 
belongs in the error message because it is tool<BR>&nbsp;&nbsp; specific.&nbsp; 
Each tool vendor must decide on the default value of these<BR>&nbsp;&nbsp; 
parameters.<BR><BR>2. Model_types (I/0*, Output*, 3-state*, 
Open*<BR>&nbsp;&nbsp; Covered by table below.<BR><BR>3. Possible Rref value 
needed for Open*<BR>&nbsp;&nbsp; Covered by table below.<BR><BR>4. Mention that 
[Model Spec] may contain the parameters and needs to be<BR>&nbsp;&nbsp; part of 
the check, if it exists.<BR><BR>&nbsp;&nbsp; As I read the IBIS spec, the Vmeas 
subparameter defined under the<BR>&nbsp;&nbsp; [Model Spec] keyword pertains to 
input timing thresholds, whereas<BR>&nbsp;&nbsp; BUG74 pertains to output timing 
test loads.&nbsp; These are two different<BR>&nbsp;&nbsp; things; therefore the 
bug fix can ignore the Vmeas subparameter when<BR>&nbsp;&nbsp; it occurs under 
the [Model Spec] 
keyword.<BR><BR><BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
Vmeas&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
Rref/Vref<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
Required&nbsp;&nbsp;&nbsp; 
Required<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
- --------&nbsp;&nbsp;&nbsp; 
- --------<BR>Input&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>I/O&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>I/O_open_drain&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>I/O_open_sink&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>I/O_open_source&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>Input_ECL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>I/O_ECL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>Terminator&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>Output&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>3-state&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>Open_sink&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>Open_drain&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>Open_source&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>Input_ECL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>Output_ECL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>I/O_ECL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>3-state_ECL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
YES<BR>Series&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR>Series_switch&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
NO<BR><BR>******************************************************************************<BR>******************************************************************************<BR></FONT></SPAN></DIV></BODY></HTML>

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------------------------------

Date: Wed, 2 Apr 2003 19:35:44 -0800
From: "Eric Hsu" <[email-masked]>
Subject: [IBIS-Users] s2ibis2 issue

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Hi,

Is there anywhere I can get script in order to generate ibis model for =
version 3.2, but not only for version 2.1? If not, how can I build IBIS =
model with option of version 3.2 (like"[Model spec]") by s2ibis2?
The other question is: what's different for ibis model of input buffer =
with or without schmitt trigger feature? Just Vinh+/-, Vinl+/-  with =
schmitt trigger?
Can we also provide threshold voltage as Vinh+/-, Vinl+/- even receiver =
without any hysteresis function?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems, Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198
This e-mail contains NetLogic Microsystems, Inc. Confidential =
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------------------------------

Date: Wed, 2 Apr 2003 20:45:24 -0800
From: "Tom Dagostino" <[email-masked]>
Subject: [IBIS-Users] RE: s2ibis2 issue

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Usually people ust add the Model Spec stuff by hand editing.

Tom Dagostino

Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC

2926 SE Yamhill St.                Device Modeling Division

Portland, OR 97214                 13610 SW Harness Lane

                                   Beaverton, OR 97008

http://www.teraspeed.com           503-430-1065 

[email-masked]

>  -----Original Message-----
> From: 	Eric Hsu [mailto:[email-masked]]  On Behalf
> Of Eric Hsu
> Sent:	Wednesday, April 02, 2003 7:36 PM
> To:	Ibis-Users (E-mail)
> Subject:	s2ibis2 issue
> 
> Hi,
> 
> Is there anywhere I can get script in order to generate ibis model for
> version 3.2, but not only for version 2.1? If not, how can I build IBIS
> model with option of version 3.2 (like"[Model spec]") by s2ibis2?
> The other question is: what's different for ibis model of input buffer
> with or without schmitt trigger feature? Just Vinh+/-, Vinl+/-  with
> schmitt trigger?
> Can we also provide threshold voltage as Vinh+/-, Vinl+/- even receiver
> without any hysteresis function?
> 
> Best Regards,
> 
> Eric Hsu
> Interface Technologies
> NetLogic Microsystems, Inc.
> 450 National Ave.
> Mountain View, CA 94043
> 650-961-6676 x198
> This e-mail contains NetLogic Microsystems, Inc. Confidential information
> 
> 

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------------------------------

Date: Thu, 3 Apr 2003 00:02:21 -0500
From: "Ambrish Varma" <[email-masked]>
Subject: [IBIS-Users] RE: s2ibis2 issue

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Eric,
The answer to the first part of your question is that as of now, you
have to add features of ver 3.2 manually to the ibis file created by
s2ibis2.
Work is underway to complete a version of s2ibis3  ASAP.
Regards,
Ambrish Varma

Ambrish K Varma
[email-masked]
(919)513-2015

		-----Original Message-----
		From: Eric Hsu [mailto:[email-masked]] On
Behalf Of Eric Hsu
		Sent: Wednesday, April 02, 2003 10:36 PM
		To: Ibis-Users (E-mail)
		Subject: s2ibis2 issue

		Hi,

		Is there anywhere I can get script in order to generate
ibis model for version 3.2, but not only for version 2.1? If not, how
can I build IBIS model with option of version 3.2 (like"[Model spec]")
by s2ibis2?
		The other question is: what's different for ibis model
of input buffer with or without schmitt trigger feature? Just Vinh+/-,
Vinl+/-  with schmitt trigger?
		Can we also provide threshold voltage as Vinh+/-,
Vinl+/- even receiver without any hysteresis function?

		Best Regards,

		Eric Hsu
		Interface Technologies
		NetLogic Microsystems, Inc.
		450 National Ave.
		Mountain View, CA 94043
		650-961-6676 x198
		This e-mail contains NetLogic Microsystems, Inc.
Confidential information

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<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">Eric,</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">The answer to the first part of your question is that as =
of now, you have to add features of ver 3.2 manually to the ibis file =
created by s2ibis2.</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">Work is underway to complete a version of s2ibis3&nbsp; =
ASAP.</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">Regards,</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">Ambrish Varma</FONT></SPAN></P>
<BR>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"></SPAN><A NAME=3D""><SPAN =
LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 FACE=3D"Arial">Ambrish K =
Varma</FONT></SPAN></A></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">[email-masked]</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000080" SIZE=3D2 =
FACE=3D"Arial">(919)513-2015</FONT></SPAN><SPAN =
LANG=3D"en-us"></SPAN><SPAN LANG=3D"en-us"></SPAN><SPAN =
LANG=3D"en-us"></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"></SPAN></P>
<UL><UL>
<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Tahoma">-----Original Message-----<BR>
</FONT></SPAN><SPAN LANG=3D"en-us"><B></B></SPAN><SPAN =
LANG=3D"en-us"><B><FONT SIZE=3D2 =
FACE=3D"Tahoma">From:</FONT></B></SPAN><SPAN LANG=3D"en-us"></SPAN><SPAN =
LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Tahoma"> Eric Hsu [<A =
HREF=3D"mailto:[email-masked]">mailto:[email-masked]<=
/A>]</FONT></SPAN><SPAN LANG=3D"en-us"><B></B></SPAN><SPAN =
LANG=3D"en-us"><B> <FONT SIZE=3D2 FACE=3D"Tahoma">On Behalf =
Of</FONT></B></SPAN><SPAN LANG=3D"en-us"></SPAN><SPAN LANG=3D"en-us"> =
<FONT SIZE=3D2 FACE=3D"Tahoma">Eric Hsu<BR>
</FONT></SPAN><SPAN LANG=3D"en-us"><B></B></SPAN><SPAN =
LANG=3D"en-us"><B><FONT SIZE=3D2 =
FACE=3D"Tahoma">Sent:</FONT></B></SPAN><SPAN LANG=3D"en-us"></SPAN><SPAN =
LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Tahoma"> Wednesday, April 02, 2003 =
10:36 PM<BR>
</FONT></SPAN><SPAN LANG=3D"en-us"><B></B></SPAN><SPAN =
LANG=3D"en-us"><B><FONT SIZE=3D2 =
FACE=3D"Tahoma">To:</FONT></B></SPAN><SPAN LANG=3D"en-us"></SPAN><SPAN =
LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Tahoma"> Ibis-Users (E-mail)<BR>
</FONT></SPAN><SPAN LANG=3D"en-us"><B></B></SPAN><SPAN =
LANG=3D"en-us"><B><FONT SIZE=3D2 =
FACE=3D"Tahoma">Subject:</FONT></B></SPAN><SPAN =
LANG=3D"en-us"></SPAN><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Tahoma"> s2ibis2 issue</FONT></SPAN><SPAN =
LANG=3D"en-us"></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Arial">Hi,</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">Is =
there anywhere I can get script in order to generate ibis model for =
version 3.2, but not only for version 2.1? If not, how can I build IBIS =
model with option of version 3.2 (like&quot;[Model spec]&quot;) by =
s2ibis2?</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">The =
other question is: what's different for ibis model of input buffer with =
or without schmitt trigger feature? Just Vinh+/-, Vinl+/-&nbsp; with =
schmitt trigger?</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">Can =
we also provide threshold voltage as Vinh+/-, Vinl+/- even receiver =
without any hysteresis function?</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">Best =
Regards,</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">Eric =
Hsu</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Arial">Interface Technologies</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Arial">NetLogic Microsystems, Inc.</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">450 =
National Ave.</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Arial">Mountain View, CA 94043</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 =
FACE=3D"Arial">650-961-6676 x198</FONT></SPAN></P>

<P ALIGN=3DLEFT><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Courier =
New">This e-mail contains NetLogic Microsystems, Inc. Confidential =
information</FONT></SPAN></P>
<BR>
</UL></UL>
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------------------------------

Date: Thu, 03 Apr 2003 18:37:24 -0500
From: Sudheer B S <[email-masked]>
Subject: [IBIS-Users] IBIS connector Models 

I have  some quections  regarding  the  IBIS connector Models

How  these  IBIS connector Models  will be helpful to  Specctraquest Users ??
(because in Specctraquest  Package models will be used  for connectors )

Which tool will support  these Connector Models ??

Does   these models will be helpful in Multiboard analysis ??  since
it  takes signal name  instead of  UNSPEC

 Thank you

SUDHEER  B S

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------------------------------

Date: Thu, 3 Apr 2003 11:27:14 -0500
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS connector Models 

At this time, the IBIS Interconnect/Connector specification is still in
draft form.  The
support of S-parameter models in Touchstone format might be of
particular interest
for those building models from test data .

This reflector is not a suitable place to discuss product-specific
details.  Vendors
should be contacted for product information.

Best regards,
Lynne

Lynne Green
Cadence Design Systems

- -----Original Message-----
From: Sudheer B S [mailto:[email-masked]] 
Sent: Thursday, April 03, 2003 3:37 PM
To: [email-masked]
Subject: [IBIS-Users] IBIS connector Models 

I have  some quections  regarding  the  IBIS connector Models

How  these  IBIS connector Models  will be helpful to  Specctraquest
Users ?? (because in Specctraquest  Package models will be used  for
connectors )

Which tool will support  these Connector Models ??

Does   these models will be helpful in Multiboard analysis ??  since
it  takes signal name  instead of  UNSPEC

 Thank you

SUDHEER  B S

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------------------------------

Date: Thu, 03 Apr 2003 13:49:55 -0500
From: Peter LaFlamme <[email-masked]>
Subject: Re: [IBIS-Users] IBIS connector Models

I think the question about which vendors support of ibis features is valid. Maybe it should be phrased as "Does any vendor's softward support this?" or "Does any software vendor plan to support these connector models". 

New ibis specs and features are being added, however the software programs that I have used still do not even support all of the features in the IBIS 3.2 Specification, and we are at IBIS 4... Users of IBIS models and IC vendors need to know this
information since IBIS models can be very time consuming and difficult to create. It can certainly be a waste of time if all of the software that is available is still only IBIS 2.1 compatible.

Regards,
Peter

- -- 
Peter LaFlamme

Applied Micro Circuits Corp.
System Applications Engineer
200 Minuteman Rd, 3rd Floor
Andover, MA 01810

Lynne Green wrote:
> 
> At this time, the IBIS Interconnect/Connector specification is still in
> draft form.  The
> support of S-parameter models in Touchstone format might be of
> particular interest
> for those building models from test data .
> 
> This reflector is not a suitable place to discuss product-specific
> details.  Vendors
> should be contacted for product information.
> 
> Best regards,
> Lynne
> 
> Lynne Green
> Cadence Design Systems
> 
> -----Original Message-----
> From: Sudheer B S [mailto:[email-masked]]
> Sent: Thursday, April 03, 2003 3:37 PM
> To: [email-masked]
> Subject: [IBIS-Users] IBIS connector Models
> 
> I have  some quections  regarding  the  IBIS connector Models
> 
> How  these  IBIS connector Models  will be helpful to  Specctraquest
> Users ?? (because in Specctraquest  Package models will be used  for
> connectors )
> 
> Which tool will support  these Connector Models ??
> 
> Does   these models will be helpful in Multiboard analysis ??  since
> it  takes signal name  instead of  UNSPEC
> 
>  Thank you
> 
> SUDHEER  B S
> 
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------------------------------

End of ibis-users V1 #19
************************