Subject: ibis-users V1 #24
From: owner-ibis-users@ (ibis-users)
To: [email-masked]

ibis-users           Wednesday, May 28 2003           Volume 01 : Number 024

----------------------------------------------------------------------

Date: 14 May 2003 09:11:37 -0700
From: Syed Huq <[email-masked]>
Subject: Re: [IBIS-Users] Problem in ibs file generated by s2ibs2

First of all, you are using an older version of s2ibis2. You should
download the s2ibis2_fix.tar.Z

I have seen these repetition of data points. Not sure what causes it.
You have to delete them to clean up the file.

Delete everything below 3.6V as well as one of the -0.9 entries.

Syed

On Wed, 2003-05-14 at 04:56, Birendra Rana wrote:
> Hi all,
>  
> I have generated an IBIS Model for an I/O buffer using s2ibis2 script.
> Interestingly the generated ibs file has entries in the Pull down
> table as follows :
>  
> [Pulldown]
> |  voltage         I(typ)           I(min)             I(max)
> |
>      -1.80          -42.50mA     -54.11mA         -28.61mA
>       .
>       .
>       .
>      -0.90         -36.68mA     -30.62mA        -38.74mA
>      -0.90         -36.68mA     -30.62mA        -38.74mA  <-
> Repetition of above data
>      -0.80         -37.07mA     -29.68mA        -41.00mA
>       .
>       .
>       .
>       0.00             0.36uA         2.61nA            2.86uA
>       .
>       .
>       .
>       3.60            94.05mA      80.81mA           0.11A
>       0.00             -1.80A          0.11kA          -92.95A   <- 
> ?????
>  -137.28             -1.70A        -99.02A          -82.08A   <- 
> ?????
>       3.60            94.05mA      80.81mA           0.11A     <-
> Repetition of 3.60V entry data
>  
> Similar kind of entries (like the repetition of -0.90V and 3.60V data
> and extra 2 rows) are there in the Pullup table. The ".out"
> files however look alright.
>  
> Any reasons for these extra / repetitive entries ? 
>  
> Regards,
>  
> Birendra 
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------------------------------

Date: Wed, 14 May 2003 14:52:58 -0400
From: "Mike LaBonte" <[email-masked]>
Subject: RE: [IBIS-Users] Problem in ibs file generated by s2ibs2

The fixed s2ibis2 prints 4 digits after the decimal instead of 2. With only
2 digits, voltage differences less than 10mV between points make them appear
identical.

Also there is a parameter in s2idflt.h:

#define DIODE_DROP_DEFAULT              1.0

This is used by s2ibis2 to jump around in the SPICE data to find beginnings
and ends of "linear" and "non-linear" regions. On lower voltage devices the
1V value makes s2ibis2 jump too far and pick up wrong data or ignore data.
Change the value to 0.7, recompile, and s2ibis2 will work better.

Mike LaBonte

> -----Original Message-----
> From: [email-masked] [mailto:[email-masked]]On
> Behalf Of Syed Huq
> Sent: Wednesday, May 14, 2003 12:12 PM
> To: Birendra Rana
> Cc: [email-masked]
> Subject: Re: [IBIS-Users] Problem in ibs file generated by s2ibs2
>
>
> First of all, you are using an older version of s2ibis2. You should
> download the s2ibis2_fix.tar.Z
>
> I have seen these repetition of data points. Not sure what causes it.
> You have to delete them to clean up the file.
>
> Delete everything below 3.6V as well as one of the -0.9 entries.
>
> Syed
>
> On Wed, 2003-05-14 at 04:56, Birendra Rana wrote:
> > Hi all,
> >
> > I have generated an IBIS Model for an I/O buffer using s2ibis2 script.
> > Interestingly the generated ibs file has entries in the Pull down
> > table as follows :
> >
> > [Pulldown]
> > |  voltage         I(typ)           I(min)             I(max)
> > |
> >      -1.80          -42.50mA     -54.11mA         -28.61mA
> >       .
> >       .
> >       .
> >      -0.90         -36.68mA     -30.62mA        -38.74mA
> >      -0.90         -36.68mA     -30.62mA        -38.74mA  <-
> > Repetition of above data
> >      -0.80         -37.07mA     -29.68mA        -41.00mA
> >       .
> >       .
> >       .
> >       0.00             0.36uA         2.61nA            2.86uA
> >       .
> >       .
> >       .
> >       3.60            94.05mA      80.81mA           0.11A
> >       0.00             -1.80A          0.11kA          -92.95A   <-
> > ?????
> >  -137.28             -1.70A        -99.02A          -82.08A   <-
> > ?????
> >       3.60            94.05mA      80.81mA           0.11A     <-
> > Repetition of 3.60V entry data
> >
> > Similar kind of entries (like the repetition of -0.90V and 3.60V data
> > and extra 2 rows) are there in the Pullup table. The ".out"
> > files however look alright.
> >
> > Any reasons for these extra / repetitive entries ?
> >
> > Regards,
> >
> > Birendra
> > **************************Disclaimer************************************
> >
> > Information contained in this E-MAIL being proprietary to Wipro
> Limited is
> > 'privileged' and 'confidential' and intended for use only by
> the individual
> >  or entity to which it is addressed. You are notified that any
> use, copying
> > or dissemination of the information contained in the E-MAIL in
> any manner
> > whatsoever is strictly prohibited.
> >
> >
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------------------------------

Date: Wed, 14 May 2003 14:09:49 -0700
From: Kannan Srinivasagam <[email-masked]>
Subject: [IBIS-Users] Question On Input buffers

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Hi,
        Could someone clarify why my input buffer gnd clamp  IV table
starts from -1.50ua at -1.5V goes to 0 at 0V and goes back to 1.5ua at
1.5V. Is this correct. I believe it should start from  a specific value
and go down to 0V. Just want to know what might be wrong : is it my
spice netlist( working fine with spice sims) or my .s2i file.

Thanks
Kannan

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------------------------------

Date: Thu, 15 May 2003 13:05:34 +0200
From: [email-masked]
Subject: RE: [IBIS-Users] (lv)pecl 

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__________________

Dear Tom,

Herewith I send you the s2i file that causes the errors described 
previously. As I understand from the reactions here, some more people have 
encountered similar problems.

With kind regards,

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

"Tom Dagostino" <[email-masked]>
05/14/03 07:20 PM
Please respond to tom

        To:     Erik van der Ven/NYM/SC/PHILIPS@EMEA2
        cc: 
        Subject:        RE: [IBIS-Users] (lv)pecl
        Classification: 

s2i is all I need for now.
 
Tom Dagostino
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
                                   Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065 
[email-masked] 
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On Behalf Of [email-masked]
Sent: Wednesday, May 14, 2003 6:25 AM
To: [email-masked]
Subject: RE: [IBIS-Users] (lv)pecl

Tom, 

Do you need the netlist as well, or is the plain s2i file good enough for 
you? (because I cannot send you the spectre file). 

Birendra seems to have a similar problem. 

Alex, 

I am using Spectre for simulations. 

With kind regards, 
Erik. 

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334 

"Tom Dagostino" <[email-masked]> 
05/12/03 05:53 PM 
Please respond to tom 
        
        To:        Erik van der Ven/NYM/SC/PHILIPS@EMEA2 
        cc:         
        Subject:        RE: [IBIS-Users] (lv)pecl 
        Classification:         

I've seen some other models with this kind of issue in them from s2ibis. 
I'm not sure what causes this, it was a while ago and the half life of old 
problems is relatively short.  I would first start by looking at the input 
file that is generated.  Be sure you do not have any typos in it, that the 
voltages are correct, etc.  Send me a copy if you want and I'll take a 
look at it. 
  
Tom Dagostino 
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC 
2926 SE Yamhill St.                Device Modeling Division 
Portland, OR 97214                 13610 SW Harness Lane 
                                   Beaverton, OR 97008 
http://www.teraspeed.com           503-430-1065 
[email-masked] 
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On Behalf Of [email-masked]
Sent: Monday, May 12, 2003 12:37 AM
To: [email-masked]
Subject: RE: [IBIS-Users] (lv)pecl

Tom, 

About the garbage lines: 
I use s2ibis for model type output_ECL. 
Voltage range has been  left out (since this created a voltage source of 
1.9V to the ground node in the spectre simulation files). 
Pull-up and pull-down references have been set to 3.3V. 

The result is an IBIS file that contains a pulldown-curve starting at 1.1V 
and continuing up to 3.3V. 
Then the next voltages are: 2.05, 9 times 0V and 3.3V. Most currents are 
equal to the 3.3V current except for the max current, which is increasing 
for every line (note that I filled in the typical values for the the min 
and max cases). 

The pull-up curve ranges from 0V to 2.2V and is then followed by 10 times 
0V and 2.2V. The current for the 0V lines is always 0.000A, except for the 
first one. 

So I get some strange values and the range is from 0-2.2V instead of -3.3 
to 6.6V. 

With kind regards, 

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334 

"Tom Dagostino" <[email-masked]> 
05/09/03 07:11 PM 
Please respond to tom 
        
       To:        Erik van der Ven/NYM/SC/PHILIPS@EMEA2 
       cc:         
       Subject:        RE: [IBIS-Users] (lv)pecl 
        Classification:         

Erik 
 
In the old days (in the 60s) when Motorola first developed ECL They found 
that running ECL from 0 to -5.2 volts worked better because the ground 
planes on boards at the time was cleaner.  ECL is referenced to the most 
positive supply, thus a clean reference was important.  In those days the 
ground could have been a complete plane of the board but power was in many 
cases distributed via traces on one of the layer.  In today's modern 
circuit boards both the power and ground are distributed in planes so this 
is not an issue.   
 
The voltage difference you see is not important.  When you are running the 
SPICE simulation you just need to connect the Vcc to 3.3 and the Vee to 
ground to get the PECL model.  Remember the 50 Ohm termination needs to be 
connected to Vcc - 2 volts or 1.3 for the typical case when running the AC 
simulations. 
 
I do have concerns about the table range you are seeing.  It should be 
between -3.3 and +6.6 Volts for all the IV tables. 
 
The simulator does several things with the data.  First of all it will 
check the data to ensure it is at least consistent, has not syntax issues, 
etc.  Then, for outputs, it builds a set of coefficients that describes 
how the buffer transitions from pullup to pulldown and from pulldown to 
pullup.  This table is based on the VT waveforms and the IV curves. 
 
The output impedance of the buffer is composed of the sum of the pullup or 
pulldown IV table plus the power and ground clamps plus the component of 
C_comp. 
 
If the buffer is an input the the power and ground clamps are summed and 
put in parallel with C_comp. 
 
Because the model is designated ECL, the simulator makes one different 
calculation for the pulldown table than it does for CMOS, see below. 
 
What is the 10 lines of garbage you are seeing? 
 
Hope that helps. 
 
Tom Dagostino 
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC 
2926 SE Yamhill St.                Device Modeling Division 
Portland, OR 97214                 13610 SW Harness Lane 
                                  Beaverton, OR 97008 
http://www.teraspeed.com           503-430-1065 
[email-masked] 
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On Behalf Of [email-masked]
Sent: Friday, May 09, 2003 12:41 AM
To: [email-masked]
Subject: RE: [IBIS-Users] (lv)pecl

Tom, 

Thank you for your reply. I am starting with a Spectre netlist. I have 
tried s2ibis to make a model for LVPECL. 
I noticed some differences. ECL has a supply of 0V (plus) and -5.2V (neg). 
My circuit has a supply of 3.3V (plus) and 0V (neg). 
The pulldown table ranges from 1.1V to 3.3V (the pull down reference has 
been set to 3.3V, the pull-up reference as well), followed by ten lines of 
garbage. A collegue of mine has changed to pragram a bit so the pull down 
curve starts at 0V and ends at 2.2V (still followed by ten lines of 
garbage). 
Is this a correct range? 
What does the simulator that uses the IBIS model do with the information 
that it is an output-ECL model type? And how are the data tables 
interpreted in conjunction with the ECL_model type? 

With kind regards, 

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure 
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334 

"Tom Dagostino" <[email-masked]> 
05/08/03 07:16 PM 
Please respond to tom 
        
      To:        Erik van der Ven/NYM/SC/PHILIPS@EMEA2 
      cc:         
      Subject:        RE: [IBIS-Users] (lv)pecl 
        Classification:         

Erik 

What are you starting with?  A SPICE description or are you going to make 
the model from measurements?  If you start with SPICE there is a spice to 
ibis program that you can download from the ibis home page.  If you are 
starting from measurements then you will need a lot of equipment to make 
the measurements.  You will have to manually convert the measurements to 
the ibis data. 

Simulators use the output_ecl line to know how to handle ECL.  In IBIS ECL 
models are slightly different than standard CMOS or TTL drivers.  In CMOS 
or TTL the pulldown current is sunk into the ground plane and the pullup 
current is sourced from the supply.  With PECL both the pullup and 
pulldown are sourced from the supply.  So in PECL the pulldown is 
referenced to the supply, not ground.  The simulator needs to know this 
when it is using the IV tables. 

Tom Dagostino 
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC 
2926 SE Yamhill St.                Device Modeling Division 
Portland, OR 97214                 13610 SW Harness Lane 
                                 Beaverton, OR 97008 
http://www.teraspeed.com           503-430-1065 
[email-masked] 
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On Behalf Of [email-masked]
Sent: Thursday, May 08, 2003 12:04 AM
To: [email-masked]
Subject: [IBIS-Users] (lv)pecl

Dear all, 

I think I mailed my question too early since I subscribed to the user 
group at the same time. So I'll post it again, please see below. 

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334 
- ----- Forwarded by Erik van der Ven/NYM/SC/PHILIPS on 05/08/03 09:03 AM 
- ----- 

Erik van der Ven 
05/06/03 02:01 PM 
        
     To:        [email-masked] 
     cc:         
     Subject:        (lv)pecl 
        Classification:        Unclassified 

1. How can I make an IBIS model of a (LV)PECL model? 
2. What does an IBIS simulator do with the model type information (like 
output_ECL)? 

Can anyone help me? 
Thanks. 

With kind regards, 

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334 

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<br>
<br><font size=2 face="sans-serif">__________________</font>
<br>
<br><font size=2 face="sans-serif">Dear Tom,</font>
<br>
<br>
<br><font size=2 face="sans-serif">Herewith I send you the s2i file that causes the errors described previously. As I understand from the reactions here, some more people have encountered similar problems.</font>
<br>
<br>
<br><font size=2 face="sans-serif">With kind regards,</font>
<br>
<br>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td>
<br>
<br>
<br>
<br>
<br><font size=1 face="sans-serif"><b>&quot;Tom Dagostino&quot; &lt;[email-masked]&gt;</b></font>
<p><font size=1 face="sans-serif">05/14/03 07:20 PM</font>
<br><font size=1 face="sans-serif">Please respond to tom</font>
<br>
<td><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; cc: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;RE: [IBIS-Users] (lv)pecl</font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br></table>
<br>
<br>
<br><font size=2 color=blue face="Arial">s2i is all I need for now.</font>
<br><font size=3 face="Times New Roman">&nbsp;</font>
<br><font size=3 face="Courier New">Tom Dagostino</font>
<br><font size=3 face="Courier New">Teraspeed Consulting Group LLC &nbsp; &nbsp; Teraspeed Consulting Group LLC</font>
<br><font size=3 face="Courier New">2926 SE Yamhill St. &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Device Modeling Division</font>
<br><font size=3 face="Courier New">Portland, OR 97214 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 13610 SW Harness Lane</font>
<br><font size=3 face="Courier New">&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Beaverton, OR 97008</font>
<br><font size=3 face="Courier New">http://www.teraspeed.com &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 503-430-1065 </font>
<p><font size=3 face="Courier New">[email-masked]</font><font size=3 face="Times New Roman"> </font>
<br><font size=2 face="Tahoma">-----Original Message-----<b><br>
From:</b> [email-masked] [mailto:[email-masked]]<b>On Behalf Of </b>[email-masked]<b><br>
Sent:</b> Wednesday, May 14, 2003 6:25 AM<b><br>
To:</b> [email-masked]<b><br>
Subject:</b> RE: [IBIS-Users] (lv)pecl<br>
</font>
<br><font size=2 face="sans-serif"><br>
Tom, </font><font size=3 face="Times New Roman"><br>
</font><font size=2 face="sans-serif"><br>
Do you need the netlist as well, or is the plain s2i file good enough for you? (because I cannot send you the spectre file).</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
Birendra seems to have a similar problem.</font><font size=3 face="Times New Roman"> <br>
<br>
</font><font size=2 face="sans-serif"><br>
Alex,</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
I am using Spectre for simulations.</font><font size=3 face="Times New Roman"> <br>
<br>
</font><font size=2 face="sans-serif"><br>
With kind regards,</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Erik.</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
<br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font><font size=3 face="Times New Roman"> <br>
<br>
</font>
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&quot;Tom Dagostino&quot; &lt;[email-masked]&gt;</b></font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">05/12/03 05:53 PM</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
Please respond to tom</font><font size=3 face="Times New Roman"> </font>
<td width=53%><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp; &nbsp;To: &nbsp; &nbsp; &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp; &nbsp;cc: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp; &nbsp;Subject: &nbsp; &nbsp; &nbsp; &nbsp;RE: [IBIS-Users] (lv)pecl</font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font></table>
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<br>
</font><font size=2 color=blue face="Arial"><br>
I've seen some other models with this kind of issue in them from s2ibis. &nbsp;I'm not sure what causes this, it was a while ago and the half life of old problems is relatively short. &nbsp;I would first start by looking at the input file that is generated. &nbsp;Be sure you do not have any typos in it, that the voltages are correct, etc. &nbsp;Send me a copy if you want and I'll take a look at it.</font><font size=3 face="Times New Roman"> <br>
 &nbsp;</font><font size=3 face="Courier New"><br>
Tom Dagostino</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
Teraspeed Consulting Group LLC &nbsp; &nbsp; Teraspeed Consulting Group LLC</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
2926 SE Yamhill St. &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Device Modeling Division</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
Portland, OR 97214 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 13610 SW Harness Lane</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; Beaverton, OR 97008</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
http://www.teraspeed.com &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 503-430-1065 </font>
<p><font size=3 face="Courier New">[email-masked]</font><font size=3 face="Times New Roman"> </font><font size=2 face="Tahoma"><br>
- -----Original Message-----<b><br>
From:</b> [email-masked] [mailto:[email-masked]]<b>On Behalf Of </b>[email-masked]<b><br>
Sent:</b> Monday, May 12, 2003 12:37 AM<b><br>
To:</b> [email-masked]<b><br>
Subject:</b> RE: [IBIS-Users] (lv)pecl</font><font size=3 face="Times New Roman"><br>
</font><font size=2 face="sans-serif"><br>
<br>
Tom, <br>
<br>
About the garbage lines:</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
I use s2ibis for model type output_ECL.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Voltage range has been &nbsp;left out (since this created a voltage source of 1.9V to the ground node in the spectre simulation files).</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Pull-up and pull-down references have been set to 3.3V.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
The result is an IBIS file that contains a pulldown-curve starting at 1.1V and continuing up to 3.3V.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Then the next voltages are: 2.05, 9 times 0V and 3.3V. Most currents are equal to the 3.3V current except for the max current, which is increasing for every line (note that I filled in the typical values for the the min and max cases).</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
The pull-up curve ranges from 0V to 2.2V and is then followed by 10 times 0V and 2.2V. The current for the 0V lines is always 0.000A, except for the first one.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
So I get some strange values and the range is from 0-2.2V instead of -3.3 to 6.6V.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
With kind regards,</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
<br>
<br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font><font size=3 face="Times New Roman"> <br>
</font>
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&quot;Tom Dagostino&quot; &lt;[email-masked]&gt;</b></font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">05/09/03 07:11 PM</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
Please respond to tom</font><font size=3 face="Times New Roman"> </font>
<td width=53%><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp; cc: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;RE: [IBIS-Users] (lv)pecl</font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font></table>
<p><font size=3 face="Times New Roman"><br>
</font><font size=2 color=blue face="Arial"><br>
<br>
Erik</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
In the old days (in the 60s) when Motorola first developed ECL They found that running ECL from 0 to -5.2 volts worked better because the ground planes on boards at the time was cleaner. &nbsp;ECL is referenced to the most positive supply, thus a clean reference was important. &nbsp;In those days the ground could have been a complete plane of the board but power was in many cases distributed via traces on one of the layer. &nbsp;In today's modern circuit boards both the power and ground are distributed in planes so this is not an issue. &nbsp;</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
The voltage difference you see is not important. &nbsp;When you are running the SPICE simulation you just need to connect the Vcc to 3.3 and the Vee to ground to get the PECL model. &nbsp;Remember the 50 Ohm termination needs to be connected to Vcc - 2 volts or 1.3 for the typical case when running the AC simulations.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
I do have concerns about the table range you are seeing. &nbsp;It should be between -3.3 and +6.6 Volts for all the IV tables.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
The simulator does several things with the data. &nbsp;First of all it will check the data to ensure it is at least consistent, has not syntax issues, etc. &nbsp;Then, for outputs, it builds a set of coefficients that describes how the buffer transitions from pullup to pulldown and from pulldown to pullup. &nbsp;This table is based on the VT waveforms and the IV curves.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
The output impedance of the buffer is composed of the sum of the pullup or pulldown IV table plus the power and ground clamps plus the component of C_comp.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
If the buffer is an input the the power and ground clamps are summed and put in parallel with C_comp.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
Because the model is designated ECL, the simulator makes one different calculation for the pulldown table than it does for CMOS, see below.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
What is the 10 lines of garbage you are seeing?</font><font size=3 face="Times New Roman"> <br>
 </font><font size=2 color=blue face="Arial"><br>
Hope that helps.</font><font size=3 face="Times New Roman"> <br>
 </font><font size=3 face="Courier New"><br>
Tom Dagostino</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
Teraspeed Consulting Group LLC &nbsp; &nbsp; Teraspeed Consulting Group LLC</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
2926 SE Yamhill St. &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Device Modeling Division</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
Portland, OR 97214 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 13610 SW Harness Lane</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Beaverton, OR 97008</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
http://www.teraspeed.com &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 503-430-1065 </font>
<p><font size=3 face="Courier New">[email-masked]</font><font size=3 face="Times New Roman"> </font><font size=2 face="Tahoma"><br>
- -----Original Message-----<b><br>
From:</b> [email-masked] [mailto:[email-masked]]<b>On Behalf Of </b>[email-masked]<b><br>
Sent:</b> Friday, May 09, 2003 12:41 AM<b><br>
To:</b> [email-masked]<b><br>
Subject:</b> RE: [IBIS-Users] (lv)pecl</font><font size=2 face="sans-serif"><br>
<br>
<br>
Tom,</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
Thank you for your reply. I am starting with a Spectre netlist. I have tried s2ibis to make a model for LVPECL.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
I noticed some differences. ECL has a supply of 0V (plus) and -5.2V (neg). My circuit has a supply of 3.3V (plus) and 0V (neg).</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
The pulldown table ranges from 1.1V to 3.3V (the pull down reference has been set to 3.3V, the pull-up reference as well), followed by ten lines of garbage. A collegue of mine has changed to pragram a bit so the pull down curve starts at 0V and ends at 2.2V (still followed by ten lines of garbage).</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Is this a correct range?</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
What does the simulator that uses the IBIS model do with the information that it is an output-ECL model type? And how are the data tables interpreted in conjunction with the ECL_model type?</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
With kind regards,</font><font size=3 face="Times New Roman"> </font>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font><font size=3 face="Times New Roman"> </font>
<table width=100%>
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<td width=2%>
<td width=44%><font size=3 face="Times New Roman"><br>
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&quot;Tom Dagostino&quot; &lt;[email-masked]&gt;</b></font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">05/08/03 07:16 PM</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
Please respond to tom</font><font size=3 face="Times New Roman"> </font>
<td width=53%><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp;To: &nbsp; &nbsp; &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp;cc: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; &nbsp;Subject: &nbsp; &nbsp; &nbsp; &nbsp;RE: [IBIS-Users] (lv)pecl</font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font></table>
<p><font size=2 color=blue face="Arial"><br>
<br>
<br>
Erik</font><font size=3 face="Times New Roman"> </font><font size=2 color=blue face="Arial"><br>
<br>
What are you starting with? &nbsp;A SPICE description or are you going to make the model from measurements? &nbsp;If you start with SPICE there is a spice to ibis program that you can download from the ibis home page. &nbsp;If you are starting from measurements then you will need a lot of equipment to make the measurements. &nbsp;You will have to manually convert the measurements to the ibis data.</font><font size=3 face="Times New Roman"> </font><font size=2 color=blue face="Arial"><br>
<br>
Simulators use the output_ecl line to know how to handle ECL. &nbsp;In IBIS ECL models are slightly different than standard CMOS or TTL drivers. &nbsp;In CMOS or TTL the pulldown current is sunk into the ground plane and the pullup current is sourced from the supply. &nbsp;With PECL both the pullup and pulldown are sourced from the supply. &nbsp;So in PECL the pulldown is referenced to the supply, not ground. &nbsp;The simulator needs to know this when it is using the IV tables.</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
<br>
Tom Dagostino</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
Teraspeed Consulting Group LLC &nbsp; &nbsp; Teraspeed Consulting Group LLC</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
2926 SE Yamhill St. &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Device Modeling Division</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
Portland, OR 97214 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 13610 SW Harness Lane</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; Beaverton, OR 97008</font><font size=3 face="Times New Roman"> </font><font size=3 face="Courier New"><br>
http://www.teraspeed.com &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 503-430-1065 </font>
<p><font size=3 face="Courier New">[email-masked]</font><font size=3 face="Times New Roman"> </font><font size=2 face="Tahoma"><br>
- -----Original Message-----<b><br>
From:</b> [email-masked] [mailto:[email-masked]]<b>On Behalf Of </b>[email-masked]<b><br>
Sent:</b> Thursday, May 08, 2003 12:04 AM<b><br>
To:</b> [email-masked]<b><br>
Subject:</b> [IBIS-Users] (lv)pecl</font><font size=2 face="sans-serif"><br>
<br>
<br>
Dear all,</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
I think I mailed my question too early since I subscribed to the user group at the same time. So I'll post it again, please see below.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font><font size=3 face="Times New Roman"> </font><font size=1 color=#800080 face="sans-serif"><br>
- ----- Forwarded by Erik van der Ven/NYM/SC/PHILIPS on 05/08/03 09:03 AM -----</font><font size=3 face="Times New Roman"> </font>
<table width=100%>
<tr valign=top>
<td width=4%>
<td width=34%><font size=3 face="Times New Roman"><br>
</font><font size=1 face="sans-serif"><b><br>
<br>
<br>
<br>
Erik van der Ven</b></font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">05/06/03 02:01 PM</font><font size=3 face="Times New Roman"> </font>
<td width=60%><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp; &nbsp;[email-masked]</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; cc: &nbsp; &nbsp; &nbsp; &nbsp;</font><font size=3 face="Times New Roman"> </font><font size=1 face="sans-serif"><br>
 &nbsp; &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;(lv)pecl</font><font size=3 face="Times New Roman"> </font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;Unclassified</font><font size=3 face="Times New Roman"> </font></table>
<p><font size=2 face="sans-serif"><br>
<br>
1. How can I make an IBIS model of a (LV)PECL model?</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
2. What does an IBIS simulator do with the model type information (like output_ECL)?</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
Can anyone help me?</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
Thanks.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
With kind regards,</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
<br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font><font size=3 face="Times New Roman"> </font>
<p>
<p>
- --=_alternative 003D1E82C1256D27_=--
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Content-Type: application/octet-stream; name="pecl12.s2i"
Content-Disposition: attachment; filename="pecl12.s2i"
Content-Transfer-Encoding: base64

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Date: Thu, 15 May 2003 15:43:48 +0200
From: [email-masked]
Subject: [IBIS-Users] ibis simulation with spectre?

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Is it possible to simulate IBIS models with spectre? This makes it easy to 
compare the model to the spectre simulations.

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334
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<br><font size=2 face="sans-serif">Is it possible to simulate IBIS models with spectre? This makes it easy to compare the model to the spectre simulations.</font>
<br>
<br>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
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------------------------------

Date: Thu, 15 May 2003 12:11:41 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: Re: [IBIS-Users] Question On Input buffers

That sounds like the current from a 1 MegOhm resistor to ground.

The IBIS "Clamp" tables include everything that is present on inputs, or
outputs when not actively driving.  That includes leakage current, on-chip
terminators, other resistors or always-enabled FETs, etc.  Not just diodes.

The fact that the current is only -1.50 uA at -1.5 V implies that there is
no actual diode in your model.

Regards,
Andy

>         Could someone clarify why my input buffer gnd clamp  IV table
> starts from -1.50ua at -1.5V goes to 0 at 0V and goes back to 1.5ua at
> 1.5V. Is this correct. I believe it should start from  a specific value
> and go down to 0V. Just want to know what might be wrong : is it my
> spice netlist( working fine with spice sims) or my .s2i file.

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|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
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------------------------------

Date: 15 May 2003 09:34:40 -0700
From: Syed Huq <[email-masked]>
Subject: Re: [IBIS-Users] Question On Input buffers

For a GND Clamp at -1.5V, you should see a large current and not in uA.
It means your GND Clamp(if present), did not turn on.

When you say, "working fine with spice sims", what current value do you
get at -1.5V ?

Syed

On Wed, 2003-05-14 at 14:09, Kannan Srinivasagam wrote:
> Hi,
>         Could someone clarify why my input buffer gnd clamp  IV table
> starts from -1.50ua at -1.5V goes to 0 at 0V and goes back to 1.5ua at
> 1.5V. Is this correct. I believe it should start from  a specific value
> and go down to 0V. Just want to know what might be wrong : is it my
> spice netlist( working fine with spice sims) or my .s2i file.
> 
> Thanks
> Kannan
> 
> 
|------------------------------------------------------------------
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|with just the appropriate command message(s) in the body:
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------------------------------

Date: Thu, 15 May 2003 09:36:14 -0700
From: Kannan Srinivasagam <[email-masked]>
Subject: Re: [IBIS-Users] Question On Input buffers

Hi,
         I reran the spice sims. There was something wrong in the netlist
itself. The diode was some reason was not turning on. It is working now when
I reextracted the netlist.

Thanks for all your help.

Kannan

Syed Huq wrote:

> For a GND Clamp at -1.5V, you should see a large current and not in uA.
> It means your GND Clamp(if present), did not turn on.
>
> When you say, "working fine with spice sims", what current value do you
> get at -1.5V ?
>
> Syed
>
> On Wed, 2003-05-14 at 14:09, Kannan Srinivasagam wrote:
> > Hi,
> >         Could someone clarify why my input buffer gnd clamp  IV table
> > starts from -1.50ua at -1.5V goes to 0 at 0V and goes back to 1.5ua at
> > 1.5V. Is this correct. I believe it should start from  a specific value
> > and go down to 0V. Just want to know what might be wrong : is it my
> > spice netlist( working fine with spice sims) or my .s2i file.
> >
> > Thanks
> > Kannan
> >
> >

|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email [email-masked]
|with just the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
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|  unsubscribe ibis       <optional e-mail address, if different>
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------------------------------

Date: Thu, 15 May 2003 12:08:08 -0700
From: "Angulo, John" <[email-masked]>
Subject: RE: [IBIS-Users] (lv)pecl

The following is posted on behalf of Alex Hilbers at ASML.  Please send any private replies to [email-masked] only.

- -----Original Message-----
Date: Wed, 14 May 2003 10:37:22 +0200 (MEST)
From: Alex Hilbers <[email-masked]>
Reply-To: Alex Hilbers <[email-masked]>
Subject: RE: [IBIS-Users] (lv)pecl
To: [email-masked], [email-masked]
MIME-Version: 1.0
Content-Type: TEXT/plain; charset=us-ascii
Content-MD5: mzgGSqmVM0Jh8ykmeiLdvA==
X-Mailer: dtmail 1.3.0 @(#)CDE Version 1.4.6_06 SunOS 5.8 sun4u sparc 

Erik,

I donot know which type of Spice simulator you use, but within PStar you should 
be able to find Most Model 9. When characterisation has been done correctly, 
this model includes non-ideal clamp diodes. 
If you are using HSpice: Philips Most Model 9 is found in HSpice as level 50, if 
memory serves me well.

Regards,

Alex

> From: [email-masked]
> To: [email-masked]
> Subject: RE: [IBIS-Users] (lv)pecl
> MIME-Version: 1.0
> Date: Tue, 13 May 2003 10:49:50 +0200
> X-MIMETrack: Serialize by Router on ehv001soh/H/SERVER/PHILIPS(Release 5.0.9a 
|January 7, 2002) at 13/05/2003 10:50:12, Serialize complete at 13/05/2003 
10:50:12
> 
> As Tom and Fred suggest I have to add "some" resistance to the clamp 
> diodes to prevent high currents. Must these device models be characterised 
> or should I just add an arbitrary value. If so what will be the value of 
> this information. I still don't have the insight what an IBIS simulator 
> does do with the clamping info? 
> 
> With kind regards,
> 
> 
> Ir. Erik van der Ven
> Room DB1032
> Business Line Networking Infrastructure
> Philips Semiconductors BV
> Gerstweg 2
> 6534 AE Nijmegen
> The Netherlands
> Phone: +31-24-3534334
> 
> 
> 
> 
> 
> 
> 
> 
> 
> "Tom Dagostino" <[email-masked]>
> 05/12/03 06:41 PM
> Please respond to tom
> 
>  
>         To:     Erik van der Ven/NYM/SC/PHILIPS@EMEA2
> <[email-masked]>
>         cc: 
>         Subject:        RE: [IBIS-Users] (lv)pecl
>         Classification: 
> 
> 
> 
> Erik
>  
> Fred is right that for an ECL model that the voltage range that has to be 
> characterized is over the 0 to Vcc - 2V range in the table.  I like to see 
> at least the active region between 0 and Vcc modeled.  There are some ECL 
> parts that will not be adequately characterized by only going from 0 to 
> Vcc - 2V.  If I remember correctly ON Semi makes some ECL line drivers 
> that have about twice the swing of normal ECL.
>  
> Fred, the garbage Erik referred to was multiple lines in the tables that 
> have the same voltage values and zero current.  I've seen  models with 
> this before but I don't remember the cause of it.
>  
> Yes, IBIS likely goes too far into the clamp regions for characterization. 
>  If your clamp currents are extreme it is likely that the clamp diodes 
> have not been properly characterized in their SPICE models.  If you are 
> seeing more than a few amperes in the clamps you can assume the intrinsic 
> resistance of the diodes, the metal, etc. have not been fully 
> characterized.  To eliminate this try adding a few hundred milli Ohms in 
> series with the clamps to bring the currents down to a more realistic 
> level.
>  
> Tom Dagostino
> Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
> 2926 SE Yamhill St.                Device Modeling Division
> Portland, OR 97214                 13610 SW Harness Lane
>                                    Beaverton, OR 97008
> http://www.teraspeed.com           503-430-1065 
> [email-masked] 
> -----Original Message-----
> From: [email-masked] 
[mailto:[email-masked]]On Behalf Of 
[email-masked]
> Sent: Monday, May 12, 2003 1:44 AM
> To: [email-masked]
> Subject: Re: [IBIS-Users] (lv)pecl
> 
> 
> Dear Fred, 
> 
> Thank you for your reply. About the garbage; I explained it in an email I 
> just sent (directed to Tom). 
> 
> The s2ibis program does not generate IV- tables from 0-2.2V, but the 
> program that has been modified by my collegue does do this (apart from the 
> "garbage" that both programs produce). 
> Is this range enough? According to Tom it should be -3.3-6.6V. Where is 
> this range for ECL/PECL defined? I cannot find it in the specification. 
> 
> When the voltage is out of the normal operating range the currents can be 
> very high, even so high that the transistor models are not valid anymore. 
> What is the use of specifying these currents? Can they be left out? If 
> not, what is done with this information. 
> I have the same question for the clamp currents. The output can be 
> disabled, so this is a kind of tri-state (not really high impedant). Also 
> here the currents are unrealistically high. What is done with this 
> information? Why must it be specified? The PECL voltage swing is such that 
> even a fully reflected signal will not cause the output to be outside the 
> supply range. 
> 
> With kind regards, 
> 
> 
> 
> Ir. Erik van der Ven
> Room DB1032
> Business Line Networking Infrastructure
> Philips Semiconductors BV
> Gerstweg 2
> 6534 AE Nijmegen
> The Netherlands
> Phone: +31-24-3534334 
> 
> 
> 
> 
> 
> 
> 
> 
> Fred Balistreri <[email-masked]> 
> Sent by: 
> [email-masked] 
> 05/09/03 07:10 PM 
>         
>         To:        Erik van der Ven/NYM/SC/PHILIPS@EMEA2 
>         cc:         
>         Subject:        Re: [IBIS-Users] (lv)pecl 
>         Classification:         
> 
> 
> 
> Erik, you need to define what convention you are
> using when you say voltage range. Remember that
> for ECL and PECL both the pullup and pulldown
> reference is the same. If the voltage range
> you refer to is the IBIS Vtable then your
> range is not correct. Under the IBIS conventions
> for ECL or PECL type Vtable= Vcc - Vout.
> This is true for both pullup/pulldown for PECL/ECL.
> IBIS further explains that for ECL, PECL the
> range should be VCC - 2.2 volts. Under the
> IBIS rules then the range should always be
> 0 - 2.2 volts for both pullup and pulldown.
> Note that 0 really means 3.3 at the output
> for your case and 2.2 really means 1.1 at the
> output.
> 
> I don't quite understand your problem. You state
> garbage. It's probably not quite descriptive 
> enough to understand your issue. Although the
> meaning is clear.
> 
> 
> Best Regards,
> 
> [email-masked] wrote:
> > 
> >    Part 1.1Type: Plain Text (text/plain)
> 
> -- 
> Fred Balistreri
> [email-masked]
> 
> http://www.apsimtech.com
> 
> 
> 

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alex Hilbers         Email:      [email-masked]
ASML                 Tel:        +31(0)402685587
P.O. Box 324         Fax:        +31(0)402685530
5500 AH  Veldhoven   Building    7K-0002
The Netherlands      Department: EDEV
Signal Integrity and Thermal Analysis
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

|------------------------------------------------------------------
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|with just the appropriate command message(s) in the body:
|
|  help
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|
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|
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|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Thu, 15 May 2003 12:12:49 -0700
From: "Angulo, John" <[email-masked]>
Subject: Re: [IBIS-Users] Problem in ibs file generated by s2ibs2

The following is posted on behalf of Itzik Peleg at Marvell Semiconductor.  Please send any private replies to [email-masked] only.

- -----Original Message-----
Date: Wed, 14 May 2003 17:31:19 +0200
From: Itzik Peleg <[email-masked]>
X-Mailer: Mozilla 4.74 [en] (Windows NT 5.0; U)
X-Accept-Language: en
MIME-Version: 1.0
To: Birendra Rana <[email-masked]>
CC: [email-masked]
Subject: Re: [IBIS-Users] Problem in ibs file generated by s2ibs2
References: <[email-masked]>
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Hello Birendra

This is a common "Bug" that spice to ibis has.
Just delete the unnecessary lines.

- --
Regards

Itzik Peleg
Board Technology Group

Marvell Semiconductor Israel Ltd
Moshav Manof, D.N. Misgav 20184, ISRAEL
Email - [email-masked]
Tel   - +972 4 9951192
Cell  - +972 54 452482
Fax   - +972 4 9999334
WWW Page: http://www.marvell.com
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|with just the appropriate command message(s) in the body:
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------------------------------

Date: Thu, 15 May 2003 19:37:38 -0400
From: "Lynne Green" <[email-masked]>
Subject: [IBIS-Users] IBIS Summits: Third Call for DAC, Second Call for DesignCon East

* Third Call for Papers for IBIS Summit at DAC
* Second Call for Papers for IBIS Summit at DesignCon East

- -----------------------------------------------------------------------
                     IBIS SUMMIT AT DAC
                        THIRD CALL FOR
               PARTICIPATION & PRESENTATIONS
- -----------------------------------------------------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

              I B I S   S U M M I T   M E E T I N G

Time/Date:  Thursday June 5, 2003,  8:00 AM to 5:00 PM

Location:   Marriot Hotel
                Anaheim, CA

Content:    Presentations and Discussions

Purpose:    Solicit and Exchange IBIS Model Related Information and
Ideas.

Sponsors:   Cadence Design Systems
            
            If your company would be interested in helping to
            sponsor this event, please contact Lynne Green
            <[email-masked]>.

DAC:    June 2-6, 2003
            Anaheim Convention Center
            Anaheim, California
            See <http://www.dac.com/> for more information.

BACKGROUND

DesignCon is the premier annual Silicon Valley event for the electronic
design automation (EDA) and semiconductor industry. Topics of current
interest to the EIA IBIS Open Forum are addressed at DAC.

This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations are expected to be available and archived in an electronic
format, and minutes of the meeting will be issued. Any pending formal
decisions (votes) will be announced at least two weeks prior to the
meeting.

The annual election of officers will be held.  Nominations can be sent
to Stephen Peters <[email-masked]> or made at the meeting.

CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and
digital circuit design are invited to participate to the Summit meeting.
If you plan to participate, please register with the information below:

   Name:
   E-mail address:
   Company:
   Telephone:

Send to:

    Guy de Burgh at Mentor Graphics ([email-masked])

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS experiences
or issues.

Format of Presentation:  LCD Projection with Windows laptop.
Time:			15-30 Minutes
Electronic Archival: We request electronic versions so that the
                  presentations can be archived and also made
                  available to non-attendees.  Formats used in
                  the past have been text, Power Point, Word,
                  Postscript, and Acrobat.  Electronic copies
                  of presentations should be made available by
                  May 30, 2003 for uploading and copying to the
                  presentation laptop.

If you plan a presentation, please supply

   Title:
   Presenter:
   E-mail address:
   Company:
   Telephone:

   Estimate Time:

Also, please indicate if you are also interested in presenting this
presentation at DesignCon East, Marlborough, MA, on June 23, 2003.

Send this to:

  Lynne Green ([email-masked])

AGENDA

The agenda includes presentations, discussions, breaks, and a luncheon
(which will be provided).  This will be developed as presentation
proposals are received.

The following individuals have signed up to present at the summit
(presentation titles are tentative).
* IBIS Status Update, Stephen Peters (Intel Corp)
* Behavioral VHDL-AMS I/O buffer model using IBIS, Arpad Muranyi (Intel
Corp)  
* Quality Committee Update, Barry Katz (SiSoft)
* Observations on Problems Encountered, Atsuji Ito (Panasonic) 
* ICM Status and Update, Michael Mirmak (Intel Corp.)
* Modeling On-die Terminations, Arpad Muranyi (Intel Corp.)

LIST OF NEARBY HOTELS

See <http://www.dac.com/40th/travel.html> for travel directions, hotels
and other information.
- -----------------------------------------------------------------

- -----------------------------------------------------------------------
               IBIS SUMMIT at DESIGNCON EAST
                     SECOND CALL FOR
               PARTICIPATION & PRESENTATIONS
- -----------------------------------------------------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

              I B I S   S U M M I T   M E E T I N G

Time/Date:  Monday, June 23, 2003,  8:00 AM to 5:00 PM

Location:   Best Western Royal Plaza Hotel and Trade Center
                Marlboro, Massachusetts

Content:    Presentations and Discussions

Purpose:    Solicit and Exchange IBIS Model Related Information
             and Ideas.

Sponsors:   DesignCon East, IBIS Open Forum, and
            Signal Integrity Software, Inc. (SiSoft)

            If your company would be interested in being a sponsor,
            please contact Lynne Green <[email-masked]>.
            Sponsorships are needed for the teleconference phone
            line, lunch, and coffee breaks.

DesignCon East: June 23-25, 2003
            Best Western Royal Plaza Hotel and Trade Center
            Marlborough Massachusetts

            DesignCon offers a 30% discount for IBIS members who
            register for the technical program at
            http://www.iec.org/events/2003/designcon_east/ibis.html.

	See <http://www.iec.org/events/2003/designcon_east/> for
            more information.

BACKGROUND

DesignCon is the premier annual Silicon Valley event for the electronic
design automation (EDA) and semiconductor industry.  Topics of current
interest to the EIA IBIS Open Forum are addressed at DesignCon.

This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations are expected to be available and archived in an electronic
format, and minutes of the meeting will be issued. Any pending formal
decisions (votes) will be announced at least two weeks prior to the
meeting.

CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and
digital circuit design are invited to participate to the Summit meeting.
If you plan to participate, please register with the information below:

   Name:
   E-mail address:
   Company:
   Telephone:

Send to:

   Terry Roulic <[email-masked]>

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS experiences
or issues.

Format of Presentation:  LCD Projection with Windows laptop.
Time:          15-30 Minutes
Electronic Archival: We request electronic versions so that the
                  presentations can be archived and also made
                  available to non-attendees.  Formats used in
                  the past have been text, Power Point, Word,
                  Postscript, and Acrobat.  Electronic
                  presentations should be made available by
                  June 18, 2003 for uploading and copying to
                  the presentation laptop.

If you plan a presentation, please supply

   Title:
   Presenter:
   E-mail address:
   Company:
   Telephone:

   Estimate Time:

Send this to:

  Lynne Green ([email-masked])

AGENDA

The agenda includes presentations, discussions, breaks, and a luncheon
(which will be provided).  This will be developed as presentation
proposals are received.

The following individuals have signed up to present at the summit
(presentation titles are tentative).
* IBIS Status Update, Stephen Peters (Intel Corp)
* Behavioral VHDL-AMS I/O buffer model using IBIS, Arpad Muranyi (Intel
Corp)  
* Quality Committee Update, Barry Katz (SiSoft) 

LIST OF NEARBY HOTELS

Please see
<http://www.iec.org/events/2003/designcon_east/attendee/hotel.html>
for travel directions, hotels and other information.
- -----------------------------------------------------------------
|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email [email-masked]
|with just the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
|  subscribe   ibis-users <optional e-mail address, if different>
|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to [email-masked].
|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Fri, 16 May 2003 07:25:07 +0530
From: "Shripadaraj Annigeri" <[email-masked]>
Subject: RE: [IBIS-Users] ibis simulation with spectre?

This is a multi-part message in MIME format.

- ------_=_NextPart_001_01C31B4E.2D01AEB0
Content-Type: text/plain;
	charset="us-ascii"
Content-Transfer-Encoding: quoted-printable

Hi I have simila question.
=20
How one compares with simulation of IBIS using traditional circuit
simulator like hspice with SI simulators like spectraquest or XTK etc.
Do SI simulators have any advantage as far as simulation of IBIS models
(only).
=20
=20

Regards,

Shripad

=20

A D Shripadaraj

Wipro Technologies

72, Electronics City

Bangalore 561 229

India

Tel: +91-80-8520408  Extension: 4270

Mobile : 98450 19924

=20

=20

=20

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]

Sent: Thursday, May 15, 2003 7:14 PM
To: [email-masked]
Subject: [IBIS-Users] ibis simulation with spectre?

Is it possible to simulate IBIS models with spectre? This makes it easy
to compare the model to the spectre simulations.=20

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

**************************Disclaimer************************************

Information contained in this E-MAIL being proprietary to Wipro Limited is=
=20
'privileged' and 'confidential' and intended for use only by the individual
 or entity to which it is addressed. You are notified that any use, copying=
=20
or dissemination of the information contained in the E-MAIL in any manner=20
whatsoever is strictly prohibited.

***************************************************************************

- ------_=_NextPart_001_01C31B4E.2D01AEB0
Content-Type: text/html;
	charset="us-ascii"
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; charset=
=3Dus-ascii">
<TITLE>Message</TITLE>

<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN class=
=3D078585201-16052003>Hi I=20
have simila question.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D078585201-16052003></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN class=
=3D078585201-16052003>How=20
one compares with simulation of IBIS using traditional circuit simulator=
 like=20
hspice with SI simulators like spectraquest or XTK etc.&nbsp; Do SI=
 simulators=20
have any advantage as far as simulation of IBIS models=20
(only).</SPAN></FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;</DIV>
<DIV class=3DSection1>
<P class=3DMsoNormal align=3Dleft><SPAN=20
style=3D"FONT-SIZE: 10pt; FONT-FAMILY: Arial">Regards,</SPAN></P>
<P class=3DMsoNormal align=3Dleft><SPAN=20
style=3D"FONT-SIZE: 10pt; FONT-FAMILY: Arial">Shripad</SPAN></P>
<P class=3DMsoNormal>&nbsp;</P>
<P class=3DMsoNormal><SPAN class=3DSpellE><SPAN=20
style=3D"COLOR: blue; FONT-FAMILY: 'Comic Sans MS'; mso-bidi-font-family:=
 Arial"></SPAN></SPAN></P>
<P class=3DMsoNormal><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: blue; FONT-FAMILY: 'Comic Sans MS';=
 mso-bidi-font-family: Arial"><EM>A=20
D Shripadaraj</EM></SPAN></P>
<P class=3DMsoNormal><SPAN=20
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  [email-masked]<BR><B>Subject:</B> [IBIS-Users] ibis simulation with=20
  spectre?<BR><BR></FONT></DIV><BR><FONT face=3Dsans-serif size=3D2>Is it=
 possible=20
  to simulate IBIS models with spectre? This makes it easy to compare the=
 model=20
  to the spectre simulations.</FONT> <BR><BR><BR><FONT face=3Dsans-serif=20
  size=3D2><BR>Ir. Erik van der Ven<BR>Room DB1032<BR>Business Line=
 Networking=20
  Infrastructure<BR>Philips Semiconductors BV<BR>Gerstweg 2<BR>6534 AE=20
  Nijmegen<BR>The Netherlands<BR>Phone:=20
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------------------------------

Date: Fri, 16 May 2003 12:16:50 +0200
From: [email-masked]
Subject: Re: [IBIS-Users] ibis simulation with spectre?

This is a multipart message in MIME format.
- --=_alternative 0038A8D8C1256D28_=
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I am very glad to hear that it's no problem to simulate IBIS models with 
Spectre, but although it sounds easy I still don't know what to do.
To what tools and windows are refering? I assumed you meant the Cadence 
design environment, but I am not sure. In the library manager I don't see 
the button. Could you please give some more details?

With kind regards,

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

[email-masked]
05/15/03 04:06 PM

        To:     Erik van der Ven/NYM/SC/PHILIPS@EMEA2
        cc: 
        Subject:        Re: [IBIS-Users] ibis simulation with spectre?
        Classification: 

No problem at all.
Just tranlate the IBIS file to dml (Tranlate Botton at the bottom part of
the Library Window). Notice to translate with no Errrs.
Then click OK and select the IBIS device--> Pin_No or IBIS Model.

_____________________________
Naftali Refaeli
EDS-ECI
Analog & High Speed Applications
_/~~~\____/~\__/~\_____/~\_____

mailto:[email-masked]
Phone:  +972-3-9266973            Fax:  +972-3-9268188

  
                      erik.van.der.ven@   
                      philips.com               To: [email-masked]     
 
                      Sent by:                  cc:   
                      owner-ibis-users@         Subject: [IBIS-Users] ibis 
simulation with spectre? 
                      eda.org  

                      15/05/2003 16:43   

Is it possible to simulate IBIS models with spectre? This makes it easy to
compare the model to the spectre simulations.

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

- --=_alternative 0038A8D8C1256D28_=
Content-Type: text/html; charset="us-ascii"

<br><font size=2 face="sans-serif">I am very glad to hear that it's no problem to simulate IBIS models with Spectre, but although it sounds easy I still don't know what to do.</font>
<br><font size=2 face="sans-serif">To what tools and windows are refering? I assumed you meant the Cadence design environment, but I am not sure. In the library manager I don't see the button. Could you please give some more details?</font>
<br>
<br><font size=2 face="sans-serif">With kind regards,</font>
<br>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td>
<br>
<br>
<br>
<br>
<br><font size=1 face="sans-serif"><b>[email-masked]</b></font>
<p><font size=1 face="sans-serif">05/15/03 04:06 PM</font>
<br>
<td><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; cc: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;Re: [IBIS-Users] ibis simulation with spectre?</font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br></table>
<br>
<br>
<br><font size=2 face="Courier New"><br>
No problem at all.<br>
Just tranlate the IBIS file to dml (Tranlate Botton at the bottom part of<br>
the Library Window). Notice to translate with no Errrs.<br>
Then click OK and select the IBIS device--&gt; Pin_No or IBIS Model.<br>
<br>
_____________________________<br>
Naftali Refaeli<br>
EDS-ECI<br>
Analog &amp; High Speed Applications<br>
_/~~~\____/~\__/~\_____/~\_____<br>
<br>
mailto:[email-masked]<br>
Phone: &nbsp;+972-3-9266973 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Fax: &nbsp;+972-3-9268188<br>
<br>
<br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;erik.van.der.ven@ &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; <br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;philips.com &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp;[email-masked] &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; <br>
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 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;owner-ibis-users@ &nbsp; &nbsp; &nbsp; &nbsp; Subject: [IBIS-Users] ibis simulation with spectre? &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; <br>
 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;eda.org &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; <br>
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 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;15/05/2003 16:43 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br>
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 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br>
<br>
<br>
<br>
<br>
Is it possible to simulate IBIS models with spectre? This makes it easy to<br>
compare the model to the spectre simulations.<br>
<br>
<br>
<br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334<br>
<br>
<br>
<br>
</font>
<br>
<br>
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|with just the appropriate command message(s) in the body:
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------------------------------

Date: Fri, 16 May 2003 11:02:20 -0400
From: "Lynne Green" <[email-masked]>
Subject: [IBIS-Users] tool-specific questions

This is a multi-part message in MIME format.

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For detailed questions on specific tools, please contact the vendors
directly.  For Cadence (including Spectre and SPECCTRAQuest), support
questions should be sent to [email-masked].
=20
Cadence also maintains a public community web site at
http://www.specctraquest.com.  This site has generic information on IBIS
and signal integrity, as well as tool-specific tips, and members can
also post questions.  You do not need to be a Cadence customer to access
this site, although you do need to register to access some of the
materials.  This web site had about 80 hits on "IBIS" at last check.
=20
Best regards,
Lynne
=20
PS: Spectre is a different product from SPECCTRAQuest, with different
features and capabilities.  The current release of Spectre does not
support IBIS.
=20
=20
Dr. Lynne Green
Senior Member of Consulting Staff
Cadence Design Systems, Inc.
=20
=20
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]

Sent: Friday, May 16, 2003 3:17 AM
To: [email-masked]
Subject: Re: [IBIS-Users] ibis simulation with spectre?

I am very glad to hear that it's no problem to simulate IBIS models with
Spectre, but although it sounds easy I still don't know what to do.=20
To what tools and windows are refering? I assumed you meant the Cadence
design environment, but I am not sure. In the library manager I don't
see the button. Could you please give some more details?=20

With kind regards,=20

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334=20

- ------_=_NextPart_001_01C31BBC.2638E2E2
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	charset="us-ascii"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>Message</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Dus-ascii">
<META content=3D"MSHTML 6.00.2713.1100" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2>For=20
detailed questions on specific tools, please contact the vendors =
directly.&nbsp;=20
</FONT></SPAN><SPAN class=3D598584314-16052003><FONT face=3DArial =
color=3D#0000ff=20
size=3D2>For&nbsp;Cadence (including Spectre and SPECCTRAQuest), support =
questions=20
should be sent to </FONT></SPAN><SPAN class=3D598584314-16052003><FONT =
face=3DArial=20
color=3D#0000ff size=3D2><A=20
href=3D"mailto:[email-masked]">[email-masked]</A>.</FONT></SPAN=
></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2>Cadence also maintains a public community web site at <A=20
href=3D"http://www.specctraquest.com">http://www.specctraquest.com</A>.&n=
bsp;&nbsp;This=20
site has generic information on IBIS and signal integrity, as well as=20
tool-specific tips, and members can also&nbsp;post questions.&nbsp; You =
do not=20
need to be a Cadence customer to access this site, although you do need =
to=20
register to access some of the materials.&nbsp; This web site had about =
80 hits=20
on "IBIS" at last check.</FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2>Best=20
regards,</FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2>Lynne</FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2>PS:&nbsp;Spectre is a different product from SPECCTRAQuest, =
with=20
different features and capabilities.&nbsp; The current release of =
Spectre does=20
not support IBIS.</FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2><FONT=20
size=3D2></FONT></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2><FONT=20
size=3D2>Dr. Lynne Green</FONT></FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2><FONT=20
size=3D2>Senior Member of Consulting Staff</FONT></FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2><FONT=20
size=3D2>Cadence Design Systems, Inc.</FONT></FONT></SPAN></DIV>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =
size=3D2><FONT=20
size=3D2>&nbsp;</DIV></FONT></FONT></SPAN>
<DIV><SPAN class=3D598584314-16052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV></DIV>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr =
align=3Dleft><FONT face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> =
[email-masked]=20
[mailto:[email-masked]] <BR><B>Sent:</B> Friday, May 16, =
2003 3:17=20
AM<BR><B>To:</B> [email-masked]<BR><B>Subject:</B> Re: [IBIS-Users] =
ibis=20
simulation with spectre?<BR><BR></FONT></DIV><BR><FONT face=3Dsans-serif =
size=3D2>I=20
am very glad to hear that it's no problem to simulate IBIS models with =
Spectre,=20
but although it sounds easy I still don't know what to do.</FONT> =
<BR><FONT=20
face=3Dsans-serif size=3D2>To what tools and windows are refering? I =
assumed you=20
meant the Cadence design environment, but I am not sure. In the library =
manager=20
I don't see the button. Could you please give some more details?</FONT>=20
<BR><BR><FONT face=3Dsans-serif size=3D2>With kind regards,</FONT> =
<BR><BR><FONT=20
face=3Dsans-serif size=3D2><BR>Ir. Erik van der Ven<BR>Room =
DB1032<BR>Business Line=20
Networking Infrastructure<BR>Philips Semiconductors BV<BR>Gerstweg =
2<BR>6534 AE=20
Nijmegen<BR>The Netherlands<BR>Phone: +31-24-3534334</FONT> =
<BR></BODY></HTML>
=00
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------------------------------

Date: Fri, 16 May 2003 17:07:43 -0700
From: "Peters, Stephen" <[email-masked]>
Subject: [IBIS-Users] IBIS Interconnect Modeling Specification (ICM Spec) now available for review

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Greetings:
 
  The final draft of the IBIS Interconnect Modeling Specification (ICM Spec)
is now available for review by the IBIS Open Forum.  A .pdf version of the
draft specification can be found on the IBIS web site at:
 
    http://www.eda.org/pub/ibis/connector/
<http://www.eda.org/pub/ibis/connector/> 
 
  The ICM specification establishes a standard method for representing
interconnect modeling data for transfer between interconnect (connectors
and/or package) design and simulation tools. In addition, to support of
s-parameter descriptions of connectors and packages the IBIS futures group
has also formally documented the Touchstone(r) data file format. A copy of
the Touchstone specification is available at the above URL.
 
Please address all ICM specification comments to Michael Mirmak
([email-masked] <mailto:[email-masked]> ) or Lynne Green
([email-masked] <mailto:[email-masked]> ).  Address all comments on
the Touchstone spec to Stephen Peters ([email-masked]
<mailto:[email-masked]> ). 
 
Regards,
Stephen Peters
Intel Corp.
Chair, EIA/IBIS Open Forum

- ------_=_NextPart_001_01C31C08.566C4C80
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<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2>Greetings:</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>&nbsp; The final 
draft&nbsp;of&nbsp;the IBIS Interconnect Modeling Specification (ICM Spec) is 
now available for review by the IBIS Open Forum.&nbsp; A .pdf version of the 
draft specification can be found on the IBIS web site at:</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>&nbsp;&nbsp;&nbsp; 
<A 
href="http://www.eda.org/pub/ibis/connector/">http://www.eda.org/pub/ibis/connector/</A></FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>&nbsp; The ICM 
specification&nbsp;establishes a standard method for representing interconnect 
modeling data for transfer between interconnect (connectors&nbsp;and/or package) 
design and simulation tools. In addition, to&nbsp;support of s-parameter 
descriptions of connectors and packages the IBIS futures group has also formally 
documented the Touchstone(r) data&nbsp;file format. A copy of the Touchstone 
specification is available at the above URL.</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>Please address all 
ICM specification comments&nbsp;to&nbsp;Michael Mirmak (<A 
href="mailto:[email-masked]">[email-masked]</A>) or Lynne 
Green (<A href="mailto:[email-masked]">[email-masked]</A>).&nbsp; 
Address all comments on the Touchstone spec to Stephen Peters (<A 
href="mailto:[email-masked]">[email-masked]</A>). 
</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial 
size=2>Regards,</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>Stephen 
Peters</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>Intel 
Corp.</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003><FONT face=Arial size=2>Chair, EIA/IBIS Open 
Forum</FONT></SPAN></DIV>
<DIV><SPAN class=249094919-16052003></SPAN><SPAN class=249094919-16052003><FONT 
face=Arial size=2></FONT></SPAN>&nbsp;</DIV></BODY></HTML>

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------------------------------

Date: Mon, 19 May 2003 09:19:43 +0200
From: Christophe Robichon <[email-masked]>
Subject: [IBIS-Users] IBIS models generated by s2ibis

Hello,

I'm trying to generate IBIS model files with the S2IBIS free tool and i 
had few troubles which, i think, are well known!

I want to generate a 3-state buffer model with an 2.5V typical use. In the 
IBIS output file, in the I/V pulldown curve i found two ranges : -2.5/5V and 
0/5V? Also, some lines are duplicated like if output array was badly 
initialized or bigger than computed values?

Thank's for your help

Christophe

- -- 
Christophe ROBICHON
CAD Developments Engineer
ATMEL NANTES S.A.
Mailto:[email-masked]

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------------------------------

Date: 19 May 2003 09:49:21 -0700
From: Syed Huq <[email-masked]>
Subject: Re: [IBIS-Users] IBIS models generated by s2ibis

The range of the output V/I curve is based on IBIS standard.
Ex. PU(Pullup) and PD(Pulldown) curves are from -Vdd to +2Vdd etc

The duplicate entry of data point is a known issue. Just delete them.
The Parser 3.2.9 will tell you which lines are duplicated.

Syed

On Mon, 2003-05-19 at 00:19, Christophe Robichon wrote:
> Hello,
> 
> I'm trying to generate IBIS model files with the S2IBIS free tool and i 
> had few troubles which, i think, are well known!
> 
> I want to generate a 3-state buffer model with an 2.5V typical use. In the 
> IBIS output file, in the I/V pulldown curve i found two ranges : -2.5/5V and 
> 0/5V? Also, some lines are duplicated like if output array was badly 
> initialized or bigger than computed values?
> 
> Thank's for your help
> 
> Christophe
> 
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------------------------------

Date: Tue, 13 May 2003 13:32:46 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: Re: [IBIS-Users] Validating IBIS Inputs

A well behaved driver with output impedance comparable to the transmission
line's Zo, won't generate much if any overshoot.

Try using a rail-to-rail voltage source and about a 10 ohm thevenin
equivalent resistance, driving a 50 ohm transmission line to the receiver.
It is a better signal source for exercising inputs.  The delay of the
transmission line sets the overshoot pulsewidth.

Regards,
Andy

> I'm curious as to how other people validate an IBIS input buffer with a
> ground clamp and power clamp curve to the original
> SPICE netlist. If I run a simulation of a driver and receiver with a
> transmission line, and then a driver with a transmission
> line and a lumped capacitor load, I get almost the same result. (Assuming
> a properly made IBIS file) The power and ground clamp
> curves only turn on below Reference Ground or above supply voltage. So if
> I have an input going into my input buffer that has overshoot
> then should I see my powerclamp curve turn on? What types of tests do
> people do to validate that the clamps are behaving as expected?
> (And feel free to inform me on what the expected behavior of the clamps
> should be)

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------------------------------

Date: Tue, 20 May 2003 20:49:29 -0400
From: "Lynne Green" <[email-masked]>
Subject: [IBIS-Users] Final Call for Papers, IBIS Summit at DAC

- -----------------------------------------------------------------------
                       IBIS SUMMIT
                     FINAL CALL FOR
               PARTICIPATION & PRESENTATIONS
- -----------------------------------------------------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

              I B I S   S U M M I T   M E E T I N G

Time/Date:  Thursday June 5, 2003,  8:00 AM to 5:00 PM

Location:   Anaheim Marriot Hotel
                700 W. Convention Way 
                Anaheim, CA

Content:    Presentations and Discussions

Purpose:   Solicit and Exchange IBIS Model Related Information and
Ideas.

Sponsors: Cadence Design Systems

            If your company would be interested in helping to
            sponsor this event, please contact Lynne Green
            <[email-masked]>.  Sponsors are needed for the lunch
            and coffee breaks.

DAC:        June 2-6, 2003
                Anaheim Convention Center
                Anaheim, California
                See <http://www.dac.com/> for more information.

BACKGROUND

DesignCon is the premier annual Silicon Valley event for the
electronic design automation (EDA) and semiconductor industry.
Topics of current interest to the EIA IBIS Open Forum are
addressed at DAC.

This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations are expected to be available and archived in an
electronic format, and minutes of the meeting will be issued.
Any pending formal decisions (votes) will be announced at least
two weeks prior to the meeting.

The annual election of officers will be held.  Nominations can
be sent to Stephen Peters <[email-masked]> or made at
the meeting.

CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development,
and digital circuit design are invited to participate to the
Summit meeting. If you plan to participate, please register with
the information below:

   Name:
   E-mail address:
   Company:
   Telephone:

Send to:

    Guy de Burgh at Mentor Graphics ([email-masked])

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS
experiences or issues.

Format of Presentation:  LCD Projection with Windows laptop.
Time:			15-30 Minutes
Electronic Archival: We request electronic versions so that the
                  presentations can be archived and also made
                  available to non-attendees.  Formats used in
                  the past have been text, Power Point, Word,
                  Postscript, and Acrobat.  Electronic copies
                  of presentations should be made available by
                  May 30, 2003 for uploading and copying to the
                  presentation laptop.

If you plan a presentation, please supply

   Title:
   Presenter:
   E-mail address:
   Company:
   Telephone:

   Estimate Time:

Also, please indicate if you are also interested in presenting
this presentation at DesignCon East, Marlborough, MA, on June
23, 2003.

Send this to:

  Lynne Green ([email-masked])

AGENDA

The agenda includes presentations, discussions, breaks, and a
luncheon (which will be provided).  This will be developed as
presentation proposals are received.

The following individuals have signed up to present at the
summit (presentation titles are tentative).
* IBIS Status Update, Stephen Peters (Intel Corp)
* Behavioral VHDL-AMS I/O buffer model using IBIS, Arpad Muranyi (Intel
Corp)  
* Quality Committee Update, Kim Helliwell (Apple Computer)
* ICM Status and Update, Michael Mirmak (Intel Corp.)
* Modeling On-die Terminations, Arpad Muranyi (Intel Corp.)
* IBIS 4.1 Status and Update, Lynne Green (Cadence Design Systems)

LIST OF NEARBY HOTELS

See <http://www.dac.com/40th/travel.html> for travel directions,
hotels and other information.
- -----------------------------------------------------------------
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------------------------------

Date: Wed, 21 May 2003 11:25:20 -0400
From: Timothy Coyle <[email-masked]>
Subject: [IBIS-Users] Correlating Tco of IBIS to SPICE

Hello,
I am trying to correlate the rising Tco of IBIS file to original SPICE file. To obtain the rising waveform for IBIS, I applied a PWL
source to the input, starting at time 0ns, and 300ps later reaching Vcc. (300ps is the slew rate of the device) Since this is a clocked
output, I then apply a PWL to the clock input. So at about 1ns, I get my rising waveform. When I run the SPICE file into the standard load (Vref, Rref, Cref) and get the Tco number, it is 800ps, where the IBIS Tco is 1.53ns. I apply the same signal to both the SPICE and IBIS input, with no delay and rise/fall times of 300ps. So depending on how I set up my clock input, that is where my rising waveform will
start, and hence my IBIS Tco number. Is it acceptable to get rid of leading zero's to match up IBIS to SPICE? Or should I be able to handle
this with the way I set up my inputs?

Regards,
Tim
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------------------------------

Date: Wed, 21 May 2003 13:02:26 -0400
From: "Douglas Burns" <[email-masked]>
Subject: RE: [IBIS-Users] Correlating Tco of IBIS to SPICE

Tim,

 IBIS contains no delay information, thus you can't compare them directly
with spice. Also, the spice file may not contain the full logic path delay
and it's output delay may not be the same as the spec'ed Tco. What you
really care about is that the waveforms overlay each other (when properly
shifted) when they drive the same load. For Timing analysis purposes, you
would then run a simulation of the IBIS into the standard load and a second
simulation of the IBIS into the actual load. You can then subtract the delay
from stimulus to response of the standard load simulation from the stimulus
to response of the actual load. The resulting data is the delay the actual
load has on the network with respect to the standard load. You then add the
Tco value (delay into standard load) to this computed value (delay of actual
network with respect to the standard load) to calculate the actual delay of
the full network.

Doug

Douglas Burns
Chief Consultant
Signal Integrity Software Inc.
6 Clock Tower Place
Maynard, MA 01754
978-461-0449 x14
www.sisoft.com
[email-masked]

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On
Behalf Of Timothy Coyle
Sent: Wednesday, May 21, 2003 11:25 AM
To: IBIS List
Subject: [IBIS-Users] Correlating Tco of IBIS to SPICE

Hello,
I am trying to correlate the rising Tco of IBIS file to original SPICE file.
To obtain the rising waveform for IBIS, I applied a PWL
source to the input, starting at time 0ns, and 300ps later reaching Vcc.
(300ps is the slew rate of the device) Since this is a clocked
output, I then apply a PWL to the clock input. So at about 1ns, I get my
rising waveform. When I run the SPICE file into the standard load (Vref,
Rref, Cref) and get the Tco number, it is 800ps, where the IBIS Tco is
1.53ns. I apply the same signal to both the SPICE and IBIS input, with no
delay and rise/fall times of 300ps. So depending on how I set up my clock
input, that is where my rising waveform will
start, and hence my IBIS Tco number. Is it acceptable to get rid of leading
zero's to match up IBIS to SPICE? Or should I be able to handle
this with the way I set up my inputs?

Regards,
Tim
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------------------------------

Date: Thu, 22 May 2003 06:29:34 +0300
From: VALERY NEIMAN <[email-masked]>
Subject: [IBIS-Users] IBIS version 4.0

- --------------6EC0AEC7194DFAB2E3A890D1
Content-Type: text/plain; charset=koi8-r
Content-Transfer-Encoding: 7bit

Hello, Stll I generate IBIS model according
to IBIS spec ver3.2 with ibischk3 parser

Does anybody have parser for IBIS ver4.0.

Regards, Valery

- --
- -------------------------------
mailto:[email-masked]
Tel   :(972) 9-9522784
Fax   :(972) 9-9522888
Motorola Semiconductor Israel Ltd.
- -------------------------------

- --------------6EC0AEC7194DFAB2E3A890D1
Content-Type: text/html; charset=koi8-r
Content-Transfer-Encoding: 7bit

<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>

<pre>Hello, Stll I generate IBIS model according
to IBIS spec ver3.2 with ibischk3 parser</pre>

<pre>Does anybody have parser for IBIS ver4.0.

Regards, Valery</pre>

<pre>--&nbsp;
- -------------------------------
<A HREF="mailto:[email-masked]">mailto:[email-masked]</A>
Tel&nbsp;&nbsp; :(972) 9-9522784
Fax&nbsp;&nbsp; :(972) 9-9522888
Motorola Semiconductor Israel Ltd.
- -------------------------------</pre>
&nbsp;</html>

- --------------6EC0AEC7194DFAB2E3A890D1--

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------------------------------

Date: Thu, 22 May 2003 00:39:49 -0700 (PDT)
From: sk <[email-masked]>
Subject: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Hi all,

Does anyone has experience modeling a LVDS input
buffer with on-die differential termination? 

Can someone shed me some light here?

Best Regards

__________________________________
Do you Yahoo!?
The New Yahoo! Search - Faster. Easier. Bingo.
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------------------------------

Date: Thu, 22 May 2003 12:56:07 +0200
From: "Henrik G. Madsen" <[email-masked]>
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Hi

If you have the SPICE model for the LVDS cell, you can remove the build-in termination and model the LVDS input as normal.
Then afterwards, you can model the termination alone and add it to the IBIS file using the 'Series' model type.
Remember to add the termination pin info through the [Series Pin Mapping] keyword

I have tried to illustrate the final IBIS model below.

You have to be aware that certain IBIS tool still do not support the below approach fully.

Regards
/Henrik G Madsen

Example
.......
|
[Pin]  signal_name          model_name           R_pin     L_pin     C_pin
|
pin1   LVDS_p                LVDS_model
pin2   LVDS_n                LVDS_model
|
[Diff pin]      inv_pin vdiff tdelay_typ tdelay_min tdelay_max
|
pin1    pin2     NA NA NA NA
|
[Series Pin Mapping] pin_2 model_name function_table_group
|
pin1    pin2  term_model
|
|************************************************************************
[Model]          term_model
Model_type       Series
C_comp           0pF               0pF                  0pF
|
[Temperature Range]       55.000              120.00              0.0000
[Voltage Range]           2.500V              2.300V              2.700V
|
|variable R(typ) R(min) R(max)
[R Series] 100    120    80
|
|
[Model]          LVDS_model
Model_type       I/O
Polarity         Non-Inverting
Enable           Active-Low
........

- -----Original Message-----
From: sk [mailto:[email-masked]]
Sent: 22. maj 2003 09:40
To: [email-masked]
Subject: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Hi all,

Does anyone has experience modeling a LVDS input
buffer with on-die differential termination? 

Can someone shed me some light here?

Best Regards

__________________________________
Do you Yahoo!?
The New Yahoo! Search - Faster. Easier. Bingo.
http://search.yahoo.com
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|or email a written request to [email-masked].
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|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

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------------------------------

Date: Thu, 22 May 2003 11:52:32 -0400
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS version 4.0

Hello, Valery,

The IBIS parser is expected to be completed some time in Q3
(June-August).

- - Lynne Green

Cadence Design Systems
IBIS Vice-Chair

- -----Original Message-----
From: VALERY NEIMAN [mailto:[email-masked]] 
Sent: Wednesday, May 21, 2003 8:30 PM
To: [email-masked]
Cc: [email-masked]
Subject: [IBIS-Users] IBIS version 4.0

Hello, Stll I generate IBIS model according
to IBIS spec ver3.2 with ibischk3 parser
Does anybody have parser for IBIS ver4.0.

Regards, Valery
- -- 
- -------------------------------
mailto:[email-masked]
Tel   :(972) 9-9522784
Fax   :(972) 9-9522888
Motorola Semiconductor Israel Ltd.
- -------------------------------
  
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------------------------------

Date: Thu, 22 May 2003 18:15:44 -0700 (PDT)
From: sk <[email-masked]>
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Henrik,

Thanks for the reply. I just found out that the tool
that I'm using does not support the series keywords.
So does anyone has a workaround for this? 

Much Appreciated,
sk

- --- "Henrik G. Madsen" <[email-masked]> wrote:
> Hi
> 
> If you have the SPICE model for the LVDS cell, you
> can remove the build-in termination and model the
> LVDS input as normal.
> Then afterwards, you can model the termination alone
> and add it to the IBIS file using the 'Series' model
> type.
> Remember to add the termination pin info through the
> [Series Pin Mapping] keyword
> 
> I have tried to illustrate the final IBIS model
> below.
> 
> You have to be aware that certain IBIS tool still do
> not support the below approach fully.
> 
> Regards
> /Henrik G Madsen
> 
> Example
> .......
> |
> [Pin]  signal_name          model_name          
> R_pin     L_pin     C_pin
> |
> pin1   LVDS_p                LVDS_model
> pin2   LVDS_n                LVDS_model
> |
> [Diff pin]      inv_pin vdiff tdelay_typ tdelay_min
> tdelay_max
> |
> pin1    pin2     NA NA NA NA
> |
> [Series Pin Mapping] pin_2 model_name
> function_table_group
> |
> pin1    pin2  term_model
> |
>
|************************************************************************
> [Model]          term_model
> Model_type       Series
> C_comp           0pF               0pF              
>    0pF
> |
> [Temperature Range]       55.000              120.00
>              0.0000
> [Voltage Range]           2.500V              2.300V
>              2.700V
> |
> |variable R(typ) R(min) R(max)
> [R Series] 100    120    80
> |
> |
> [Model]          LVDS_model
> Model_type       I/O
> Polarity         Non-Inverting
> Enable           Active-Low
> ........
> 
> -----Original Message-----
> From: sk [mailto:[email-masked]]
> Sent: 22. maj 2003 09:40
> To: [email-masked]
> Subject: [IBIS-Users] On-die DIFFERENTIAL terminated
> buffer modeling
> 
> 
> Hi all,
> 
> Does anyone has experience modeling a LVDS input
> buffer with on-die differential termination? 
> 
> Can someone shed me some light here?
> 
> Best Regards
> 
> 
> __________________________________
> Do you Yahoo!?
> The New Yahoo! Search - Faster. Easier. Bingo.
> http://search.yahoo.com
>
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------------------------------

Date: Fri, 23 May 2003 08:37:41 +0200
From: "Henrik G. Madsen" <[email-masked]>
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Sk,

One solution could be to do the plain IBIS model for the LVDS input without termination, and then adding the termination as a discrete resistor in the simulation circuit.

The external termination resistor should of cause have the same properties as the 'deleted' internal.

Regards
Henrik G Madsen

- -----Original Message-----
From: sk [mailto:[email-masked]]
Sent: 23. maj 2003 03:16
To: Henrik G. Madsen; [email-masked]
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Henrik,

Thanks for the reply. I just found out that the tool
that I'm using does not support the series keywords.
So does anyone has a workaround for this? 

Much Appreciated,
sk

- --- "Henrik G. Madsen" <[email-masked]> wrote:
> Hi
> 
> If you have the SPICE model for the LVDS cell, you
> can remove the build-in termination and model the
> LVDS input as normal.
> Then afterwards, you can model the termination alone
> and add it to the IBIS file using the 'Series' model
> type.
> Remember to add the termination pin info through the
> [Series Pin Mapping] keyword
> 
> I have tried to illustrate the final IBIS model
> below.
> 
> You have to be aware that certain IBIS tool still do
> not support the below approach fully.
> 
> Regards
> /Henrik G Madsen
> 
> Example
> .......
> |
> [Pin]  signal_name          model_name          
> R_pin     L_pin     C_pin
> |
> pin1   LVDS_p                LVDS_model
> pin2   LVDS_n                LVDS_model
> |
> [Diff pin]      inv_pin vdiff tdelay_typ tdelay_min
> tdelay_max
> |
> pin1    pin2     NA NA NA NA
> |
> [Series Pin Mapping] pin_2 model_name
> function_table_group
> |
> pin1    pin2  term_model
> |
>
|************************************************************************
> [Model]          term_model
> Model_type       Series
> C_comp           0pF               0pF              
>    0pF
> |
> [Temperature Range]       55.000              120.00
>              0.0000
> [Voltage Range]           2.500V              2.300V
>              2.700V
> |
> |variable R(typ) R(min) R(max)
> [R Series] 100    120    80
> |
> |
> [Model]          LVDS_model
> Model_type       I/O
> Polarity         Non-Inverting
> Enable           Active-Low
> ........
> 
> -----Original Message-----
> From: sk [mailto:[email-masked]]
> Sent: 22. maj 2003 09:40
> To: [email-masked]
> Subject: [IBIS-Users] On-die DIFFERENTIAL terminated
> buffer modeling
> 
> 
> Hi all,
> 
> Does anyone has experience modeling a LVDS input
> buffer with on-die differential termination? 
> 
> Can someone shed me some light here?
> 
> Best Regards
> 
> 
> __________________________________
> Do you Yahoo!?
> The New Yahoo! Search - Faster. Easier. Bingo.
> http://search.yahoo.com
>
|------------------------------------------------------------------
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> body:
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> if different>
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> if different>
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> if different>
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> |
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> Recent
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> 

__________________________________
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The New Yahoo! Search - Faster. Easier. Bingo.
http://search.yahoo.com

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------------------------------

Date: Fri, 23 May 2003 11:06:30 -0400
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Hi, Sk,

Using an external resistor puts it outside of the package parasitics (at
the package's external pins).  This would produce different simulation
results compared to modeling the termination on-die.

You could try building an IBIS Package Model, with the on-die
termination connected at the die pads.

Regards,
Lynne

Dr. Lynne Green
Senior Member of Consulting Staff
Cadence Design Systems, Inc.

- -----Original Message-----
From: Henrik G. Madsen [mailto:[email-masked]] 
Sent: Thursday, May 22, 2003 11:38 PM
To: sk; [email-masked]
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Sk,

One solution could be to do the plain IBIS model for the LVDS input
without termination, and then adding the termination as a discrete
resistor in the simulation circuit.

The external termination resistor should of cause have the same
properties as the 'deleted' internal.

Regards
Henrik G Madsen

- -----Original Message-----
From: sk [mailto:[email-masked]]
Sent: 23. maj 2003 03:16
To: Henrik G. Madsen; [email-masked]
Subject: RE: [IBIS-Users] On-die DIFFERENTIAL terminated buffer modeling

Henrik,

Thanks for the reply. I just found out that the tool
that I'm using does not support the series keywords.
So does anyone has a workaround for this? 

Much Appreciated,
sk

- --- "Henrik G. Madsen" <[email-masked]> wrote:
> Hi
> 
> If you have the SPICE model for the LVDS cell, you
> can remove the build-in termination and model the
> LVDS input as normal.
> Then afterwards, you can model the termination alone
> and add it to the IBIS file using the 'Series' model
> type.
> Remember to add the termination pin info through the
> [Series Pin Mapping] keyword
> 
> I have tried to illustrate the final IBIS model
> below.
> 
> You have to be aware that certain IBIS tool still do
> not support the below approach fully.
> 
> Regards
> /Henrik G Madsen
> 
> Example
> .......
> |
> [Pin]  signal_name          model_name          
> R_pin     L_pin     C_pin
> |
> pin1   LVDS_p                LVDS_model
> pin2   LVDS_n                LVDS_model
> |
> [Diff pin]      inv_pin vdiff tdelay_typ tdelay_min
> tdelay_max
> |
> pin1    pin2     NA NA NA NA
> |
> [Series Pin Mapping] pin_2 model_name
> function_table_group
> |
> pin1    pin2  term_model
> |
>
|***********************************************************************
|*
> [Model]          term_model
> Model_type       Series
> C_comp           0pF               0pF              
>    0pF
> |
> [Temperature Range]       55.000              120.00
>              0.0000
> [Voltage Range]           2.500V              2.300V
>              2.700V
> |
> |variable R(typ) R(min) R(max)
> [R Series] 100    120    80
> |
> |
> [Model]          LVDS_model
> Model_type       I/O
> Polarity         Non-Inverting
> Enable           Active-Low
> ........
> 
> -----Original Message-----
> From: sk [mailto:[email-masked]]
> Sent: 22. maj 2003 09:40
> To: [email-masked]
> Subject: [IBIS-Users] On-die DIFFERENTIAL terminated
> buffer modeling
> 
> 
> Hi all,
> 
> Does anyone has experience modeling a LVDS input
> buffer with on-die differential termination?
> 
> Can someone shed me some light here?
> 
> Best Regards
> 
> 
|------------------------------------------------------------------
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|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Fri, 23 May 2003 11:09:17 -0400
From: "Lynne Green" <[email-masked]>
Subject: [IBIS-Users] Agenda for IBIS Open Forum, May 30, 2003

		     IBIS Open Forum Meeting Agenda
			      for 5/30/03

		 Bridge Number    Reservation #   Passcode
                 1-916-356-2663       1           2873560 
                 (International Dial-In: 1-617-801-9781)

All meetings are 8:00 AM to 9:55 AM Pacific Time.  When you call into
the 
meeting, ask for the IBIS Open Forum hosted by Stephen Peters and give
the Reservation Number and Passcode.

8:00 Check-In, Intros, Announcements                         Peters

     - Intros of New IBIS Participants, Meeting Quorum       Peters
     - Call for Patents                                      Peters
     - Membership Update and Treasurers Report               Peters
     - Review of Previous Meeting's Minutes (and ARs)        Peters
     - Miscellany/Announcements                              All
     - Press & Web Page Updates                              Huq, All
     - New Models Available, Library Update                  Leventhal,
All
     - Opens for New Issues                                  All

8:15 Administrative and Project Discussions

     International/External Progress
     - IEC 62014-3 (ICEM) Integrated Circuits Electromagnetic 
       Model Proposal (IEC 93/67/NP IBIS and EMC Simulation)
Perrin/Peters
     - JEDEC Committee Report                                Green

     DAC2003 Meeting Planning                                Peters
     - Election of Officers

     DesignCon2003 East Meeting Planning                     Peters

     IBIS Version 4.0 Parser Funding and Status              Peters

     IBIS Version 4.1 Discussion                             Peters/Ross

     IBIS Quality Committee Report                           Katz

     IBIS Model Review Committee                             Green

     New Administrative Issues                               All

8:45 Technical Discussion

     IBIS Futures Committee Report
Peters/Green

     IBIS ICM Specification Review                           Mirmak

     BIRD74.3 - EMI Parameters                               de Burgh
 
     IBISCHK3 Status                                         Ross
     - BUG73 Fix

     New Technical Issues                                    All

9:50 Wrap Up and Next Meetings Plans                         Peters

9:55 Sign Off
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------------------------------

Date: Fri, 23 May 2003 11:14:02 -0700
From: Kannan Srinivasagam <[email-masked]>
Subject: [IBIS-Users] Error while using s2ibis2

This is a multi-part message in MIME format.
- --------------FD4B72A4697868D6835E465C
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Hi,
    Could anyone tell me why I am getting the following error during my
s2ibis2 Input model run :
ERROR : Difficulty in Reading input

I am not sure what I am doing wrong.

Thanks
Kannan Srinivasagam
Cypress Semiconductor

- --------------FD4B72A4697868D6835E465C
Content-Type: text/x-vcard; charset=us-ascii;
 name="pks.vcf"
Content-Transfer-Encoding: 7bit
Content-Description: Card for Kannan Srinivasagam
Content-Disposition: attachment;
 filename="pks.vcf"

begin:vcard 
n:Srinivasagam;P Kannan 
tel;fax:408-943-4724
tel;work:408-943-6817
x-mozilla-html:FALSE
org:Cypress Semiconductor;MPD/MTI New Product Development
version:2.1
email;internet:[email-masked]
title:Senior Application Engineer
adr;quoted-printable:;;3901 North First Street=0D=0ASan Jose,CA 95134;;;;
fn:Kannan Srinivasagam
end:vcard

- --------------FD4B72A4697868D6835E465C--

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------------------------------

Date: Fri, 23 May 2003 22:14:11 -0700 (PDT)
From: Syed Huq <[email-masked]>
Subject: Re: [IBIS-Users] Error while using s2ibis2

Are you able to run the example .s2i file that comes with s2ibis2 ?
Which OS binary are you running ?

If the example runs then something is wrong with your .s2i...possibly..

Syed

>Date: Fri, 23 May 2003 11:14:02 -0700
>From: Kannan Srinivasagam <[email-masked]>
>X-Accept-Language: en
>MIME-Version: 1.0
>To: "[email-masked]" <[email-masked]>
>CC: [email-masked]
>Subject: [IBIS-Users] Error while using s2ibis2
>
>Hi,
>    Could anyone tell me why I am getting the following error during my
>s2ibis2 Input model run :
>ERROR : Difficulty in Reading input
>
>I am not sure what I am doing wrong.
>
>Thanks
>Kannan Srinivasagam
>Cypress Semiconductor
|------------------------------------------------------------------
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------------------------------

Date: Sun, 25 May 2003 13:46:59 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: Re: [IBIS-Users] Error while using s2ibis2

I have seen that message ("ERROR: Difficulty in Reading Input") from HSpice
on various occasions.  It probably means there is something wrong in the
SPICE input file and it can't work its way around it.  Sometimes it is as
simple as a missing line or an extra line that shouldn't be there.

Does the SPICE model run OK outside of s2ibis2?

Try examining the output from s2ibis2 (input to HSpice) for errors.

Regards,
Andy

>     Could anyone tell me why I am getting the following error during my
> s2ibis2 Input model run :
> ERROR : Difficulty in Reading input

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|with just the appropriate command message(s) in the body:
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------------------------------

Date: Sun, 25 May 2003 12:37:13 -0700
From: "Frank Dunlap" <[email-masked]>
Subject: RE: [IBIS-Users] Error while using s2ibis2

Sometimes it's a missing or extra ".end" .

- -----Original Message-----
From: Ingraham, Andrew [mailto:[email-masked]] 
Sent: Sunday, May 25, 2003 10:47 AM
To: [email-masked]
Subject: Re: [IBIS-Users] Error while using s2ibis2

I have seen that message ("ERROR: Difficulty in Reading Input") from
HSpice
on various occasions.  It probably means there is something wrong in the
SPICE input file and it can't work its way around it.  Sometimes it is
as
simple as a missing line or an extra line that shouldn't be there.

Does the SPICE model run OK outside of s2ibis2?

Try examining the output from s2ibis2 (input to HSpice) for errors.

Regards,
Andy

>     Could anyone tell me why I am getting the following error during
my
> s2ibis2 Input model run :
> ERROR : Difficulty in Reading input

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|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Mon, 26 May 2003 08:35:02 +0200
From: [email-masked]
Subject: Re: [IBIS-Users] Error while using s2ibis2  

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Dear Kannan,

Are you using a stand alone PC or are you working on a terminal network, 
with remote servers?
I had problems before with s2ibis: it could not read the files that were 
created with the spectre simulator (these simulations are done by s2ibis). 
This was caused by the fact that s2ibis and spectre were running on 
different servers. The workaround was to open a new window and explicitely 
select a compute server for that window and then start working. I am not 
sure if your problem relates to this, but perhaps it helps.

With kind regards,

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

Kannan Srinivasagam <[email-masked]>
Sent by: 
[email-masked]
05/23/03 08:14 PM

        To:     "[email-masked]" <[email-masked]>
        cc:     [email-masked]
(bcc: Erik van der Ven/NYM/SC/PHILIPS)
        Subject:        [IBIS-Users] Error while using s2ibis2 
        Classification: 

Hi,
    Could anyone tell me why I am getting the following error during my
s2ibis2 Input model run :
ERROR : Difficulty in Reading input

I am not sure what I am doing wrong.

Thanks
Kannan Srinivasagam
Cypress Semiconductor

- --=_alternative 00245B22C1256D32_=
Content-Type: text/html; charset="us-ascii"

<br><font size=2 face="sans-serif">Dear Kannan,</font>
<br>
<br><font size=2 face="sans-serif">Are you using a stand alone PC or are you working on a terminal network, with remote servers?</font>
<br><font size=2 face="sans-serif">I had problems before with s2ibis: it could not read the files that were created with the spectre simulator (these simulations are done by s2ibis). This was caused by the fact that s2ibis and spectre were running on different servers. The workaround was to open a new window and explicitely select a compute server for that window and then start working. I am not sure if your problem relates to this, but perhaps it helps.</font>
<br>
<br><font size=2 face="sans-serif">With kind regards,</font>
<br>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td>
<br>
<br>
<br>
<br>
<br><font size=1 face="sans-serif"><b>Kannan Srinivasagam &lt;[email-masked]&gt;</b></font>
<p><font size=1 face="sans-serif">Sent by: </font>
<br><font size=1 face="sans-serif">[email-masked]</font>
<p><font size=1 face="sans-serif">05/23/03 08:14 PM</font>
<br>
<td><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp; &nbsp;&quot;[email-masked]&quot; &lt;[email-masked]&gt;</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; cc: &nbsp; &nbsp; &nbsp; &nbsp;[email-masked]<br>
(bcc: Erik van der Ven/NYM/SC/PHILIPS)</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;[IBIS-Users] Error while using s2ibis2 </font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br></table>
<br>
<br>
<br><font size=2 face="Courier New">Hi,<br>
 &nbsp; &nbsp;Could anyone tell me why I am getting the following error during my<br>
s2ibis2 Input model run :<br>
ERROR : Difficulty in Reading input<br>
<br>
I am not sure what I am doing wrong.<br>
<br>
Thanks<br>
Kannan Srinivasagam<br>
Cypress Semiconductor<br>
</font>
<br>
<br>
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------------------------------

Date: Tue, 27 May 2003 10:06:22 -0500
From: "Haque, Moshiul" <[email-masked]>
Subject: [IBIS-Users] FET Switch Model with internal pulldown resistor

I am trying to create an IBIS model for a parallel n-channel/p-channel
mosfet switch. At the high impedance state (i.e. OFF state) drain side of
the switch is connected to ground through a 500 ohm pulldown resistor. I am
not sure how to model this pulldown resistor since this is connected only in
the high-impedance state. If I model it in high impedance state the
simulator will combine this characteristics with the ON state of the switch
and the result will be inaccurate. 

Any idea how to create the model?

Regards
Moshiul Haque	             
Standard Linear and Logic Marketing
Texas Instruments Incorporated                
Ph: (903) 868-7153          	        

|------------------------------------------------------------------
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|with just the appropriate command message(s) in the body:
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------------------------------

Date: Tue, 27 May 2003 15:42:53 +0200
From: [email-masked]
Subject: [IBIS-Users] number of waveforms

This is a multipart message in MIME format.
- --=_alternative 004B871FC1256D33_=
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Dear IBIS users,

It is possible to specify more than one waveform table, for instance with 
different loads.
I have studied many IBIS models by semiconductor companies. All models I 
have seen give only one waveform (both rising and falling).
What is the purpose of specifying more than one waveform? Does this yield 
better results in the simulator if the load differs from the standard 
load?

With kind regards,

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334
- --=_alternative 004B871FC1256D33_=
Content-Type: text/html; charset="us-ascii"

<br><font size=2 face="sans-serif">Dear IBIS users,</font>
<br>
<br><font size=2 face="sans-serif">It is possible to specify more than one waveform table, for instance with different loads.</font>
<br><font size=2 face="sans-serif">I have studied many IBIS models by semiconductor companies. All models I have seen give only one waveform (both rising and falling).</font>
<br><font size=2 face="sans-serif">What is the purpose of specifying more than one waveform? Does this yield better results in the simulator if the load differs from the standard load?</font>
<br>
<br><font size=2 face="sans-serif">With kind regards,</font>
<br>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
- --=_alternative 004B871FC1256D33_=--
|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email [email-masked]
|with just the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
|  subscribe   ibis-users <optional e-mail address, if different>
|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to [email-masked].
|
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|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Tue, 27 May 2003 09:22:32 -0700
From: "Muranyi, Arpad" <[email-masked]>
Subject: RE: [IBIS-Users] number of waveforms

This is a multi-part message in MIME format.

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Erik,
=20
I am only aware of two tools which can use more than
one waveform per edge (or more than 4 per CMOS buffer).
This is probably the reason most IBIS models do not
contain more waveforms.
=20
The reason the IBIS specification allows for more is
accuracy.  It is generally true that the V_fixture
R_fixture combination of an IBIS model will reproduce
the most accurate results when the buffer is used with
the same load in the simulation.  In case the model is
used in environments where the load impedance has a
wide range, it would be better if the model could also
use waveform tables which were made under similar
conditions.
=20
Now that I am studying the algorithms in order to be=20
able to write VHDL-AMS IBIS models, I am discovering
a lot of interesting numeric details which I wasn't
aware of before, however, it would be to difficult to
explain all of them here.  You can expect to see a
presentation by me and Luca Giacotto on this subject
in the upcoming IBIS summit.
=20
Arpad Muranyi
Intel Corporation
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Tuesday, May 27, 2003 6:43 AM
To: [email-masked]
Subject: [IBIS-Users] number of waveforms

Dear IBIS users,=20

It is possible to specify more than one waveform table, for instance =
with different loads.=20
I have studied many IBIS models by semiconductor companies. All models I =
have seen give only one waveform (both rising and falling).=20
What is the purpose of specifying more than one waveform? Does this =
yield better results in the simulator if the load differs from the =
standard load?=20

With kind regards,=20

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

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	charset="iso-8859-1"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">

<META content=3D"MSHTML 6.00.2716.2200" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New"=20
size=3D2>Erik,</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New"=20
size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>I am only=20
aware of two tools which can use more than</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>one waveform=20
per edge (or more than 4 per CMOS buffer).</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>This is=20
probably the reason most IBIS models do not</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>contain more=20
waveforms.</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New"=20
size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>The reason=20
the IBIS specification </FONT></SPAN><SPAN =
class=3D324111116-27052003><FONT=20
face=3D"Courier New" size=3D2>allows for more is</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New"=20
size=3D2>accuracy.&nbsp; It is generally true that </FONT></SPAN><SPAN=20
class=3D324111116-27052003><FONT face=3D"Courier New" size=3D2>the=20
V_fixture</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>R_fixture=20
combination of an IBIS model will </FONT></SPAN><SPAN=20
class=3D324111116-27052003><FONT face=3D"Courier New"=20
size=3D2>reproduce</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>the most=20
accurate results when the buffer is </FONT></SPAN><SPAN=20
class=3D324111116-27052003><FONT face=3D"Courier New" size=3D2>used=20
with</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>the same=20
load in the simulation.&nbsp; In case the </FONT></SPAN><SPAN=20
class=3D324111116-27052003><FONT face=3D"Courier New" size=3D2>model=20
is</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>used in=20
environments where the load impedance </FONT></SPAN><SPAN=20
class=3D324111116-27052003><FONT face=3D"Courier New" size=3D2>has=20
a</FONT></SPAN></DIV>
<DIV><SPAN class=3D324111116-27052003><FONT face=3D"Courier New" =
size=3D2>wide range,=20
it would be better if the model could </FONT></SPAN><FONT=20
face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003>also</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>use=20
waveform tables which were made under similar</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003>conditions.</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003></SPAN></FONT></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>Now=20
that I am studying the algorithms in order to be =
</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>able=20
to write VHDL-AMS IBIS models, I am =
discovering</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>a lot=20
of interesting numeric details which I wasn't</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>aware=20
of before, however, it would be to difficult =
to</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003>explain </SPAN></FONT></FONT><FONT=20
face=3D"Courier New"><FONT size=3D2><SPAN class=3D324111116-27052003>all =
of them=20
here.&nbsp; You can expect to see a</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003>presentation by me and Luca Giacotto=20
</SPAN></FONT></FONT><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003>on this subject</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>in the=20
upcoming IBIS summit.</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003></SPAN></FONT></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>Arpad=20
Muranyi</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN =
class=3D324111116-27052003>Intel=20
Corporation</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT size=3D2><SPAN=20
class=3D324111116-27052003>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</SPAN></FONT></FONT></DIV>
<DIV><FONT face=3DTahoma size=3D2>-----Original =
Message-----<BR><B>From:</B>=20
[email-masked]=20
[mailto:[email-masked]]<BR><B>Sent:</B> Tuesday, May 27, =
2003 6:43=20
AM<BR><B>To:</B> [email-masked]<BR><B>Subject:</B> [IBIS-Users] =
number of=20
waveforms<BR></FONT></DIV><BR><FONT face=3Dsans-serif size=3D2>Dear IBIS =

users,</FONT> <BR><BR><FONT face=3Dsans-serif size=3D2>It is possible to =
specify=20
more than one waveform table, for instance with different loads.</FONT>=20
<BR><FONT face=3Dsans-serif size=3D2>I have studied many IBIS models by=20
semiconductor companies. All models I have seen give only one waveform =
(both=20
rising and falling).</FONT> <BR><FONT face=3Dsans-serif size=3D2>What is =
the purpose=20
of specifying more than one waveform? Does this yield better results in =
the=20
simulator if the load differs from the standard load?</FONT> =
<BR><BR><FONT=20
face=3Dsans-serif size=3D2>With kind regards,</FONT> <BR><BR><FONT =
face=3Dsans-serif=20
size=3D2><BR>Ir. Erik van der Ven<BR>Room DB1032<BR>Business Line =
Networking=20
Infrastructure<BR>Philips Semiconductors BV<BR>Gerstweg 2<BR>6534 AE=20
Nijmegen<BR>The Netherlands<BR>Phone: =
+31-24-3534334</FONT></BODY></HTML>

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|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Tue, 27 May 2003 09:30:02 -0700
From: Bob Ross <[email-masked]>
Subject: Re: [IBIS-Users] FET Switch Model with internal pulldown resistor

Hello Moshiul:

Unfortunately, IBIS does not handle this case directly since the 
[Submodel] keyword
modes are Driving and Non-Driving and do not apply to switch states.

Here are some suggested work-around solutions that may work in some 
applications.

1. Use [Model Selector] to switch in a 500 ohm terminator.  It must be 
switched in
manually when the Series_switch is in the Off state.  This might be the 
most efficient
method if the switch control turns off several switches simultaneously. 
 However,
the user must control both the switch setting and model selector modes.

2. Issue two models, and do not allow the switch to have an Off state. 
 Document the
second model with a 500 ohm terminator at the drain side, and a high Z-model
terminator on the other side (and an [R Series] with 1 G ohm series element
to maintain connectivity).  Load this model in place of the switch model 
when
the high-Z state is used.  Since all pinout configurations have to be
documented, this may not work well with swich ICs with many switches
and multiple On/Off combinations.

3. Some EDA tools may work if a Series_switch model has a high-Z state, 
and a
terminator model is added to this manually or through EDA-specific commands
and interfaces.

All suggestions  require the user (or a separate set of scripts) to 
control the settings
manually.

Bob.

Haque, Moshiul wrote:

>I am trying to create an IBIS model for a parallel n-channel/p-channel
>mosfet switch. At the high impedance state (i.e. OFF state) drain side of
>the switch is connected to ground through a 500 ohm pulldown resistor. I am
>not sure how to model this pulldown resistor since this is connected only in
>the high-impedance state. If I model it in high impedance state the
>simulator will combine this characteristics with the ON state of the switch
>and the result will be inaccurate. 
>
>Any idea how to create the model?
>
>Regards
>Moshiul Haque	             
>Standard Linear and Logic Marketing
>Texas Instruments Incorporated                
>Ph: (903) 868-7153          	        
>
>  
>
- -- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
503-239-5536                       Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065
[email-masked]                  503-246-8048 Direct

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------------------------------

Date: Tue, 27 May 2003 09:38:31 -0700
From: "Tom Dagostino" <[email-masked]>
Subject: RE: [IBIS-Users] number of waveforms

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Anything is possible but whether it gets used is the important issue.  IBIS
allows up to 100 different waveform tables in a model statement.  Usually
there will be two rising and two falling waveforms for a given load
resistance.  One rise to ground and one rise to Vcc plus one fall to ground
and one fall with the resistor terminated to Vcc.  You can use several
different load resistors  and terminate to different voltages as long as you
keep the number of waveform tables to under 100.  But many simulators will
not know what to do with all the waveforms.  Some will just look at the
first 4 waveform tables and ignore the rest.

Tom Dagostino

Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC

2926 SE Yamhill St.                Device Modeling Division

Portland, OR 97214                 13610 SW Harness Lane

                                   Beaverton, OR 97008

http://www.teraspeed.com           503-430-1065

[email-masked]
  -----Original Message-----
  From: [email-masked]
[mailto:[email-masked]]On Behalf Of
[email-masked]
  Sent: Tuesday, May 27, 2003 6:43 AM
  To: [email-masked]
  Subject: [IBIS-Users] number of waveforms

  Dear IBIS users,

  It is possible to specify more than one waveform table, for instance with
different loads.
  I have studied many IBIS models by semiconductor companies. All models I
have seen give only one waveform (both rising and falling).
  What is the purpose of specifying more than one waveform? Does this yield
better results in the simulator if the load differs from the standard load?

  With kind regards,

  Ir. Erik van der Ven
  Room DB1032
  Business Line Networking Infrastructure
  Philips Semiconductors BV
  Gerstweg 2
  6534 AE Nijmegen
  The Netherlands
  Phone: +31-24-3534334

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<BODY>
<DIV><SPAN class=3D007203216-27052003><FONT face=3DArial color=3D#0000ff =

size=3D2>Anything is possible but whether it gets used is the important=20
issue.&nbsp; IBIS allows up to 100 different waveform tables in a model=20
statement.&nbsp; Usually there will be two rising and two falling =
waveforms for=20
a given load resistance.&nbsp; One rise to ground and one rise to Vcc =
plus one=20
fall to ground and one fall with the resistor terminated to Vcc.&nbsp; =
You can=20
use several different load resistors&nbsp; and terminate to different =
voltages=20
as long as you keep the number of waveform tables to under 100.&nbsp; =
But many=20
simulators will not know what to do with all the waveforms.&nbsp; Some =
will just=20
look at the first 4 waveform tables and ignore the =
rest.</FONT></SPAN></DIV>
<DIV>&nbsp;</DIV>
<P class=3Dsection1 style=3D"MARGIN: 0in 0in 0pt"><FONT face=3D"Courier =
New">Tom=20
Dagostino</FONT></P>
<P class=3Dsection1 style=3D"MARGIN: 0in 0in 0pt"><FONT face=3D"Courier =
New">Teraspeed=20
Consulting Group LLC <SPAN style=3D"mso-spacerun: yes">&nbsp;&nbsp;=20
&nbsp;</SPAN>Teraspeed Consulting Group LLC</FONT></P>
<P class=3Dsection1 style=3D"MARGIN: 0in 0in 0pt"><FONT face=3D"Courier =
New">2926 SE=20
Yamhill St.&nbsp;<SPAN=20
style=3D"mso-spacerun: =
yes">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp;&nbsp;</SPAN>Device=20
Modeling Division</FONT></P>
<P class=3Dsection1 style=3D"MARGIN: 0in 0in 0pt"><FONT face=3D"Courier =
New">Portland,=20
OR 97214&nbsp;<SPAN=20
style=3D"mso-spacerun: =
yes">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;</SPAN>13610=20
SW Harness Lane</FONT></P>
<P class=3Dsection1 style=3D"MARGIN: 0in 0in 0pt"><FONT face=3D"Courier =
New"><SPAN=20
style=3D"mso-spacerun: =
yes">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
</SPAN>Beaverton, OR 97008</FONT></P>
<P class=3Dsection1 style=3D"MARGIN: 0in 0in 0pt"><FONT=20
face=3D"Courier New">http://www.teraspeed.com&nbsp;<SPAN=20
style=3D"mso-spacerun: =
yes">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</SPAN><SPAN=20
style=3D"mso-spacerun: yes">&nbsp; </SPAN>503-430-1065 </FONT></P><SPAN=20
style=3D"FONT-SIZE: 12pt; FONT-FAMILY: 'Times New Roman'; =
mso-fareast-font-family: 'Times New Roman'; mso-ansi-language: EN-US; =
mso-fareast-language: EN-US; mso-bidi-language: AR-SA"><FONT=20
face=3D"Courier New">[email-masked]</FONT></SPAN>=20
<BLOCKQUOTE>
  <DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
  size=3D2>-----Original Message-----<BR><B>From:</B>=20
  [email-masked] =
[mailto:[email-masked]]<B>On=20
  Behalf Of </B>[email-masked]<BR><B>Sent:</B> Tuesday, =
May 27,=20
  2003 6:43 AM<BR><B>To:</B> =
[email-masked]<BR><B>Subject:</B>=20
  [IBIS-Users] number of waveforms<BR><BR></FONT></DIV><BR><FONT =
face=3Dsans-serif=20
  size=3D2>Dear IBIS users,</FONT> <BR><BR><FONT face=3Dsans-serif =
size=3D2>It is=20
  possible to specify more than one waveform table, for instance with =
different=20
  loads.</FONT> <BR><FONT face=3Dsans-serif size=3D2>I have studied many =
IBIS models=20
  by semiconductor companies. All models I have seen give only one =
waveform=20
  (both rising and falling).</FONT> <BR><FONT face=3Dsans-serif =
size=3D2>What is the=20
  purpose of specifying more than one waveform? Does this yield better =
results=20
  in the simulator if the load differs from the standard load?</FONT>=20
  <BR><BR><FONT face=3Dsans-serif size=3D2>With kind regards,</FONT> =
<BR><BR><FONT=20
  face=3Dsans-serif size=3D2><BR>Ir. Erik van der Ven<BR>Room =
DB1032<BR>Business=20
  Line Networking Infrastructure<BR>Philips Semiconductors =
BV<BR>Gerstweg=20
  2<BR>6534 AE Nijmegen<BR>The Netherlands<BR>Phone:=20
+31-24-3534334</FONT></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Wed, 28 May 2003 10:15:26 +0200
From: [email-masked]
Subject: RE: [IBIS-Users] number of waveforms

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Dear Lynne,

Thank you for your reply.
I am trying to model a PECL output buffer.
So the output is normally terminated with 50 Ohm to Vcc-2V.
I am wondering how accurate the simulations are with an IBIS simulator if 
the load differs from the reference load.
Will the accuracy incease if I add a second waveform set with different 
load, or to another termination voltage?
Will the simulator produce a more acurate behavior model if I provide a 
second waveform set, or does it use the waveform table that is most close 
to the load to be simulated?

With kind regards,

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

"Lynne Green" <[email-masked]>
05/27/03 06:33 PM

        To:     Erik van der Ven/NYM/SC/PHILIPS@EMEA2
        cc: 
        Subject:        RE: [IBIS-Users] number of waveforms
        Classification: 

Hi, Erik-
 
The typical recommendation is 4 waveforms tables at the same load (rising 
to Vcc, rising to GND, falling to Vcc, falling to GND).  That captures how 
the pullup and pulldown transistors turn on and off, so tables at 
additional loads are not needed.
 
Additional waveform tables are permitted (up to 100 according to the IBIS 
spec).  But the more tables you use, the slower a simulator will run.
 
- - Lynne

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]] 
Sent: Tuesday, May 27, 2003 6:43 AM
To: [email-masked]
Subject: [IBIS-Users] number of waveforms

Dear IBIS users, 

It is possible to specify more than one waveform table, for instance with 
different loads. 
I have studied many IBIS models by semiconductor companies. All models I 
have seen give only one waveform (both rising and falling). 
What is the purpose of specifying more than one waveform? Does this yield 
better results in the simulator if the load differs from the standard 
load? 

With kind regards, 

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334

- --=_alternative 002D8C1AC1256D34_=
Content-Type: text/html; charset="us-ascii"

<br><font size=2 face="sans-serif">Dear Lynne,</font>
<br>
<br><font size=2 face="sans-serif">Thank you for your reply.</font>
<br><font size=2 face="sans-serif">I am trying to model a PECL output buffer.</font>
<br><font size=2 face="sans-serif">So the output is normally terminated with 50 Ohm to Vcc-2V.</font>
<br><font size=2 face="sans-serif">I am wondering how accurate the simulations are with an IBIS simulator if the load differs from the reference load.</font>
<br><font size=2 face="sans-serif">Will the accuracy incease if I add a second waveform set with different load, or to another termination voltage?</font>
<br><font size=2 face="sans-serif">Will the simulator produce a more acurate behavior model if I provide a second waveform set, or does it use the waveform table that is most close to the load to be simulated?</font>
<br>
<br><font size=2 face="sans-serif">With kind regards,</font>
<br>
<br><font size=2 face="sans-serif"><br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td>
<br>
<br>
<br>
<br>
<br><font size=1 face="sans-serif"><b>&quot;Lynne Green&quot; &lt;[email-masked]&gt;</b></font>
<p><font size=1 face="sans-serif">05/27/03 06:33 PM</font>
<br>
<td><font size=1 face="Arial">&nbsp; &nbsp; &nbsp; &nbsp; </font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; To: &nbsp; &nbsp; &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; cc: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;RE: [IBIS-Users] number of waveforms</font>
<p><font size=1 face="sans-serif">&nbsp; &nbsp; &nbsp; &nbsp; Classification: &nbsp; &nbsp; &nbsp; &nbsp;</font>
<br></table>
<br>
<br>
<br><font size=2 color=blue face="Arial">Hi, Erik-</font>
<br><font size=3 face="Times New Roman">&nbsp;</font>
<br><font size=2 color=blue face="Arial">The typical recommendation is 4 waveforms tables at the same load (rising to Vcc, rising to GND, falling to Vcc, falling to GND). &nbsp;That captures how the pullup and pulldown transistors turn on and off, so tables at additional loads are not needed.</font>
<br><font size=3 face="Times New Roman">&nbsp;</font>
<br><font size=2 color=blue face="Arial">Additional waveform tables are permitted (up to 100 according to the IBIS spec). &nbsp;But the more tables you use, the slower a simulator will run.</font>
<br><font size=3 face="Times New Roman">&nbsp;</font>
<br><font size=2 color=blue face="Arial">- Lynne</font>
<br><font size=3 face="Times New Roman">&nbsp;</font>
<br><font size=3 face="Times New Roman">&nbsp;</font>
<br><font size=2 face="Tahoma">-----Original Message-----<b><br>
From:</b> [email-masked] [mailto:[email-masked]] <b><br>
Sent:</b> Tuesday, May 27, 2003 6:43 AM<b><br>
To:</b> [email-masked]<b><br>
Subject:</b> [IBIS-Users] number of waveforms<br>
</font>
<br><font size=2 face="sans-serif"><br>
Dear IBIS users,</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
It is possible to specify more than one waveform table, for instance with different loads.</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
I have studied many IBIS models by semiconductor companies. All models I have seen give only one waveform (both rising and falling).</font><font size=3 face="Times New Roman"> </font><font size=2 face="sans-serif"><br>
What is the purpose of specifying more than one waveform? Does this yield better results in the simulator if the load differs from the standard load?</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
With kind regards,</font><font size=3 face="Times New Roman"> <br>
</font><font size=2 face="sans-serif"><br>
<br>
Ir. Erik van der Ven<br>
Room DB1032<br>
Business Line Networking Infrastructure<br>
Philips Semiconductors BV<br>
Gerstweg 2<br>
6534 AE Nijmegen<br>
The Netherlands<br>
Phone: +31-24-3534334</font>
<br>
<br>
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------------------------------

Date: Wed, 28 May 2003 10:27:53 -0500
From: John Phillippe <[email-masked]>
Subject: [IBIS-Users] Measurement deratings?

Hello,
   I am wondering how people match their IBIS simulations to silicon 
measurements.  I read through the spec, and didn't see anything that 
looked like a derating type construct.  So it is my understanding that 
when someone takes lab measurements of an I/O buffer, those data points 
are directly inserted into the ibis file, replacing the simulated data. 
  Does this sound correct?  Is there another way, to get simulations to 
more closely match measurements?

- -- 
John Phillippe
SPS, 32 Bit Embedded Controller Division, IC Creation
Motorola      -  512-895-1835
Austin, TX    -  [email-masked]

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------------------------------

Date: Wed, 28 May 2003 11:47:37 -0400
From: Timothy Coyle <[email-masked]>
Subject: Re: [IBIS-Users] Measurement deratings?

John Phillippe wrote:
> 
> Hello,
>    I am wondering how people match their IBIS simulations to silicon
> measurements.  I read through the spec, and didn't see anything that
> looked like a derating type construct.  So it is my understanding that
> when someone takes lab measurements of an I/O buffer, those data points
> are directly inserted into the ibis file, replacing the simulated data.
>   Does this sound correct?  Is there another way, to get simulations to
> more closely match measurements?
> 
> --
> John Phillippe
> SPS, 32 Bit Embedded Controller Division, IC Creation
> Motorola      -  512-895-1835
> Austin, TX    -  [email-masked]
> 
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> |  http://www.eda.org/pub/ibis/email/          E-mail since 1993

Hi John,
Not sure if you are talking about transmission line simulations or just the IBIS data itself, but here is my 2 cents. If your IBIS file was created from SPICE models, the real correlation should be between your SPICE simulations and real silicon. A good methodology might be to correlate your SPICE models to silicon, then translate your SPICE models to IBIS, and correlate your IBIS file to your SPICE model. If your SPICE models do not correlate well to silicon, you could extract IBIS data from
the bench and insert into your IBIS file. This should make your IBIS file correlate better to silicon. It will be more difficult to get your min and max
data from the lab than from simulation. 

Regards,
Tim
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------------------------------

Date: Wed, 28 May 2003 13:55:00 -0400
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] number of waveforms

This is a multi-part message in MIME format.

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Hi, Erik,
=20
The Vref values should be the MIN and MAX signal swing range (Vcc and 0
for CMOS).  Rref should be the standard load (50 Ohms for PECL). =20
=20
The 4 tables (2 rising, 2 falling) are sufficient to define the
(time-dependent) fitting coefficients that are commonly used to
characterize transitions.
=20
Different simulators might do different things with additional tables.
SPECCTRAQuest uses all available tables.
=20
Best regards,
Lynne
=20
=20
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]

Sent: Wednesday, May 28, 2003 1:15 AM
To: Lynne Green; [email-masked]
Subject: RE: [IBIS-Users] number of waveforms

Dear Lynne,=20

Thank you for your reply.=20
I am trying to model a PECL output buffer.=20
So the output is normally terminated with 50 Ohm to Vcc-2V.=20
I am wondering how accurate the simulations are with an IBIS simulator
if the load differs from the reference load.=20
Will the accuracy incease if I add a second waveform set with different
load, or to another termination voltage?=20
Will the simulator produce a more acurate behavior model if I provide a
second waveform set, or does it use the waveform table that is most
close to the load to be simulated?=20

With kind regards,=20

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334=20

=09

"Lynne Green" <[email-masked]>=20

05/27/03 06:33 PM=20

       =20
        To:        Erik van der Ven/NYM/SC/PHILIPS@EMEA2=20
        cc:        =20
        Subject:        RE: [IBIS-Users] number of waveforms=20

        Classification:        =20

Hi, Erik-=20
 =20
The typical recommendation is 4 waveforms tables at the same load
(rising to Vcc, rising to GND, falling to Vcc, falling to GND).  That
captures how the pullup and pulldown transistors turn on and off, so
tables at additional loads are not needed.=20
 =20
Additional waveform tables are permitted (up to 100 according to the
IBIS spec).  But the more tables you use, the slower a simulator will
run.=20
 =20
- - Lynne=20
 =20
 =20
- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]

Sent: Tuesday, May 27, 2003 6:43 AM
To: [email-masked]
Subject: [IBIS-Users] number of waveforms

Dear IBIS users,=20

It is possible to specify more than one waveform table, for instance
with different loads.=20
I have studied many IBIS models by semiconductor companies. All models I
have seen give only one waveform (both rising and falling).=20
What is the purpose of specifying more than one waveform? Does this
yield better results in the simulator if the load differs from the
standard load?=20

With kind regards,=20

Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334=20

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<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =
size=3D2>Hi,=20
Erik,</FONT></SPAN></DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =
size=3D2>The=20
Vref values should be the MIN and MAX signal swing range (Vcc and 0 for=20
CMOS).&nbsp; </FONT></SPAN><SPAN class=3D841065316-28052003><FONT =
face=3DArial=20
color=3D#0000ff size=3D2>Rref should be the standard load (50 Ohms for =
PECL).&nbsp;=20
</FONT></SPAN></DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =
size=3D2>The 4=20
tables (2 rising, 2 falling) are sufficient to define =
the&nbsp;(time-dependent)=20
fitting coefficients </FONT></SPAN><SPAN =
class=3D841065316-28052003><FONT=20
face=3DArial color=3D#0000ff size=3D2>that are commonly used to=20
characterize&nbsp;transitions.</FONT></SPAN></DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2>Different simulators might do different things with additional=20
tables.&nbsp; SPECCTRAQuest uses all available =
tables.</FONT></SPAN></DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =
size=3D2>Best=20
regards,</FONT></SPAN></DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2>Lynne</FONT></SPAN></DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D841065316-28052003><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV></DIV>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr =
align=3Dleft><FONT face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> =
[email-masked]=20
[mailto:[email-masked]] <BR><B>Sent:</B> Wednesday, May =
28, 2003=20
1:15 AM<BR><B>To:</B> Lynne Green; [email-masked]<BR><B>Subject:</B> =
RE:=20
[IBIS-Users] number of waveforms<BR><BR></FONT></DIV><BR><FONT =
face=3Dsans-serif=20
size=3D2>Dear Lynne,</FONT> <BR><BR><FONT face=3Dsans-serif =
size=3D2>Thank you for=20
your reply.</FONT> <BR><FONT face=3Dsans-serif size=3D2>I am trying to =
model a PECL=20
output buffer.</FONT> <BR><FONT face=3Dsans-serif size=3D2>So the output =
is normally=20
terminated with 50 Ohm to Vcc-2V.</FONT> <BR><FONT face=3Dsans-serif =
size=3D2>I am=20
wondering how accurate the simulations are with an IBIS simulator if the =
load=20
differs from the reference load.</FONT> <BR><FONT face=3Dsans-serif =
size=3D2>Will=20
the accuracy incease if I add a second waveform set with different load, =
or to=20
another termination voltage?</FONT> <BR><FONT face=3Dsans-serif =
size=3D2>Will the=20
simulator produce a more acurate behavior model if I provide a second =
waveform=20
set, or does it use the waveform table that is most close to the load to =
be=20
simulated?</FONT> <BR><BR><FONT face=3Dsans-serif size=3D2>With kind =
regards,</FONT>=20
<BR><BR><FONT face=3Dsans-serif size=3D2><BR>Ir. Erik van der =
Ven<BR>Room=20
DB1032<BR>Business Line Networking Infrastructure<BR>Philips =
Semiconductors=20
BV<BR>Gerstweg 2<BR>6534 AE Nijmegen<BR>The Netherlands<BR>Phone:=20
+31-24-3534334</FONT> <BR><BR><BR>
<TABLE width=3D"100%">
  <TBODY>
  <TR vAlign=3Dtop>
    <TD>
    <TD><BR><BR><BR><BR><BR><FONT face=3Dsans-serif size=3D1><B>"Lynne =
Green"=20
      &lt;[email-masked]&gt;</B></FONT>=20
      <P><FONT face=3Dsans-serif size=3D1>05/27/03 06:33 PM</FONT> =
<BR></P>
    <TD><FONT face=3DArial size=3D1>&nbsp; &nbsp; &nbsp; &nbsp; =
</FONT><BR><FONT=20
      face=3Dsans-serif size=3D1>&nbsp; &nbsp; &nbsp; &nbsp; To: &nbsp; =
&nbsp;=20
      &nbsp; &nbsp;Erik van der Ven/NYM/SC/PHILIPS@EMEA2</FONT> =
<BR><FONT=20
      face=3Dsans-serif size=3D1>&nbsp; &nbsp; &nbsp; &nbsp; cc: &nbsp; =
&nbsp;=20
      &nbsp; &nbsp;</FONT> <BR><FONT face=3Dsans-serif size=3D1>&nbsp; =
&nbsp; &nbsp;=20
      &nbsp; Subject: &nbsp; &nbsp; &nbsp; &nbsp;RE: [IBIS-Users] number =
of=20
      waveforms</FONT>=20
      <P><FONT face=3Dsans-serif size=3D1>&nbsp; &nbsp; &nbsp; &nbsp;=20
      Classification: &nbsp; &nbsp; &nbsp; &nbsp;</FONT>=20
<BR></P></TR></TBODY></TABLE><BR><BR><BR><FONT face=3DArial color=3Dblue =
size=3D2>Hi,=20
Erik-</FONT> <BR><FONT face=3D"Times New Roman" size=3D3>&nbsp;</FONT> =
<BR><FONT=20
face=3DArial color=3Dblue size=3D2>The typical recommendation is 4 =
waveforms tables at=20
the same load (rising to Vcc, rising to GND, falling to Vcc, falling to =
GND).=20
&nbsp;That captures how the pullup and pulldown transistors turn on and =
off, so=20
tables at additional loads are not needed.</FONT> <BR><FONT=20
face=3D"Times New Roman" size=3D3>&nbsp;</FONT> <BR><FONT face=3DArial =
color=3Dblue=20
size=3D2>Additional waveform tables are permitted (up to 100 according =
to the IBIS=20
spec). &nbsp;But the more tables you use, the slower a simulator will=20
run.</FONT> <BR><FONT face=3D"Times New Roman" size=3D3>&nbsp;</FONT> =
<BR><FONT=20
face=3DArial color=3Dblue size=3D2>- Lynne</FONT> <BR><FONT =
face=3D"Times New Roman"=20
size=3D3>&nbsp;</FONT> <BR><FONT face=3D"Times New Roman" =
size=3D3>&nbsp;</FONT>=20
<BR><FONT face=3DTahoma size=3D2>-----Original =
Message-----<B><BR>From:</B>=20
[email-masked] [mailto:[email-masked]]=20
<B><BR>Sent:</B> Tuesday, May 27, 2003 6:43 AM<B><BR>To:</B>=20
[email-masked]<B><BR>Subject:</B> [IBIS-Users] number of=20
waveforms<BR></FONT><BR><FONT face=3Dsans-serif size=3D2><BR>Dear IBIS=20
users,</FONT><FONT face=3D"Times New Roman" size=3D3> <BR></FONT><FONT=20
face=3Dsans-serif size=3D2><BR>It is possible to specify more than one =
waveform=20
table, for instance with different loads.</FONT><FONT face=3D"Times New =
Roman"=20
size=3D3> </FONT><FONT face=3Dsans-serif size=3D2><BR>I have studied =
many IBIS models=20
by semiconductor companies. All models I have seen give only one =
waveform (both=20
rising and falling).</FONT><FONT face=3D"Times New Roman" size=3D3> =
</FONT><FONT=20
face=3Dsans-serif size=3D2><BR>What is the purpose of specifying more =
than one=20
waveform? Does this yield better results in the simulator if the load =
differs=20
from the standard load?</FONT><FONT face=3D"Times New Roman" size=3D3>=20
<BR></FONT><FONT face=3Dsans-serif size=3D2><BR>With kind =
regards,</FONT><FONT=20
face=3D"Times New Roman" size=3D3> <BR></FONT><FONT face=3Dsans-serif=20
size=3D2><BR><BR>Ir. Erik van der Ven<BR>Room DB1032<BR>Business Line =
Networking=20
Infrastructure<BR>Philips Semiconductors BV<BR>Gerstweg 2<BR>6534 AE=20
Nijmegen<BR>The Netherlands<BR>Phone: +31-24-3534334</FONT>=20
<BR><BR></BODY></HTML>
=00
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End of ibis-users V1 #24
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