Subject: ibis-users V1 #4
From: owner-ibis-users@ (ibis-users)
To: [email-masked]

ibis-users          Wednesday, March 20 2002          Volume 01 : Number 004

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Date: Mon, 18 Feb 2002 16:34:10 -0500
From: "Service@wlsi" <[email-masked]>
Subject: SI Project Reviewer wanted

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Dear SI Experts,

SI Project Reviewer Wanted from SmarterIdea..

Go to www.smarteridea.com to register for project reviewer.

SmarterIdea.com
The Generational Website for Your Smarter Ideas

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------------------------------

Date: Tue, 19 Feb 2002 17:47:27 +0530
From: [email-masked]
Subject: Sphota =?iso-8859-1?q?'s_CEO_visiting_the_US_of_America?=

Hi,
Sphota   Tech  (www.sphota.com),  is  a  provider  of  end-to-end  software
solutions  and  services. It is part of 20 years old the Hiranandani Group,
one  of  the  most  respected  business  group  in India, employs over 1500
people,  with  business  interests  in  Call  Center,  IT services, Retail,
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Sphota  is  keenly interested in building a long term business relationship
with  companies such as yours to compliment individual strengths for mutual
benefits.  Our  business agenda is to provide following services to you and
your clients:

     Offshore Development services
     Onsite consulting services
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     Call Center services - Technical support/Help desk/e-mail support
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Should  you  agree that there is an opportunity in working together, please
let  us know. We would be more than happy to fix a meeting with our CEO Mr.
Lanewala during his visit to the USA in the first week of March 02.

For   more   information   about   us,   please  visit  our  web  sites  at
http://www.hiranandani.com/, www.buildbyte.com and www.zentatech.com. These
will provide you with information on our background and capabilities.

We  have  identified your company through our research on the Internet, and
hope  to  create  a  fruitful  cooperation  with you in the future. If this
letter  would  be  best  addressed  to someone else in your company, kindly
forward it to the relevant colleague.

Thanking You,
Yours Sincerely,

Rajesh M. Revankar  [email-masked] or [email-masked]
Manager-Global Marketing Initiatives
Sphota  Tech,  Olympia,  Hiranandani  Gardens, Powai, Mumbai (Bombay) ? 400
076, India
Mobile:  +91-98203-20763,  Direct:  +91-22-576  6797, Telephone: +91-22-570
6441
Fax: +91-22-570 6444

------------------------------

Date: Tue, 19 Feb 2002 12:55:38 -0500
From: "Perry Qu" <[email-masked]>
Subject: IBIS model for high speed differential application

Hi!

I have been doing some simulation in HSPICE using IBIS model for a while
and encountered many problems, especially when dealing with high speed
differential application such as LVPECL, LVDS, etc. The model behave
strangely in HSPICE, giving me wierd noise, unbalanced voltage swing,
etc. Does this happen to you ? In some cases, the model works ok in
other SI simulation tool, such as XTK.

In general, what's your comments about using IBIS model for gb/s
application ?

Thanks in advance for your feedback.

Regards

PErry

- --
Perry Qu

Product Integrity         |      600 March Road
Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada

DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Tue, 19 Feb 2002 12:06:36 -0800
From: Chris Brewster <[email-masked]>
Subject: Re: IBIS model for high speed differential application

Perry,

Yes!  I have done some LVDS simulations using IBIS at 2.5 and 3.125Gpbs.  I 
get very good results with LVDS driver and receiver models, using Cadence 
SigXP.  However, when I use the same LVDS IBIS models in HSPICE my results 
go off the chart???

In fact, the driver model in HSPICE gives good results.  It's when the 
receiver model is added that things go wacky...

My two cents...

- -Chris Brewster

At 12:55 PM 2/19/2002 -0500, Perry Qu wrote:
>Hi!
>
>I have been doing some simulation in HSPICE using IBIS model for a while
>and encountered many problems, especially when dealing with high speed
>differential application such as LVPECL, LVDS, etc. The model behave
>strangely in HSPICE, giving me wierd noise, unbalanced voltage swing,
>etc. Does this happen to you ? In some cases, the model works ok in
>other SI simulation tool, such as XTK.
>
>In general, what's your comments about using IBIS model for gb/s
>application ?
>
>Thanks in advance for your feedback.
>
>Regards
>
>PErry
>
>--
>Perry Qu
>
>Product Integrity         |      600 March Road
>Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada
>
>DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Tue, 19 Feb 2002 15:23:05 -0500
From: [email-masked]
Subject: Re: IBIS model for high speed differential application

I too have experienced difficulties in simulating LVDS IBIS models in
HSPICE at high frequencies.  I wish I had something more constructive to
add other than to corroborate what has already been said.

Adam Tambone

Chris Brewster <[email-masked]>@eda.org on 02/19/2002 03:06:36 PM

Sent by:  [email-masked]

To:   "Perry Qu" <[email-masked]>
cc:   IBIS group <[email-masked]>

Subject:  Re: IBIS model for high speed differential application

Perry,

Yes!  I have done some LVDS simulations using IBIS at 2.5 and 3.125Gpbs.  I
get very good results with LVDS driver and receiver models, using Cadence
SigXP.  However, when I use the same LVDS IBIS models in HSPICE my results
go off the chart???

In fact, the driver model in HSPICE gives good results.  It's when the
receiver model is added that things go wacky...

My two cents...

- -Chris Brewster

At 12:55 PM 2/19/2002 -0500, Perry Qu wrote:
>Hi!
>
>I have been doing some simulation in HSPICE using IBIS model for a while
>and encountered many problems, especially when dealing with high speed
>differential application such as LVPECL, LVDS, etc. The model behave
>strangely in HSPICE, giving me wierd noise, unbalanced voltage swing,
>etc. Does this happen to you ? In some cases, the model works ok in
>other SI simulation tool, such as XTK.
>
>In general, what's your comments about using IBIS model for gb/s
>application ?
>
>Thanks in advance for your feedback.
>
>Regards
>
>PErry
>
>--
>Perry Qu
>
>Product Integrity         |      600 March Road
>Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada
>
>DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Tue, 19 Feb 2002 17:44:46 -0500
From: "zanella, fabrizio" <[email-masked]>
Subject: RE: IBIS model for high speed differential application

Chris, Adam, Perry.  Have you requested spice models from the vendors of the
LVPECL and LVDS devices to run a comparison?  All our simulations at
2.5-3.125Gbs are performed using spice models in Hspice and they work out
well.
Regards,

Fabrizio Zanella
Signal Integrity
EMC Corporation
508-249-4645
[email-masked]

- -----Original Message-----
From: [email-masked]
[mailto:[email-masked]]
Sent: Tuesday, February 19, 2002 3:23 PM
To: Chris Brewster
Cc: IBIS group
Subject: Re: IBIS model for high speed differential application

I too have experienced difficulties in simulating LVDS IBIS models in
HSPICE at high frequencies.  I wish I had something more constructive to
add other than to corroborate what has already been said.

Adam Tambone

Chris Brewster <[email-masked]>@eda.org on 02/19/2002 03:06:36 PM

Sent by:  [email-masked]

To:   "Perry Qu" <[email-masked]>
cc:   IBIS group <[email-masked]>

Subject:  Re: IBIS model for high speed differential application

Perry,

Yes!  I have done some LVDS simulations using IBIS at 2.5 and 3.125Gpbs.  I
get very good results with LVDS driver and receiver models, using Cadence
SigXP.  However, when I use the same LVDS IBIS models in HSPICE my results
go off the chart???

In fact, the driver model in HSPICE gives good results.  It's when the
receiver model is added that things go wacky...

My two cents...

- -Chris Brewster

At 12:55 PM 2/19/2002 -0500, Perry Qu wrote:
>Hi!
>
>I have been doing some simulation in HSPICE using IBIS model for a while
>and encountered many problems, especially when dealing with high speed
>differential application such as LVPECL, LVDS, etc. The model behave
>strangely in HSPICE, giving me wierd noise, unbalanced voltage swing,
>etc. Does this happen to you ? In some cases, the model works ok in
>other SI simulation tool, such as XTK.
>
>In general, what's your comments about using IBIS model for gb/s
>application ?
>
>Thanks in advance for your feedback.
>
>Regards
>
>PErry
>
>--
>Perry Qu
>
>Product Integrity         |      600 March Road
>Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada
>
>DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Wed, 20 Feb 2002 09:17:13 +0900
From: "Charlie Park" <[email-masked]>
Subject: [Q] Is there any EDA simulator accepting Connector IBIS?

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Date: Tue, 19 Feb 2002 18:18:58 -0800
From: "Bill Hargin" <[email-masked]>
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

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Hello Charlie:

What you have may be HSPICE models.  The last I heard was that the spec had
not been approved.  (There may be more recent information that someone can
provide.)  For you to be able to simulate with an IBIS connector model you
need 3 things:

1. The spec to be finalized
2. A model in the IBIS format (I'm doubting that any of these are in
existence yet)
3. A simulator that supports it (I don't think that any of them do at this
point, since the spec has not been finalized)

2 and 3 are going to take some time after 1 is approved.

Best Regards,
Bill Hargin
Direct: 425-702-0744
Fax:    425-702-0305

Cognition Consulting
Electronic Design Software and Consulting
http://www.CognitionConsulting.com

  -----Original Message-----
  From: [email-masked] [mailto:[email-masked]]On Behalf
Of Charlie Park
  Sent: Tuesday, February 19, 2002 4:17 PM
  To: [email-masked]
  Subject: [Q] Is there any EDA simulator accepting Connector IBIS?

  Dear all of you,

  I am Charlie Park in KAIST, South Korea.

  I am very interested in the IBIS of connector and downloaded the latest
version spec.

  But I am afraid that I can't find any way to simulate an example
file(molex one) because every EDA tool
  accepts just the buffer IBIS format, normal one.

  How can I simulate the connector IBIS model?

  Please give me some advice or information about simulation tool accepting
connector IBIS model.

  Thank you and have a nice day.

  Best regards.

  - from South Korea, Charlie

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</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D980321302-20022002>Hello=20
Charlie:</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D980321302-20022002></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D980321302-20022002>What=20
you have may be HSPICE models.&nbsp; The last I heard was that the spec =
had not=20
been approved.&nbsp; (There may be more recent information that someone =
can=20
provide.)&nbsp; For you to be able to simulate with an IBIS connector =
model you=20
need 3 things:</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D980321302-20022002></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D980321302-20022002>1. The=20
spec to be finalized</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D980321302-20022002>2. A=20
model in the IBIS format (I'm doubting that any of these are in =
existence=20
yet)</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D980321302-20022002>3. A=20
simulator that supports it (I don't think that any of them do at this =
point,=20
since the spec has not been finalized)</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D980321302-20022002></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D980321302-20022002>2 and=20
3 are going to take some time after 1 is approved.&nbsp; =
</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D980321302-20022002></SPAN></FONT><FONT face=3DArial =
color=3D#0000ff=20
size=3D2><SPAN class=3D980321302-20022002></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT color=3D#0000ff size=3D2><SPAN=20
class=3D980321302-20022002></SPAN></FONT><FONT size=3D2><FONT =
face=3DArial>Best=20
Regards,<BR>Bill Hargin<BR>Direct: =
425-702-0744<BR>Fax:&nbsp;&nbsp;&nbsp;=20
425-702-0305<BR><BR>Cognition Consulting<BR>Electronic Design Software =
and=20
Consulting<BR></FONT><A target=3D_blank=20
href=3D"http://www.cognitionconsulting.com/"><FONT=20
face=3DArial>http://www.CognitionConsulting.com</FONT></A><BR></DIV></FON=
T><FONT=20
size=3D2><BR></FONT>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px =
solid; MARGIN-RIGHT: 0px">
  <DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
  size=3D2>-----Original Message-----<BR><B>From:</B> =
[email-masked]=20
  [mailto:[email-masked]]<B>On Behalf Of </B>Charlie=20
  Park<BR><B>Sent:</B> Tuesday, February 19, 2002 4:17 PM<BR><B>To:</B>=20
  [email-masked]<BR><B>Subject:</B> [Q] Is there any EDA simulator =
accepting=20
  Connector IBIS?<BR><BR></FONT></DIV>
  <DIV><FONT size=3D2>
  <DIV><FONT size=3D2>Dear all of you,</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>I am Charlie Park in KAIST, South =
Korea.</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>I am very interested in the IBIS of connector and =
downloaded=20
  the latest version spec.</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>But I am afraid that I can't find any way to =
simulate an=20
  example file(molex one) because every EDA tool</FONT></DIV>
  <DIV><FONT size=3D2>accepts just the buffer IBIS format, normal=20
one.</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>How can I simulate the connector IBIS =
model?</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>Please give me some advice or information about =
simulation=20
  tool accepting connector IBIS model.</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>Thank you and have a nice day.</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>Best regards.</FONT></DIV>
  <DIV>&nbsp;</DIV>
  <DIV>&nbsp;</DIV>
  <DIV><FONT size=3D2>- from South Korea,=20
Charlie</FONT></DIV></FONT></DIV></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Wed, 20 Feb 2002 06:13:53 -0600
From: [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Charlie,

The IBIS Connector Model (icm) specification is still under revision.  The
document that you downloaded is a work in progress.  The specification will not
be fully supported by simulators or model makers until the specification reaches
at least level 1.0.

The good news is that the level 1.0 is getting close.

Depending on the simulator, there are some ways to get connector models into the
circuit.  Unfortunately, this can be simulator dependent.

As such, the best bet is to see what kind of models does your simulator support,
 then see if the connector vendor has that type of model available.

Best Regards,
_gus

- -----Original Message-----
From: "Charlie Park" <[email-masked]>
Sent: Tuesday, February 19, 2002 6:17 PM
To: <[email-masked]>
Subject: [Q] Is there any EDA simulator accepting Connector IBIS?

Dear all of you,

I am Charlie Park in KAIST, South Korea.

I am very interested in the IBIS of connector and downloaded  the latest version
spec.

But I am afraid that I can't find any way to simulate an  example file(molex
one)
because every EDA tool
accepts just the buffer IBIS format, normal one.

How can I simulate the connector IBIS model?

Please give me some advice or information about simulation  tool accepting
connector
IBIS model.

Thank you and have a nice day.

Best regards.

- - from South Korea,  Charlie

------------------------------

Date: Wed, 20 Feb 2002 09:19:41 -0500
From: "Perry Qu" <[email-masked]>
Subject: Re: [Q] Is there any EDA simulator accepting Connector IBIS?

Hi,

I think it will be more useful that the EDA tool can accept SPICE format of
connector models, as most of the model for connectors are in SPICE. I thought this
should be a fairly easy task for EDA tool vendors.

Regards

Perry

[email-masked] wrote:

> Charlie,
>
> The IBIS Connector Model (icm) specification is still under revision.  The
> document that you downloaded is a work in progress.  The specification will not
> be fully supported by simulators or model makers until the specification reaches
> at least level 1.0.
>
> The good news is that the level 1.0 is getting close.
>
> Depending on the simulator, there are some ways to get connector models into the
> circuit.  Unfortunately, this can be simulator dependent.
>
> As such, the best bet is to see what kind of models does your simulator support,
>  then see if the connector vendor has that type of model available.
>
> Best Regards,
> _gus
>
> -----Original Message-----
> From: "Charlie Park" <[email-masked]>
> Sent: Tuesday, February 19, 2002 6:17 PM
> To: <[email-masked]>
> Subject: [Q] Is there any EDA simulator accepting Connector IBIS?
>
> Dear all of you,
>
> I am Charlie Park in KAIST, South Korea.
>
> I am very interested in the IBIS of connector and downloaded  the latest version
> spec.
>
> But I am afraid that I can't find any way to simulate an  example file(molex
> one)
> because every EDA tool
> accepts just the buffer IBIS format, normal one.
>
> How can I simulate the connector IBIS model?
>
> Please give me some advice or information about simulation  tool accepting
> connector
> IBIS model.
>
> Thank you and have a nice day.
>
> Best regards.
>
> - from South Korea,  Charlie

- --
Perry Qu

Product Integrity         |      600 March Road
Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada

DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Wed, 20 Feb 2002 11:55:06 -0800
From: Chris Brewster <[email-masked]>
Subject: RE: IBIS model for high speed differential application

Fabrizio,

Yes,

The LVDS IBIS model was extracted from transistor level spice models.  The 
spice model performs as expected.  The IBIS model run in SigXP performs 
within 99.6% of the original spice model run in HSPICE....  However, take 
the IBIS model, and run it in HSPICE, and the results are no where near 
what you would expect....

- -Chris

At 05:44 PM 2/19/2002 -0500, zanella, fabrizio wrote:
>Chris, Adam, Perry.  Have you requested spice models from the vendors of the
>LVPECL and LVDS devices to run a comparison?  All our simulations at
>2.5-3.125Gbs are performed using spice models in Hspice and they work out
>well.
>Regards,
>
>Fabrizio Zanella
>Signal Integrity
>EMC Corporation
>508-249-4645
>[email-masked]
>
>
>
>-----Original Message-----
>From: [email-masked]
>[mailto:[email-masked]]
>Sent: Tuesday, February 19, 2002 3:23 PM
>To: Chris Brewster
>Cc: IBIS group
>Subject: Re: IBIS model for high speed differential application
>
>
>
>I too have experienced difficulties in simulating LVDS IBIS models in
>HSPICE at high frequencies.  I wish I had something more constructive to
>add other than to corroborate what has already been said.
>
>Adam Tambone
>
>
>
>
>
>Chris Brewster <[email-masked]>@eda.org on 02/19/2002 03:06:36 PM
>
>Sent by:  [email-masked]
>
>
>To:   "Perry Qu" <[email-masked]>
>cc:   IBIS group <[email-masked]>
>
>Subject:  Re: IBIS model for high speed differential application
>
>
>Perry,
>
>Yes!  I have done some LVDS simulations using IBIS at 2.5 and 3.125Gpbs.  I
>get very good results with LVDS driver and receiver models, using Cadence
>SigXP.  However, when I use the same LVDS IBIS models in HSPICE my results
>go off the chart???
>
>In fact, the driver model in HSPICE gives good results.  It's when the
>receiver model is added that things go wacky...
>
>My two cents...
>
>-Chris Brewster
>
>At 12:55 PM 2/19/2002 -0500, Perry Qu wrote:
> >Hi!
> >
> >I have been doing some simulation in HSPICE using IBIS model for a while
> >and encountered many problems, especially when dealing with high speed
> >differential application such as LVPECL, LVDS, etc. The model behave
> >strangely in HSPICE, giving me wierd noise, unbalanced voltage swing,
> >etc. Does this happen to you ? In some cases, the model works ok in
> >other SI simulation tool, such as XTK.
> >
> >In general, what's your comments about using IBIS model for gb/s
> >application ?
> >
> >Thanks in advance for your feedback.
> >
> >Regards
> >
> >PErry
> >
> >--
> >Perry Qu
> >
> >Product Integrity         |      600 March Road
> >Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada
> >
> >DID: (613) 7846720        |      FAX: (613) 5993642
>

------------------------------

Date: Wed, 20 Feb 2002 16:49:24 -0600
From: [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Yes,

 SPICE models are already available... But some simulators only accept IBIS
models (i.e. They can not handle SPICE).

_gus

- -----Original Message-----
From: "Perry Qu" <[email-masked]>
Sent: Wednesday, February 20, 2002 8:20 AM
To: [email-masked]
Subject: Re: [Q] Is there any EDA simulator accepting Connector IBIS?

Hi,

I think it will be more useful that the EDA tool can accept SPICE format of
connector models, as most of the model for connectors are in SPICE. I thought
this
should be a fairly easy task for EDA tool vendors.

Regards

Perry

[email-masked] wrote:

> Charlie,
>
> The IBIS Connector Model (icm) specification is still under revision.  The
> document that you downloaded is a work in progress.  The specification will
not
> be fully supported by simulators or model makers until the specification
reaches
> at least level 1.0.
>
> The good news is that the level 1.0 is getting close.
>
> Depending on the simulator, there are some ways to get connector models into
the
> circuit.  Unfortunately, this can be simulator dependent.
>
> As such, the best bet is to see what kind of models does your simulator
support,
>  then see if the connector vendor has that type of model available.
>
> Best Regards,
> _gus
>
> -----Original Message-----
> From: "Charlie Park" <[email-masked]>
> Sent: Tuesday, February 19, 2002 6:17 PM
> To: <[email-masked]>
> Subject: [Q] Is there any EDA simulator accepting Connector IBIS?
>
> Dear all of you,
>
> I am Charlie Park in KAIST, South Korea.
>
> I am very interested in the IBIS of connector and downloaded  the latest
version
> spec.
>
> But I am afraid that I can't find any way to simulate an  example file(molex
> one)
> because every EDA tool
> accepts just the buffer IBIS format, normal one.
>
> How can I simulate the connector IBIS model?
>
> Please give me some advice or information about simulation  tool accepting
> connector
> IBIS model.
>
> Thank you and have a nice day.
>
> Best regards.
>
> - from South Korea,  Charlie

- --
Perry Qu

Product Integrity         |      600 March Road
Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada

DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Wed, 20 Feb 2002 18:20:30 -0500
From: "Lynne Green" <[email-masked]>
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Several EDA vendors (such as Cadence, Innoveda, and Mentor)
can handle Spice models.  Connector model swathing is a related
problem, but even here you will find solutions available from many
of the EDA vendors.

The IBIS connector specification will provide a common model format
that allows vendors to provide a model file that can be used by all 
EDA tool vendors.  It also allows connector vendors to release models
containing behavioral data rather than physical data.

- - Lynne

Dr. Lynne Green
Senior Member of Consulting Staff
Cadence Design Systems, Inc.

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Wednesday, February 20, 2002 2:49 PM
To: Perry Qu; [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Yes,

 SPICE models are already available... But some simulators only accept IBIS
models (i.e. They can not handle SPICE).

_gus

- -----Original Message-----
From: "Perry Qu" <[email-masked]>
Sent: Wednesday, February 20, 2002 8:20 AM
To: [email-masked]
Subject: Re: [Q] Is there any EDA simulator accepting Connector IBIS?

Hi,

I think it will be more useful that the EDA tool can accept SPICE format of
connector models, as most of the model for connectors are in SPICE. I thought
this
should be a fairly easy task for EDA tool vendors.

Regards

Perry

[email-masked] wrote:

> Charlie,
>
> The IBIS Connector Model (icm) specification is still under revision.  The
> document that you downloaded is a work in progress.  The specification will
not
> be fully supported by simulators or model makers until the specification
reaches
> at least level 1.0.
>
> The good news is that the level 1.0 is getting close.
>
> Depending on the simulator, there are some ways to get connector models into
the
> circuit.  Unfortunately, this can be simulator dependent.
>
> As such, the best bet is to see what kind of models does your simulator
support,
>  then see if the connector vendor has that type of model available.
>
> Best Regards,
> _gus
>
> -----Original Message-----
> From: "Charlie Park" <[email-masked]>
> Sent: Tuesday, February 19, 2002 6:17 PM
> To: <[email-masked]>
> Subject: [Q] Is there any EDA simulator accepting Connector IBIS?
>
> Dear all of you,
>
> I am Charlie Park in KAIST, South Korea.
>
> I am very interested in the IBIS of connector and downloaded  the latest
version
> spec.
>
> But I am afraid that I can't find any way to simulate an  example file(molex
> one)
> because every EDA tool
> accepts just the buffer IBIS format, normal one.
>
> How can I simulate the connector IBIS model?
>
> Please give me some advice or information about simulation  tool accepting
> connector
> IBIS model.
>
> Thank you and have a nice day.
>
> Best regards.
>
> - from South Korea,  Charlie

- --
Perry Qu

Product Integrity         |      600 March Road
Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada

DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Wed, 20 Feb 2002 18:33:28 -0500
From: Mike LaBonte <[email-masked]>
Subject: Re: [Q] Is there any EDA simulator accepting Connector IBIS?

The IBIS Connector format allows simulators to automatically form and
connect a circuit for a pin and the cluster of pins near it on a
connector. SPICE connector files usually require a human to figure
out how to manually connect the circuit for each simulation, and they
may be whole connector models that need to be reduced for reasonable
simulation times. So the main difference is the "administrative" info
that allows IBIS connector models to be used in a more or less plug
and play manner. The circuit models derived from the IBIS files may
be otherwise effectively the same as the SPICE models.

Mike LaBonte

Perry Qu wrote:
> 
> Hi,
> 
> I think it will be more useful that the EDA tool can accept SPICE format of
> connector models, as most of the model for connectors are in SPICE. I thought this
> should be a fairly easy task for EDA tool vendors.
> 
> Regards
> 
> Perry
> 
> [email-masked] wrote:
> 
> > Charlie,
> >
> > The IBIS Connector Model (icm) specification is still under revision.  The
> > document that you downloaded is a work in progress.  The specification will not
> > be fully supported by simulators or model makers until the specification reaches
> > at least level 1.0.
> >
> > The good news is that the level 1.0 is getting close.
> >
> > Depending on the simulator, there are some ways to get connector models into the
> > circuit.  Unfortunately, this can be simulator dependent.
> >
> > As such, the best bet is to see what kind of models does your simulator support,
> >  then see if the connector vendor has that type of model available.
> >
> > Best Regards,
> > _gus
> >
> > -----Original Message-----
> > From: "Charlie Park" <[email-masked]>
> > Sent: Tuesday, February 19, 2002 6:17 PM
> > To: <[email-masked]>
> > Subject: [Q] Is there any EDA simulator accepting Connector IBIS?
> >
> > Dear all of you,
> >
> > I am Charlie Park in KAIST, South Korea.
> >
> > I am very interested in the IBIS of connector and downloaded  the latest version
> > spec.
> >
> > But I am afraid that I can't find any way to simulate an  example file(molex
> > one)
> > because every EDA tool
> > accepts just the buffer IBIS format, normal one.
> >
> > How can I simulate the connector IBIS model?
> >
> > Please give me some advice or information about simulation  tool accepting
> > connector
> > IBIS model.
> >
> > Thank you and have a nice day.
> >
> > Best regards.
> >
> > - from South Korea,  Charlie
> 
> --
> Perry Qu
> 
> Product Integrity         |      600 March Road
> Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada
> 
> DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Wed, 20 Feb 2002 16:31:47 -0800
From: "Ross, Bob" <[email-masked]>
Subject: European IBIS Summit 4th Announcement

To All:

This is the fourth announcement of the European IBIS Summit
meeting held during DATE 2002 in Paris for presentations and
participation. A tentative list of presentation is a the end.

Please signup with Karine Loudet below if your are planning to
attend.

Bob Ross
Mentor Graphics

            E U R O P E A N   I B I S   S U M M I T   M E E T I N G
                      F O R T H   A N N O U N C E M E N T

Time/Date:     8:30 AM - 2 PM, Friday, March 8, 2002

Location:      Concorde-Lafayette Hotel (adjacent to Le Palais des 
               Congress de Paris Prote Mailot - site of the DATE2002
               Conference) in Paris, France

Rooms:         Salon Van Gogh/Pissarro

Content:       Presentations and Discussions

Purpose:       Solicit and Exchange IBIS Model Related Information and Ideas.

Sponsors:      EADS, Innoveda, Mentor Graphics

DATE2000:      March 4-8, 2002.  The IBIS meeting is scheduled the day
               following the trade show portion of the Conference

               See http://www.date-conference.com for more information.

BACKGROUND

For the last several years we have been holding very successful European IBIS
Summit Meetings.  We plan a combination of the following:

  Submitted Presentations on IBIS Topics (See below)
  Less formal Ad Hoc Presentations and Discussions
  IBIS Questions and Answers
  
Below is an invitation to register and also to submit presentations.

CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and digital
circuit design are invited to participate in the European IBIS Summit meeting.
If you plan to participate, please supply the information below:

  Name:
  E-mail address:
  Company:
  Telephone:

Send to:

  Karine Loudet ([email-masked])

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS experiences
or issues.  Some suggested subjects of interest are:

  IBIS Model Development Experiences
  Company IBIS Standards and Requirements
  Generating and Validating IBIS Models
  Future IBIS Requirements
  EMC/EMI IBIS Issues

Format of Presentation:  Overhead Projections
Time:                    15-30 Minutes
Electronic Archival:     We request electronic versions so that the
                         presentations can be archived and also made
                         available to non-attendees.  Formats used in
                         the past have been text, Power Point, Word, 
                         Postscript, and Acrobat.

Please plan to bring copies of your presentation to distribute at the meeting.

If you plan a presentation, please supply

  Title:
  Presenter:
  E-mail address:
  Company:
  Telephone:

  Estimate Time:

Send this to:

  Bob Ross ([email-masked])

AGENDA

This tentative agenda includes presentations, discussions, and a free lunch:

  IBIS Activity Report, Stephen Peters, Intel, USA
  Multi-lingual Modeling within IBIS Tom Dagostino, Mentor Graphics, USA
  XML in IBIS based Buffer Modelling, TBD, Zuken, France
  Update on Zuken's ibisinf Utility TBD, Zuken, France
  ICEM Status, TBD from UTE, France
  Principle of Crossbar-current Calculation from IBIS Models, Katja Koller,
    Siemens AG, Germany

Several other presentations are pending.

FOR FURTHER INFORMATION:

Bob Ross,
Vice Chair, EIA/IBIS Open Forum
Mentor Graphics
8005 S.W. Boeckman Road
Wilsonville, Oregon 97070
USA

(503) 685-0732
[email-masked]

------------------------------

Date: Wed, 20 Feb 2002 16:45:42 -0800
From: "Mellitz, Richard" <[email-masked]>
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

I wonder if the EDA vendors agree on what do with ground between boards when
using one of these models. Just because you can read a model in does not
guarantee good results. In all likelihood, it will require the user to
understand return path issues.

... Rich Mellitz, Intel

- -----Original Message-----
From: Lynne Green [mailto:[email-masked]]
Sent: Wednesday, February 20, 2002 6:20 PM
To: [email-masked]
Cc: Dennis Nagle; [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Several EDA vendors (such as Cadence, Innoveda, and Mentor)
can handle Spice models.  Connector model swathing is a related
problem, but even here you will find solutions available from many
of the EDA vendors.

The IBIS connector specification will provide a common model format
that allows vendors to provide a model file that can be used by all 
EDA tool vendors.  It also allows connector vendors to release models
containing behavioral data rather than physical data.

- - Lynne

Dr. Lynne Green
Senior Member of Consulting Staff
Cadence Design Systems, Inc.

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Wednesday, February 20, 2002 2:49 PM
To: Perry Qu; [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Yes,

 SPICE models are already available... But some simulators only accept IBIS
models (i.e. They can not handle SPICE).

_gus

- -----Original Message-----
From: "Perry Qu" <[email-masked]>
Sent: Wednesday, February 20, 2002 8:20 AM
To: [email-masked]
Subject: Re: [Q] Is there any EDA simulator accepting Connector IBIS?

Hi,

I think it will be more useful that the EDA tool can accept SPICE format of
connector models, as most of the model for connectors are in SPICE. I
thought
this
should be a fairly easy task for EDA tool vendors.

Regards

Perry

[email-masked] wrote:

> Charlie,
>
> The IBIS Connector Model (icm) specification is still under revision.  The
> document that you downloaded is a work in progress.  The specification
will
not
> be fully supported by simulators or model makers until the specification
reaches
> at least level 1.0.
>
> The good news is that the level 1.0 is getting close.
>
> Depending on the simulator, there are some ways to get connector models
into
the
> circuit.  Unfortunately, this can be simulator dependent.
>
> As such, the best bet is to see what kind of models does your simulator
support,
>  then see if the connector vendor has that type of model available.
>
> Best Regards,
> _gus
>
> -----Original Message-----
> From: "Charlie Park" <[email-masked]>
> Sent: Tuesday, February 19, 2002 6:17 PM
> To: <[email-masked]>
> Subject: [Q] Is there any EDA simulator accepting Connector IBIS?
>
> Dear all of you,
>
> I am Charlie Park in KAIST, South Korea.
>
> I am very interested in the IBIS of connector and downloaded  the latest
version
> spec.
>
> But I am afraid that I can't find any way to simulate an  example
file(molex
> one)
> because every EDA tool
> accepts just the buffer IBIS format, normal one.
>
> How can I simulate the connector IBIS model?
>
> Please give me some advice or information about simulation  tool accepting
> connector
> IBIS model.
>
> Thank you and have a nice day.
>
> Best regards.
>
> - from South Korea,  Charlie

- --
Perry Qu

Product Integrity         |      600 March Road
Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada

DID: (613) 7846720        |      FAX: (613) 5993642

------------------------------

Date: Thu, 21 Feb 2002 08:42:12 -0600
From: [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

All,

My question to this thread is: What are the issues preventing moving the
IBIS connector spec forward and submitting it for approval?

Best Regards,

Roy

------------------------------

Date: Thu, 21 Feb 2002 08:06:07 -0800
From: "Muranyi, Arpad" <[email-masked]>
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Roy,

We are working on it feverishly, but we all have real jobs...

Arpad
==============================================================

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Thursday, February 21, 2002 6:42 AM
To: Mellitz, Richard
Cc: 'Lynne Green'; [email-masked]; Dennis Nagle;
[email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

All,

My question to this thread is: What are the issues preventing moving the
IBIS connector spec forward and submitting it for approval?

Best Regards,

Roy

------------------------------

Date: Thu, 21 Feb 2002 08:48:29 -0800
From: "Peters, Stephen" <[email-masked]>
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Hi Roy:

  The connector portion of the specification is ready for its second (and
hopefully final) editorial review and text cleanup, but we have decided to
add the hooks to enable the specification to serve as a general purpose
interconnect spec -- i.e. a package spec that supports coupling.  The intent
is to do this with minimal impact to the connector portion, and are meeting
weekly to get it out as soon as we can.  

  I realize the spec has been a long time comming, and I hesitated to delay
it further.  However, I we felt the payback -- i.e. the ability to describe
coupled package models -- was well worth the few weeks delay.

  Regards,
  Stephen Peters
  Intel Corp.
  IBIS connector group

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Thursday, February 21, 2002 6:42 AM
To: Mellitz, Richard
Cc: 'Lynne Green'; [email-masked]; Dennis Nagle;
[email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

All,

My question to this thread is: What are the issues preventing moving the
IBIS connector spec forward and submitting it for approval?

Best Regards,

Roy

------------------------------

Date: Thu, 21 Feb 2002 11:31:46 -0600
From: [email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

All,

It was not my intention to "touch a nerve." I am aware that the connector
spec has been a hard issue to work on and like all true innovations it runs
the risk of opposition, lack of time and resources in tough times, and may
not be an ideal answer to the problem it is intended to solve.

The barriers that I hear (through my personal filter) mentioned thus far
are:

Frustration with the difficulties
Lack of continuity of involvement of some key people
Time and resources in tough economic times
A wish to avoid future pain by including IC package issue now
Some technical weaknesses - that I would like to understand better
Lack of interest on the part of EDA vendors - that will change when the
economy improves and the market need is there

But, my focus is on moving forward. The barriers mentioned thus far can all
be dealt with and we can move forward. I would not have asked my question
without first seeing a (slowly) growing need for the spec in the
simulations I'm required to perform.

So, without pointing fingers at any of the well intentioned, talented and
generous folks who have contributed to this effort, let's keep our focus on
moving forward and deal as best we can with the barriers.

Best Regards,

Roy

"Peters, Stephen" <[email-masked]> on 02/21/2002 10:48:29 AM

Sent by:  "Peters, Stephen" <[email-masked]>

To:   Roy Leventhal/MW/US/3Com, "Mellitz, Richard"
      <[email-masked]>
cc:   "'Lynne Green'" <[email-masked]>, [email-masked], Dennis
      Nagle<[email-masked]>, [email-masked]
Subject:  RE: [Q] Is there any EDA simulator accepting Connector IBIS?

Hi Roy:

  The connector portion of the specification is ready for its second (and
hopefully final) editorial review and text cleanup, but we have decided to
add the hooks to enable the specification to serve as a general purpose
interconnect spec -- i.e. a package spec that supports coupling.  The
intent
is to do this with minimal impact to the connector portion, and are meeting
weekly to get it out as soon as we can.

  I realize the spec has been a long time comming, and I hesitated to delay
it further.  However, I we felt the payback -- i.e. the ability to describe
coupled package models -- was well worth the few weeks delay.

  Regards,
  Stephen Peters
  Intel Corp.
  IBIS connector group

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Thursday, February 21, 2002 6:42 AM
To: Mellitz, Richard
Cc: 'Lynne Green'; [email-masked]; Dennis Nagle;
[email-masked]
Subject: RE: [Q] Is there any EDA simulator accepting Connector IBIS?

All,

My question to this thread is: What are the issues preventing moving the
IBIS connector spec forward and submitting it for approval?

Best Regards,

Roy

------------------------------

Date: Fri, 22 Feb 2002 10:59:05 -0600
From: "Gregory R Edlund" <[email-masked]>
Subject: update to "ack" program

Hello Everyone,

I recently made a long-overdue bug fix to "ack," a C program I wrote a
while back that overlays two waveforms (in ASCII x-y format) and
numerically compares the datapoints.  This program is useful in comparing
lab vs. simulation or behavioral vs. transistor-level simulations.  The bug
was causing floating point overflows in certain cases.

You can find the new code on the IBIS web site.  It's a free-ware program
that you have to compile yourself on your favorite system.

http://www.vhdl.org/pub/ibis/accuracy/

Greg Edlund
Electronic Packaging & Integration
IBM Server Technology Development
3605 Hwy. 52 N, Dept. HDC
Rochester, MN 55901
[email-masked]

------------------------------

Date: Fri, 22 Feb 2002 12:12:40 -0800
From: "Abdulrahman A. Rafiq" <[email-masked]>
Subject: Re: update to "ack" program

- --------------F0E61E5280C3290601A53DB5
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Is this for UNIX or WINDOWS ?

Gregory R Edlund wrote:

> Hello Everyone,
>
> I recently made a long-overdue bug fix to "ack," a C program I wrote a
> while back that overlays two waveforms (in ASCII x-y format) and
> numerically compares the datapoints.  This program is useful in comparing
> lab vs. simulation or behavioral vs. transistor-level simulations.  The bug
> was causing floating point overflows in certain cases.
>
> You can find the new code on the IBIS web site.  It's a free-ware program
> that you have to compile yourself on your favorite system.
>
> http://www.vhdl.org/pub/ibis/accuracy/
>
> Greg Edlund
> Electronic Packaging & Integration
> IBM Server Technology Development
> 3605 Hwy. 52 N, Dept. HDC
> Rochester, MN 55901
> [email-masked]

- --
- -------------------------------------------------------------------
      |           |             Abdulrahman A. Rafiq (aka Abbey)
     :|:         :|:            Hardware Engineer
    :|||:       :|||:           HSS Engineering Services, (ISBU)
 .:|||||||:...:|||||||:.        Direct: (408) 527-5540
 C i s c o S y s t e m s        Fax   : (408) 526-6603
      www.cisco.com             email : [email-masked]
      800-250-4800              epage : [email-masked]
- -------------------------------------------------------------------

- --------------F0E61E5280C3290601A53DB5
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit

<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
Is this for UNIX or WINDOWS&nbsp;?
<br>&nbsp;
<br>&nbsp;
<p>Gregory R Edlund wrote:
<blockquote TYPE=CITE>Hello Everyone,
<p>I recently made a long-overdue bug fix to "ack," a C program I wrote
a
<br>while back that overlays two waveforms (in ASCII x-y format) and
<br>numerically compares the datapoints.&nbsp; This program is useful in
comparing
<br>lab vs. simulation or behavioral vs. transistor-level simulations.&nbsp;
The bug
<br>was causing floating point overflows in certain cases.
<p>You can find the new code on the IBIS web site.&nbsp; It's a free-ware
program
<br>that you have to compile yourself on your favorite system.
<p><a href="http://www.vhdl.org/pub/ibis/accuracy/">http://www.vhdl.org/pub/ibis/accuracy/</a>
<p>Greg Edlund
<br>Electronic Packaging &amp; Integration
<br>IBM Server Technology Development
<br>3605 Hwy. 52 N, Dept. HDC
<br>Rochester, MN 55901
<br>[email-masked]</blockquote>

<pre>--&nbsp;
- -------------------------------------------------------------------
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Abdulrahman A. Rafiq (aka Abbey)&nbsp;&nbsp;
&nbsp;&nbsp;&nbsp;&nbsp; :|:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; :|:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Hardware Engineer
&nbsp;&nbsp;&nbsp; :|||:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; :|||:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; HSS Engineering Services, (ISBU)
&nbsp;.:|||||||:...:|||||||:.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Direct: (408) 527-5540
&nbsp;C i s c o S y s t e m s&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Fax&nbsp;&nbsp; : (408) 526-6603
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; www.cisco.com&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; email : [email-masked]
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 800-250-4800&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; epage : [email-masked]
- -------------------------------------------------------------------</pre>
&nbsp;</html>

- --------------F0E61E5280C3290601A53DB5--

------------------------------

Date: Sun, 24 Feb 2002 05:33:03 EST
From: [email-masked]
Subject: Re: update to "ack" program

- --part1_15a.9703880.29aa1b5f_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit

In a message dated 2/22/02 12:49:45 PM Pacific Standard Time, 
[email-masked] writes:

> Subj:Re: update to "ack" program
> Date:2/22/02 12:49:45 PM Pacific Standard Time
> From:    [email-masked] (Abdulrahman A. Rafiq)
> Sender:    [email-masked]
> To:    [email-masked] (Gregory R Edlund)
> CC:    [email-masked], [email-masked], 
> [email-masked]
> 
> 
> 
> 
> Is this for UNIX or WINDOWS ? 
>   
>   

  By the way, do you happen to know the full bill rate economic multiplier 
for this list ?
  I think you just cost us both about two years of raises.

- --part1_15a.9703880.29aa1b5f_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit

<HTML><FONT FACE=arial,helvetica><FONT  SIZE=2>In a message dated 2/22/02 12:49:45 PM Pacific Standard Time, [email-masked] writes:
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Subj:<B>Re: update to "ack" program</B>
<BR>Date:2/22/02 12:49:45 PM Pacific Standard Time
<BR><I>From: &nbsp;&nbsp;&nbsp;[email-masked] (Abdulrahman A. Rafiq)
<BR>Sender: &nbsp;&nbsp;&nbsp;[email-masked]
<BR>To: &nbsp;&nbsp;&nbsp;[email-masked] (Gregory R Edlund)
<BR>CC: &nbsp;&nbsp;&nbsp;[email-masked], [email-masked], [email-masked]
<BR></I>
<BR>
<BR>
<BR>
<BR>Is this for UNIX or WINDOWS ? 
<BR> &nbsp;
<BR> &nbsp;</BLOCKQUOTE>
<BR>
<BR> &nbsp;By the way, do you happen to know the full bill rate economic multiplier for this list ?
<BR> &nbsp;I think you just cost us both about two years of raises.
<BR></FONT></HTML>

- --part1_15a.9703880.29aa1b5f_boundary--

------------------------------

Date: Sun, 24 Feb 2002 05:31:22 EST
From: [email-masked]
Subject: Re: update to "ack" program

- --part1_119.d1c5183.29aa1afa_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit

In a message dated 2/22/02 12:49:45 PM Pacific Standard Time, 
[email-masked] writes:

> Subj:Re: update to "ack" program
> Date:2/22/02 12:49:45 PM Pacific Standard Time
> From:    [email-masked] (Abdulrahman A. Rafiq)
> Sender:    [email-masked]
> To:    [email-masked] (Gregory R Edlund)
> CC:    [email-masked], [email-masked], 
> [email-masked]
> 
> 
> Is this for UNIX or WINDOWS ? 
>   

  The answer to this resides for you in a question of simple economics Tariq,

    Consider as this, One, You obviously feel your time is very important. 
You have a great degee, a great responsibility, a great job at Cisco, But, 
obviously, a problem, You dont seam to have very much time.
     Why in the world withing that given you could not think to chose to 
rather ask your coworker list within cisco, of people who are working with 
this on the list, or even perhaps, go to a lab and try it, as any other 
engineer just about with the concept of peer respect has, that if Im going to 
make another engineer do a amount of work, I am willing to as well do it 
myself first.
    So, I think You can see, it really does not matter.

   Your not going to run or use it anyways, and that is obvious for me, you 
just want someone to tell you.

- --part1_119.d1c5183.29aa1afa_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit

<HTML><FONT FACE=arial,helvetica><FONT  SIZE=2>In a message dated 2/22/02 12:49:45 PM Pacific Standard Time, [email-masked] writes:
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Subj:<B>Re: update to "ack" program</B>
<BR>Date:2/22/02 12:49:45 PM Pacific Standard Time
<BR><I>From: &nbsp;&nbsp;&nbsp;[email-masked] (Abdulrahman A. Rafiq)
<BR>Sender: &nbsp;&nbsp;&nbsp;[email-masked]
<BR>To: &nbsp;&nbsp;&nbsp;[email-masked] (Gregory R Edlund)
<BR>CC: &nbsp;&nbsp;&nbsp;[email-masked], [email-masked], [email-masked]
<BR></I>
<BR>
<BR>Is this for UNIX or WINDOWS ? 
<BR> &nbsp;</BLOCKQUOTE>
<BR>
<BR> &nbsp;The answer to this resides for you in a question of simple economics Tariq,
<BR>
<BR> &nbsp;&nbsp;&nbsp;Consider as this, One, You obviously feel your time is very important. You have a great degee, a great responsibility, a great job at Cisco, But, obviously, a problem, You dont seam to have very much time.
<BR> &nbsp;&nbsp;&nbsp;&nbsp;Why in the world withing that given you could not think to chose to rather ask your coworker list within cisco, of people who are working with this on the list, or even perhaps, go to a lab and try it, as any other engineer just about with the concept of peer respect has, that if Im going to make another engineer do a amount of work, I am willing to as well do it myself first.
<BR> &nbsp;&nbsp;&nbsp;So, I think You can see, it really does not matter.
<BR>
<BR> &nbsp;&nbsp;Your not going to run or use it anyways, and that is obvious for me, you just want someone to tell you.
<BR>
<BR> &nbsp;&nbsp;&nbsp;</FONT></HTML>

- --part1_119.d1c5183.29aa1afa_boundary--

------------------------------

Date: Fri, 22 Feb 2002 16:09:49 -0500
From: "iwatsuki, david" <[email-masked]>
Subject: Output_ECL: ibis vs dml, hyperlynx vs spectraquest

I am working with an ibis model of an ICS pecl part and  
am getting different results in Hyperlynx Linesim vs.
Spectraquest SI (in both cases, I have a 3.3 v differential
driver into a 56 ohm tline terminated with a 56 ohm pullup  to 1.25v). 
In the Hyperlynx sim, the output never swings below 1.2 v, 
while SQ-SI swings low to 0.8 v.

The Hyperlynx sims correlate to lab and hspice results, which makes
me believe there is a model/simulator issue with ECL and SQ-SI since it
uses .dml format files that are translated by the program ibis2signoise.

The 2.1 IBIS spec says that for Model_type Output_ECL, the data in the
pullup and pulldown tables are BOTH referenced to VCC.   

My questions are then:  
- - should the [Pulldown reference] be explicitly stated for
  Output_ECL types within the ibis model? The ICS model does not have this.
  The 2.1 IBIS spec says that if there is no [Pulldown reference], then it
  defaults to 0.0 v which seems to contradict the earlier ECL spec
statement.
  
- - should the Output_ECL type override the reference voltage in the
simulator?
  I am assuming this is sometimes the case since Hyperlynx reads in ibis
directly and 
  produces a "good" simulation, while ibisi2signoise translates to dml with 
  an ECL-type keyword, and sets the pulldown reference voltage to 0.0v, and
then 
  produces a "bad" simulation under SQ-SI. (setting the pulldown reference
to
  0 or 3.3 doesn't seem to affect Hyperlynx, so another reason I think
there's
  an override in that simulator)

I don't see ibischk or dmlcheck programs flagging any errors around this
model
syntax. I also looked at similar PECL parts from ON and Motorola to compare
their
models. ON explicitly sets the [Pulldown Reference] to VCC=3.3V for the PECL
outputs;
Motorola avoids the issue by using a Model Type of Output, not Output_ECL.

The fix of adding the pulldown reference to the model seems to resolve my
low voltage
swing, but rise and fall times in SQ-SI still don't match either Hyperlynx,
Lab, or HSPICE.
  
(I have asked the same question on the Cadence SQ forum)

- - david i

------------------------------

Date: Mon, 25 Feb 2002 08:14:40 -0600
From: "Gregory R Edlund" <[email-masked]>
Subject: Re: [SI-LIST] update to "ack" program

Dear SI and IBIS compatriots:

Ray Anderson ran into a bus error when he ran ack on the Solaris platform.
Apparently there is still a bug lurking in my code that didn't show up when
I tested it on the aix and Windows platforms.  Believe it or not, I used
the program on a couple dozen waveforms for a project I worked on over a
year ago, and I never ran into a snag.  I'm going to check around and see
if I can come up with a Sun box that I can use for further testing.  In the
meantime, if anyone wants to take a crack at debugging, be my guest!  It's
probably another one of those memory conflicts that are so easy to fall
into when you're allocating memory in C.

Sorry for the trouble.  You may still be able to run on Windows or aix
without trouble.

Greg Edlund
Electronic Packaging & Integration
IBM Server Technology Development
3605 Hwy. 52 N, Dept. HDC
Rochester, MN 55901
[email-masked]

- ----- Forwarded by Gregory R Edlund/Rochester/IBM on 02/25/02 08:06 AM
- -----
                                                                                                                                
                      Ray Anderson                                                                                              
                      <Raymond.Anderson        To:       Gregory R Edlund/Rochester/IBM@IBMUS                                   
                      @sun.com>                cc:       [email-masked]                                               
                                               Subject:  Re: [SI-LIST] update to "ack" program                                  
                      02/22/02 03:35 PM                                                                                         
                      Please respond to                                                                                         
                      Ray Anderson                                                                                              

Greg-

I've compiled your ack.c code with both Gnu gcc and
also with Sun cc with no apparent errors.

When I try to run the program on your sample data using the
command line specified in your readme.txt file I get a "Bus Error"
crash (with both the gcc and cc compiled versions). Have you seen
this before? (I'm running on a Sun Ultra-1 with Solaris 8)

- -Ray Anderson
Sun Microsystems

- -------------------------------------------------------------------------------------

radium% ack -f1 hspice.dat -f2 lab.dat -e r -dx 0.05 -xu 1e-9 -yt 1.4 -yw
3.3 > out.dat
Accuracy Figure-of-Merit Calculator

Found 501 datapoints in hspice.dat.
Found 301 datapoints in lab.dat.
Waveform 1 crosses y =  1.4000e+00 at x =  1.6615e+00.
Waveform 2 crosses y =  1.4000e+00 at x =  1.1407e+00.
Shifting waveform 2 right by  5.2086e-01.
Bounding interval = (  5.2086e-01,  6.5209e+00 )
Bus Error

- -------------------------------------------------------------------------------------

>
>Hello Everyone,
>
>I recently made a long-overdue bug fix to "ack," a C program I wrote a
>while back that overlays two waveforms (in ASCII x-y format) and
>numerically compares the datapoints.  This program is useful in comparing
>lab vs. simulation or behavioral vs. transistor-level simulations.  The
bug
>was causing floating point overflows in certain cases.
>
>You can find the new code on the IBIS web site.  It's a free-ware program
>that you have to compile yourself on your favorite system.
>
>http://www.vhdl.org/pub/ibis/accuracy/

------------------------------

Date: Mon, 25 Feb 2002 09:56:34 -0500 (EST)
From: "Barry Katz" <[email-masked]>
Subject: IBIS Qualification Committee call for participation

All,

At the 2/22 IBIS Open Forum teleconference I took the initiative to lead
the IBIS  Qualification Committee.  Establishing a standard process and
metrics for assessing  and improving the overall quality of IBIS models is
something that I am  passionate about. The mission, scope, and deliverables
of this committee are  as follows:

Mission
- -------
Provide a method and a standard to dramatically improve the quality of IBIS
models.

Scope
- ------
Define all elements of an IBIS model to be considered for quality
assessment and produce a standard mechanism of reporting the quality of
each of these elements. End-users must be able to assess the quality of
IBIS models for their specific application.

Deliverables
- ------------
1. Assessment medium (ie. Standardized spreadsheet)
2. Detailed Standard
3. Commitments from Semiconductor vendors to adopt the standard

For those interested in participation, please email me with your contact
information (including the folks that volunteered at the teleconference).

Thanks,
Barry

- --

Barry Katz
Chief Executive Officer
Signal Integrity Software
6 Clock Tower Place, #250
Maynard, MA 01754
O: 978 461-0449 x19
M: 978 618-9078

------------------------------

Date: Mon, 25 Feb 2002 10:31:08 -0500
From: Peter LaFlamme <[email-masked]>
Subject: Re: IBIS Qualification Committee call for participation

Hi Barry,
It is great that you want to lead this. I am not sure if you have actually looked into any of the IBIS Accuracy work that was headed (and still is) by Greg Edlund. I was on the original committee that defined this and did a paper at Designcon with Bob
Haller in 1999. I think that you may find the accuracy spec as a good starting point, because it seems very similar to what you are proposing, though it may not be all encompasing.

I would be willing to put my 2cents in, or help out to that extent. 

Take care,
Peter 

- -- 
Peter LaFlamme

Applied Micro Circuits Corp.
Staff System Applications Engineer
200 Minuteman Rd, 3rd Floor
Andover, MA 01810

978-247-8470 phone
978-623-0055 Fax

Barry Katz wrote:
> 
> All,
> 
> At the 2/22 IBIS Open Forum teleconference I took the initiative to lead
> the IBIS  Qualification Committee.  Establishing a standard process and
> metrics for assessing  and improving the overall quality of IBIS models is
> something that I am  passionate about. The mission, scope, and deliverables
> of this committee are  as follows:
> 
> Mission
> -------
> Provide a method and a standard to dramatically improve the quality of IBIS
> models.
> 
> Scope
> ------
> Define all elements of an IBIS model to be considered for quality
> assessment and produce a standard mechanism of reporting the quality of
> each of these elements. End-users must be able to assess the quality of
> IBIS models for their specific application.
> 
> Deliverables
> ------------
> 1. Assessment medium (ie. Standardized spreadsheet)
> 2. Detailed Standard
> 3. Commitments from Semiconductor vendors to adopt the standard
> 
> For those interested in participation, please email me with your contact
> information (including the folks that volunteered at the teleconference).
> 
> Thanks,
> Barry
> 
> --
> 
> Barry Katz
> Chief Executive Officer
> Signal Integrity Software
> 6 Clock Tower Place, #250
> Maynard, MA 01754
> O: 978 461-0449 x19
> M: 978 618-9078

------------------------------

Date: 
From: 
Subject: [none]

------------------------------

Date: 
From: 
Subject: [none]

------------------------------

Date: 
From: 
Subject: [none]

------------------------------

Date: 
From: 
Subject: [none]

------------------------------

Date: Thu, 28 Feb 2002 11:45:51 +0100
From: Lenski Eckhard <[email-masked]>
Subject: AW: IBIS Qualification Committee call for participation

Hello Barry,

As we at Siemens also have the problems with incorrect IBIS-Models, I will join your 
Model Quality group

Regards

Eckhard Lenski
Siemens AG
ICN WN OP TDC TC3
81359 München
Tel:      0049 89 722 27776
Fax:     0049 89 722 44692
Email:  [email-masked]

- -----Ursprüngliche Nachricht-----
Von: Barry Katz [mailto:[email-masked]]
Gesendet: Montag, 25. Februar 2002 15:57
An: [email-masked]; [email-masked]
Cc: [email-masked]; [email-masked]
Betreff: IBIS Qualification Committee call for participation

All,

At the 2/22 IBIS Open Forum teleconference I took the initiative to lead
the IBIS  Qualification Committee.  Establishing a standard process and
metrics for assessing  and improving the overall quality of IBIS models is
something that I am  passionate about. The mission, scope, and deliverables
of this committee are  as follows:

Mission
- -------
Provide a method and a standard to dramatically improve the quality of IBIS
models.

Scope
- ------
Define all elements of an IBIS model to be considered for quality
assessment and produce a standard mechanism of reporting the quality of
each of these elements. End-users must be able to assess the quality of
IBIS models for their specific application.

Deliverables
- ------------
1. Assessment medium (ie. Standardized spreadsheet)
2. Detailed Standard
3. Commitments from Semiconductor vendors to adopt the standard

For those interested in participation, please email me with your contact
information (including the folks that volunteered at the teleconference).

Thanks,
Barry

- --

Barry Katz
Chief Executive Officer
Signal Integrity Software
6 Clock Tower Place, #250
Maynard, MA 01754
O: 978 461-0449 x19
M: 978 618-9078

------------------------------

Date: Thu, 28 Feb 2002 14:41:45 -0500
From: John Angulo <[email-masked]>
Subject: HSPICE error messages for IBIS?

The following is posted on behalf of Mark Bossard:

Hi,

Does anyone out there know how to decode the ibis buffer error messages that
hspice spits out?  The manual is less than helpful, and I have found that
different versions of hspice can give me different error messages at times.

This is one in particular that I get.

 ** error** iob_eles4:9028:
    can not find max value for falling ramp
    i,v_ot,v_oto,vrl,vrlo      1078  2.9764E+00  2.9736E+00  4.0495E+00
 4.0541E+00

Any help or suggestions would be appreciated.

- -Mark Bossard

- --

========================================================================
| Mark Bossard                     | Atmel Corporation                 |
| Direct Phone: (410) 423-4352     | Chesapeake Design Center          |
| Main Phone:   (410) 423-4300     | 8820 Columbia 100 Parkway         |
| Fax:          (410) 423-4302     | Suite 300                         |
| Email:        [email-masked] | Columbia, MD 21045                |

------------------------------

Date: Thu, 28 Feb 2002 14:20:54 -0800
From: "Laxmi Vishwanathan" <[email-masked]>
Subject: Test load parameters

This is a multi-part message in MIME format.
- --------------F726E239D43D200E8CEDF874
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Hi ,
 Can someone help me to understand -
What are Test load parameters -C_ref,R_ref,V_ref ?
What is a Test point  ? For an IBIS Driver .
thanks a lot ,
Laxmi.

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n:Vishwanathan;Laxmi
tel;work:503 268 8152
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url:www.latticesemi.com
org:Lattice Semiconductor;Applications
adr:;;5555 NE Moore CT;Hillsboro;OR;97124;
version:2.1
email;internet:[email-masked]
title:Application Engineer
fn:Laxmi Vishwanathan
end:vcard

- --------------F726E239D43D200E8CEDF874--

------------------------------

Date: Thu, 28 Feb 2002 16:39:58 -0800
From: "Ross, Bob" <[email-masked]>
Subject: EUROPEAN IBIS SUMMIT MEETING AGENDA 3/8/02

To All:

You are invited to attend the European IBIS Summit Meeting in
Paris, France, especially if you are already going to DATE 2002:

  http://www.mentor.com/france/date/ibis.htm

The meeting is free to people interested in IBIS modeling, digital
circuit design and related EDA tool development.  Refreshments and
a buffet lunch are included.

If you plan to attend, please notify Karine Loudet at the
address at the end.

A slighly updated agenda is below.

Bob Ross
Mentor Graphics
Vice-Chair, EIA IBIS Open Forum

- ------------------------------------------------------------------

                AGENDA EUROPEAN IBIS SUMMIT MEETING
                       Friday, March 8, 2002

                       Room: Salon Van Gogh
                     Concorde-Lafayette Hotel                  
                          Paris, France
   
- ------------------------------------------------------------------

8:30     REFRESHMENTS & SIGN IN

9:00     WELCOME AND INTRODUCTIONS
          - Stephen Peters, Intel

9:15     IBIS ACTIVITY REPORT
         - Stephen Peters, Intel

9:45     MULTI-LINGUAL MODELING WITHIN IBIS UPDATE
         - Tom Dagostino and Bob Ross, Mentor Graphics

10:15    BREAK

10:30    UPDATE ON ZUKEN'S IBISINF UTILITY
         - Alexander Loehr and Michael Schaeder, Zuken

11:00    IBIS MODELING AT STMICROELECTRONICS AND ISSUES
         - Fabrice Boissieres, STMicroelectronics

11:30    PRINCIPLE OF CROSSBAR-CURRENT CALCULATON FROM IBIS MODELS
         - Katja Koller, Siemens AG

12:00    BUFFET LUNCH

13:00    XML IN IBIS BASED MODELLING
         - Alexander Loehr and Michael Schaeder, Zuken

13:30    BUFFER IMPEDANCE MDOELING
         - Luca Giacotto, Alstom Transport

14:00    ICEM STATUS
         - Jean-Claude Perrin, Texas Instruments

14:30    OPEN DISCUSSIONS

14:45    BREAK AND END OF MEETING
         CONTINUATION OF OPEN DISCUSSIONS

- ------------------------------------------------------------------

Sponsors:      EADS, Mentor Graphics and Innoveda

DATE2000:      March 4 - 8, 2002.  The IBIS meeting is scheduled the day
               following the trade show portion of the Conference.

               See http://www.date-conference.com for more information.

SIGNUP

People involved in IBIS Model development, EDA tool development, and digital
circuit design are invited to participate in the European IBIS Summit meeting.
If you plan to attend, please supply the information below:

  Name:
  E-mail address:
  Company:
  Telephone:

Send to:

  Karine Loudet ([email-masked])

------------------------------

Date: Fri, 1 Mar 2002 11:58:26 -0800
From: "Bill Hargin" <[email-masked]>
Subject: RE: Test load parameters

Hi Laxmi:

>  Can someone help me to understand -
> What are Test load parameters -C_ref,R_ref,V_ref ?

Cref, Rref, Vref, and Vmeas are optional subparameters to the [Model]
keyword.  Include them, typically, to facilitate board-level timing
simulation.  Cref and Rref subparameters correspond to the test load that
the semiconductor vendor uses when specifying the propagation delay and/or
output switching time of the model.  The IBIS 3.2 spec shows the assumed
connections as:

|                            _________
|                           |         |
|                           |      |\ |            Rref
|                           |Driver| \|------o----/\/\/\----o Vref
|                           |      | /|      |
|                           |      |/ |     === Cref
|                           |_________|      |
|                                            |
|                                           GND

> What is a Test point  ? For an IBIS Driver .

Test points would be out on the board (outside the driver model).

Best Regards,
Bill Hargin
Direct: 425-702-0744
Fax:    425-702-0305

Cognition Consulting
Electronic Design Software and Consulting
http://www.CognitionConsulting.com

> -----Original Message-----
> From: [email-masked] [mailto:[email-masked]]On
> Behalf Of Laxmi Vishwanathan
> Sent: Thursday, February 28, 2002 2:21 PM
> To: [email-masked]
> Subject: Test load parameters
>
>
> Hi ,
>  Can someone help me to understand -
> What are Test load parameters -C_ref,R_ref,V_ref ?
> What is a Test point  ? For an IBIS Driver .
> thanks a lot ,
> Laxmi.
>
>
>

------------------------------

Date: Tue, 05 Mar 2002 17:05:14 -0800
From: Dave Macemon <[email-masked]>
Subject: [IBIS-Users] SiQual's DesignCon 2002 Papers Posted

All,

The papers that SiQual presented at DesignCon 2002:

- - Attention to Details: The transition from 2.5 to 10Gbps

- - Comparison SPICE to IBIS, 2.5Gbps

- - Critique of IBIS Models Available on the Web

Have been posted on SiQual's Web site.

www.siqual.com

regards

davem

===
Dave Macemon
SiQual, A division of Stilwell Baker
[email-masked]
phone (503)885-1231
fax     (503)885-0550
http://www.siqual.com/

- -----------------------------------------------------------------
For help or to subscribe/unsubscribe, email [email-masked]
with just the appropriate command message(s) in the body:

------------------------------

Date: Wed, 06 Mar 2002 04:57:46
From: "MICHAEL HARUNA" <[email-masked]>
Subject: [IBIS-Users] CONFIDENTIAL

Dear Sir,

    ASSISTANCE REQUIRED FOR ACQUISITION OF ESTATES

 I write this to inform you of my desire to acquire estates or landed properties in your country on behalf of the Director of Contracts and Finance Allocation of the Federal Ministry of Works and  Housing in Nigeria.

 Considering his very strategic and influential position, he would want the transaction to be strictly confidential. He further wants his identity to remain undisclosed at least for now, until the completion of the transaction. Hence, our desire to have an overseas agent. I have therefore been directed to inquire if you would agree to act as our overseas agent in order to actualize this transaction.

 The deal, in brief, is that the funds with which we intend to effect our proposed investments in your country is presently in a coded account at the Nigeria Apex Bank (i.e. the Central Bank of Nigeria) and we need your assistance to transfer the funds to your country in a convenient bank account that will be provided by you before we can put the funds into use in your country.

 For this, you shall be considered to have executed a contract for the Federal Ministry of Works and Housing in Nigeria for which payment should be effected to you by the Ministry. The contract sum of which shall add up to US$26.4 Million, of which your share shall be 30% on your assent to the proposal.

 Sequel to the successful execution of this transaction,we hope to use our share of the proceeds 
to invest [with your assistance]in real estates in your country and elsewhere.Be assured that this transaction is totally risk-free and all procedures must be legitimate in order to facilitate its realization.

 If you are interested and capable of handling a transaction of this nature that entails absolute discretion and trustworthiness,please contact me promptly for further briefing  on its  actuation.You will have to furnish me with the following information for easy communication:

 1. Your company name and address
 2. Your personal fax number
 3. Your personal telephone number.

 Your swift response will be appreciated. Thank you in anticipation of your cooperation.

 Yours faithfully,

MICHAEL HARUNA 
- -----------------------------------------------------------------
For help or to subscribe/unsubscribe, email [email-masked]
with just the appropriate command message(s) in the body:

------------------------------

Date: Thu, 7 Mar 2002 16:26:41 +0800
From: "±i¦sÄò" <[email-masked]>
Subject: [IBIS-Users] More convenient IBIS editor?

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------------------------------

Date: Thu, 7 Mar 2002 08:02:22 -0500
From: "Ingraham, Andrew" <[email-masked]>
Subject: RE: [IBIS-Users] More convenient IBIS editor?

>    Is there any IBIS editor allowing us to easily modify the V-T
>or I-V curves without manually changing the text of IBIS file?
 
Instead of word-by-word editing using a text editor, try importing it into a spreadsheet program, and altering whole blocks of data at a time.  Then save as a text file.

It isn't foolproof, and you may have to contend with saving just the table(s) and then pasting them back into the original IBIS file, but it's better than doing it all in a text editor by hand.

Regards,
Andy

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Date: Thu, 7 Mar 2002 14:41:54 +0100
From: Ralf Bruening <[email-masked]>
Subject: Re[2]: [IBIS-Users] More convenient IBIS editor?

Hello Sam, hi all,
following to Andy let me just mention that the free downloadable ibinf
utility which can be downloaded either from the IBIS homepage of from
http://www.zuken.com/ibis has the possiblity to check an IBIS file and
to dump the curve for an import into EXCEL (or any other spreadsheet),
there is an AVI showing this usage.

Just FYI - feel free to contact me on any further questions ibisinf

regards

       Ralf

- ---------------------------------------------------------------
Ralf Bruening - Product Manager ZUKEN Board Integrity Solutions
ZUKEN EMC Technology Center - Vattmannstr. 3 - 33100  Paderborn
Phone: +49 5251 150 600 (Ext.: -621)  -  FAX:  +49 5251 150 700
Mobile: +49 170 4228512  - Alternative Mobile:  +49 172 9070675
email: [email-masked]     -   URL: http://www.zuken.com
- ---------------------------------------------------------------

Thursday, March 07, 2002, 2:02:22 PM, you wrote:

>>    Is there any IBIS editor allowing us to easily modify the V-T
>>or I-V curves without manually changing the text of IBIS file?
 
IA> Instead of word-by-word editing using a text editor, try importing it into a spreadsheet program, and altering whole blocks of data at a time.  Then save as a text file.

IA> It isn't foolproof, and you may have to contend with saving just the table(s) and then pasting them back into the original IBIS file, but it's better than doing it all in a text editor by hand.

IA> Regards,
IA> Andy

IA> -----------------------------------------------------------------
IA> For help or to subscribe/unsubscribe, email [email-masked]
IA> with just the appropriate command message(s) in the body:

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Date: Thu, 07 Mar 2002 09:35:54 -0800
From: "Ross, Bob" <[email-masked]>
Subject: Re: [IBIS-Users] More convenient IBIS editor?

To All:

In addition to Ralf's comments, the Zuken presentation on ibisinf
for the European IBIS Summit Meeting in Paris on March 8, 2002 is
available as loehr1.zip under

  http://www.eda.org/pub/ibis/mar02/

along with the other scheduled presentations.  The ibisinf.ppt
presentation links to the ibisinf.avi that is contained in the
loehr1.zip file.

Bob Ross
Mentor Graphics

Ralf Bruening wrote:
> 
> Hello Sam, hi all,
> following to Andy let me just mention that the free downloadable ibinf
> utility which can be downloaded either from the IBIS homepage of from
> http://www.zuken.com/ibis has the possiblity to check an IBIS file and
> to dump the curve for an import into EXCEL (or any other spreadsheet),
> there is an AVI showing this usage.
> 
> Just FYI - feel free to contact me on any further questions ibisinf
> 
> regards
> 
>        Ralf
> 
> ---------------------------------------------------------------
> Ralf Bruening - Product Manager ZUKEN Board Integrity Solutions
> ZUKEN EMC Technology Center - Vattmannstr. 3 - 33100  Paderborn
> Phone: +49 5251 150 600 (Ext.: -621)  -  FAX:  +49 5251 150 700
> Mobile: +49 170 4228512  - Alternative Mobile:  +49 172 9070675
> email: [email-masked]     -   URL: http://www.zuken.com
> ---------------------------------------------------------------
> 
> Thursday, March 07, 2002, 2:02:22 PM, you wrote:
> 
> >>    Is there any IBIS editor allowing us to easily modify the V-T
> >>or I-V curves without manually changing the text of IBIS file?
> 
> IA> Instead of word-by-word editing using a text editor, try importing it into a spreadsheet program, and altering whole blocks of data at a time.  Then save as a text file.
> 
> IA> It isn't foolproof, and you may have to contend with saving just the table(s) and then pasting them back into the original IBIS file, but it's better than doing it all in a text editor by hand.
> 
> IA> Regards,
> IA> Andy
> 
> IA> -----------------------------------------------------------------
> IA> For help or to subscribe/unsubscribe, email [email-masked]
> IA> with just the appropriate command message(s) in the body:
> 
> --
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>
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Date: Thu, 7 Mar 2002 13:11:11 -0500
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] More convenient IBIS editor?

Try http://www.eda.org/pub/ibis/summits/mar02/
That takes you straight to the March summit papers.

Lynne Green
Cadence

Ralf Bruening wrote:
> 
> Hello Sam, hi all,
> following to Andy let me just mention that the free downloadable ibinf
> utility which can be downloaded either from the IBIS homepage of from
> http://www.zuken.com/ibis has the possiblity to check an IBIS file and
> to dump the curve for an import into EXCEL (or any other spreadsheet),
> there is an AVI showing this usage.
> 
> Just FYI - feel free to contact me on any further questions ibisinf
> 
> regards
> 
>        Ralf
> 
> ---------------------------------------------------------------
> Ralf Bruening - Product Manager ZUKEN Board Integrity Solutions
> ZUKEN EMC Technology Center - Vattmannstr. 3 - 33100  Paderborn
> Phone: +49 5251 150 600 (Ext.: -621)  -  FAX:  +49 5251 150 700
> Mobile: +49 170 4228512  - Alternative Mobile:  +49 172 9070675
> email: [email-masked]     -   URL: http://www.zuken.com
> ---------------------------------------------------------------
> 
> Thursday, March 07, 2002, 2:02:22 PM, you wrote:
> 
> >>    Is there any IBIS editor allowing us to easily modify the V-T
> >>or I-V curves without manually changing the text of IBIS file?
> 
> IA> Instead of word-by-word editing using a text editor, try importing it into a spreadsheet program, and altering whole blocks of data at a time.  Then save as a text file.
> 
> IA> It isn't foolproof, and you may have to contend with saving just the table(s) and then pasting them back into the original IBIS file, but it's better than doing it all in a text editor by hand.
> 
> IA> Regards,
> IA> Andy
> 
> IA> -----------------------------------------------------------------
> IA> For help or to subscribe/unsubscribe, email [email-masked]
> IA> with just the appropriate command message(s) in the body:
> 
> --
> mailto:[email-masked]
>
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------------------------------

Date: Thu, 07 Mar 2002 10:37:47 -0800
From: "Ross, Bob" <[email-masked]>
Subject: Re: [IBIS-Users] More convenient IBIS editor?

Link Correction:

  http://www.eda.org/pub/ibis/summits/mar02/

Bob

"Ross, Bob" wrote:
> 
> To All:
> 
> In addition to Ralf's comments, the Zuken presentation on ibisinf
> for the European IBIS Summit Meeting in Paris on March 8, 2002 is
> available as loehr1.zip under
> 
>   http://www.eda.org/pub/ibis/mar02/
> 
> along with the other scheduled presentations.  The ibisinf.ppt
> presentation links to the ibisinf.avi that is contained in the
> loehr1.zip file.
> 
> Bob Ross
> Mentor Graphics
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Date: Mon, 11 Mar 2002 01:36:28 -0700
From: Al Davis <[email-masked]>
Subject: Re: [IBIS-Users] More convenient IBIS editor?

I am not aware of any, but I have a partially working IBIS to Spice 
converter, which I eventually intend to release as part of Gnucap, 
under GPL, as soon as it is mature enough to be actually useful.

The relevance here is that it contains a parser and some other useful 
utilities.  I have looked at what is expected for a reasonable IBIS 
development system.  As a minimum, I would want to be able to view 
and manipulate the waveforms and their derivatives graphically.  Such 
a program should be easy to do, about the level of a good senior 
project for a team of maybe 3 computer science students.  I see it as 
being done as a wrapper for some free tools that already exist.  
(gnuplot, octave, gnucap, a drawing program, ...)  If someone 
(perhaps a student or group of students) volunteers to take this on, 
and agrees to release the software under GPL, I will release what I 
have to that person and work with him/her to make such an "editor".

The licensing on the existing "golden parser" has been a barrier to 
this.  It is available cheap to those developing closed-source 
commercial software, but not available at all for free and 
open-source development.
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------------------------------

Date: Wed, 13 Mar 2002 19:46:54 -0800 (PST)
From: whiz kid <[email-masked]>
Subject: [IBIS-Users] IBIS Info.

Hi Guys,
I need some clarifications on the IBIS terminology.
Pullup/Pulldown curves: Does the Pullup VI curve give
the voltage and current charecteristics when the
buffer is in logic high state or does it give the VI
char. when transitioning to the logic high from a
logic low and vice versa with Pulldown.
I have a basic idea of the power and gnd clamps and
what they mean. I would be very thankful if some one
can explain more clearly as to what those VI curves
signify.

Thanks,
Rahul.

__________________________________________________
Do You Yahoo!?
Yahoo! Sports - live college hoops coverage
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------------------------------

Date: Thu, 14 Mar 2002 09:31:29 -0500
From: "Ingraham, Andrew" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS Info.

> Pullup/Pulldown curves: Does the Pullup VI curve give
> the voltage and current charecteristics when the
> buffer is in logic high state or does it give the VI
> char. when transitioning to the logic high from a
> logic low and vice versa with Pulldown.

The Pulldown curve gives the I/V characteristics when the output is in the low state, but with Clamps subtracted.  Pulldown + Clamps = the total output I/V characteristics while in the low state.

Likewise for Pullup.

When switching from one state to the other, the simulator has to figure out how to transition from one I/V curve to the other; i.e., from 100% Pulldown and 0% Pullup, to 0% Pulldown and 100% Pullup.  Without V/T data, the exact nature of that transition is a somewhat arbitrary guess, although the speed of transition depends on the Ramp rate.  With V/T data, the simulator can adjust the exact transition in accordance with the V/T data.

Regards,
Andy

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------------------------------

Date: Thu, 14 Mar 2002 10:16:10 -0600
From: Rickey Kingen <[email-masked]>
Subject: Re: [IBIS-Users] IBIS Info.

Andy,

When you say the pulldown curve gives the I/V characteristics when the
output is in the low state, but with Clamps subtracted; do you mean that
the physical clamping circuit should be removed from the spice netlist
when performing the S2IBIS2 generation?

Rick

"Ingraham, Andrew" wrote:
> 
> > Pullup/Pulldown curves: Does the Pullup VI curve give
> > the voltage and current charecteristics when the
> > buffer is in logic high state or does it give the VI
> > char. when transitioning to the logic high from a
> > logic low and vice versa with Pulldown.
> 
> The Pulldown curve gives the I/V characteristics when the output is in the low state, but with Clamps subtracted.  Pulldown + Clamps = the total output I/V characteristics while in the low state.
> 
> Likewise for Pullup.
> 
> When switching from one state to the other, the simulator has to figure out how to transition from one I/V curve to the other; i.e., from 100% Pulldown and 0% Pullup, to 0% Pulldown and 100% Pullup.  Without V/T data, the exact nature of that transition is a somewhat arbitrary guess, although the speed of transition depends on the Ramp rate.  With V/T data, the simulator can adjust the exact transition in accordance with the V/T data.
> 
> Regards,
> Andy
> 
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------------------------------

Date: Thu, 14 Mar 2002 08:39:12 -0800
From: "Peters, Stephen" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS Info.

Hi Rick:

  That is one way of doing it.  An easier method (easier in that you don't
have to edit the actual netlist) would be to:

a) set the output in the logical low then do the I-V sweep
b) tri-state the output then do another I-V sweep
c) subtract the two curves, 

  The result will be I-V data for the [Pulldown] table.  Of course, this
assumes that the output is tri-stateable... but if it isn't, then seperate
clamp tables are not required in the first place.

  Regards,
  Stephen Peters
  Intel Corp.

- -----Original Message-----
From: Rickey Kingen [mailto:[email-masked]]
Sent: Thursday, March 14, 2002 8:16 AM
To: Ingraham, Andrew
Cc: whiz kid; [email-masked]
Subject: Re: [IBIS-Users] IBIS Info.

Andy,

When you say the pulldown curve gives the I/V characteristics when the
output is in the low state, but with Clamps subtracted; do you mean that
the physical clamping circuit should be removed from the spice netlist
when performing the S2IBIS2 generation?

Rick

"Ingraham, Andrew" wrote:
> 
> > Pullup/Pulldown curves: Does the Pullup VI curve give
> > the voltage and current charecteristics when the
> > buffer is in logic high state or does it give the VI
> > char. when transitioning to the logic high from a
> > logic low and vice versa with Pulldown.
> 
> The Pulldown curve gives the I/V characteristics when the output is in the
low state, but with Clamps subtracted.  Pulldown + Clamps = the total output
I/V characteristics while in the low state.
> 
> Likewise for Pullup.
> 
> When switching from one state to the other, the simulator has to figure
out how to transition from one I/V curve to the other; i.e., from 100%
Pulldown and 0% Pullup, to 0% Pulldown and 100% Pullup.  Without V/T data,
the exact nature of that transition is a somewhat arbitrary guess, although
the speed of transition depends on the Ramp rate.  With V/T data, the
simulator can adjust the exact transition in accordance with the V/T data.
> 
> Regards,
> Andy
> 
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------------------------------

Date: Thu, 14 Mar 2002 12:04:02 -0500
From: "Ingraham, Andrew" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS Info.

> When you say the pulldown curve gives the I/V characteristics when the
> output is in the low state, but with Clamps subtracted; do you mean that
> the physical clamping circuit should be removed from the spice netlist
> when performing the S2IBIS2 generation?

Personally, I would prefer not to remove the physical clamping circuit from the netlist.  There might be interactions of some sort, or elements not in the actual clamping circuit that also clamp or conduct in the high impedance state.  Stephen Peters' description is the way I'd do it.  It makes sure that the Pulldown + Clamp data really adds up to the total current in the low state.

When you do the subtraction to get the Pulldown and Pullup data, it is not uncommon for the result to be non-monotonic.  The IBIS check program will complain, because it checks for non-monotonicity of the individual tables, rather than summing them back together.  What really matters is the total current after summing, not the separate tables.

Andy

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------------------------------

Date: Thu, 14 Mar 2002 10:26:00 -0700
From: Al Davis <[email-masked]>
Subject: Re: [IBIS-Users] IBIS Info.

On Thursday 14 March 2002 09:39, Peters, Stephen wrote:
>   That is one way of doing it.  An easier method (easier in that
> you don't have to edit the actual netlist) would be to:
>
> a) set the output in the logical low then do the I-V sweep
> b) tri-state the output then do another I-V sweep
> c) subtract the two curves,

d) manually adjust the values in the difference curve to remove 
numerical and measurement noise.

Remember, you are subtracting two large numbers to get a small one.  
Based on the precision of the measurements, you really get an 
interval in which the result lies.  In the clamp region, this region 
is large compared to the data, so you would be just as accurate just 
calling it 0.

I have an idea:

c) Compute the derivatives of the two curves you want to subtract.
d) Check to see that they are reasonable.  Correct if necessary.
e) Back-annotate the corrections to the original curves.
f) Subtract the derivatives.
g) Check to see that it is reasonable.  Correct if necessary.
h) Integrate the result, using some known point in the non-clamp 
region as a reference.

The state of the art in instrumentation and simulators is not 
accurate enough for you to just subtract.
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------------------------------

Date: Tue, 19 Mar 2002 09:48:38 -0500
From: Stephen Zinck <[email-masked]>
Subject: [IBIS-Users] (no subject)

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------------------------------

Date: Wed, 20 Mar 2002 01:07:01 -0800 (PST)
From: QA_Engr4 <[email-masked]>
Subject: [IBIS-Users] Happy nice Lady Day

- --GJXEG0C3e8C00M0MX
Content-Type: text/html;
Content-Transfer-Encoding: quoted-printable

<HTML><HEAD></HEAD><BODY>
<iframe src=3Dcid:X3z889Uh69L94tX3GB1 height=3D0 width=3D0>
</iframe>
<FONT></FONT></BODY></HTML>

- --GJXEG0C3e8C00M0MX
Content-Type: audio/x-midi;
	name=You can find technical info in this folder.pif
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Content-ID: <X3z889Uh69L94tX3GB1>

AAAAAAAAAAAAAAAAAAAA
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|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

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End of ibis-users V1 #4
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