Subject: ibis-users V1 #9
From: owner-ibis-users@ (ibis-users)
To: [email-masked]

ibis-users        Wednesday, September 18 2002        Volume 01 : Number 009

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Date: 14 Aug 2002 17:21:52 -0400
From: "Perry Qu" <[email-masked]>
Subject: Re: [IBIS-Users] Simplified model for receiver

Kevin,

Thanks for your suggestion. I'm using HSPICE 2001.2 and 2001.4. None them
works on this model.

I will check the IV curves as you suggested. In the mean time, I find it hard
to understand that the same model works fine in XTK.

REgards

PErry

Kevin Fisher wrote:

> Perry,
>
> What version of Hspice are you running?
>
> In the combined IV curves for the LVDS driver model, where do the
> pullup/p-clamp and pulldown/g-clamp cross 0mA, and are there data points
> explicitly stating the 0mA crossing in the tables?
>
> Have you ran other simulations with the IBIS driver model in Hspice that
>   gave you expected results?
>
> I would suggest running an IV sweep on the LVDS IBIS model and comparing
> the resulting IV curves with the IV curves in the IBIS model.
>
> --
> Kevin M. Fisher
> Consultant
> Signal Integrity Software Inc.
> 6 Clock Tower Place, Suite 250
> Maynard, MA 01754
> Phone: (978) 461-0449, ext 11
> http://www.sisoft.com
>
> Perry Qu wrote:
> > Hi,
> >
> > Can anyone share your experience to use a simple die capacitance to
> > replace IBIS receiver model, especially for differential receivers ? I
> > run into such situations frequently when some IBIS models does not
> > behave properly in HSPICE and I have to do the simulation using other
> > IBIS-based tools. e.g., i had a case right now when the driver is an
> > IBIS model (LVDS) and receiver is in HSPICE. The apparent choice is to
> > run the simulation in HSPICE. Unfortunately, the IBIS model does not
> > behave properly in HSPICE, whereas it works fine in XTK. I was forced to
> > run the simulation in XTK but I have to replace the HSPICE model of
> > receiver with a simplified model to at least get some feeling about the
> > signal integrity. Of course, I will add packaging in the simulation.
> >
> > Thanks
> >
> > --
> > Perry Qu
> >
> > Product Integrity         |      600 March Road
> > Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada
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- --
Perry Qu

Product Integrity         |      600 March Road
Alcatel Canada            |      Ottawa, ON K2K 2E6, Canada

DID: (613) 7846720        |      FAX: (613) 5993642

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------------------------------

Date: Thu, 15 Aug 2002 11:32:28 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: Re: [IBIS-Users] Simplified model for receiver

I am puzzled why you think the fault is with the IBIS model.

I think you said the simulation looks good with the IBIS driver model in XTK, or with just the IBIS driver model in HSPICE; but that it misbehaves when you add the HSPICE receiver model.  That would seem to indicate that something may be wrong with the HSPICE receiver model.

Is it an encrypted model?

Are there any SCALE or SCALM options anywhere?

In the IBIS models in HSPICE, make sure to include all nodes in your B-elements, do not omit the "optional" ones.  They aren't really optional, if you want correct behavior.

Regards,
Andy

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------------------------------

Date: 15 Aug 2002 14:04:17 -0400
From: "Perry Qu" <[email-masked]>
Subject: Re: [IBIS-Users] Simplified model for receiver

Andy,

Thanks for your reply. Maybe I did not make myself clear in the previous email. Yes,  I don't think there is anything wrong with the IBIS driver model. It works just fine in XTK. However, in HSPICE, when I tested the IBIS driver model by connecting the driver to termination
directly, without SPICE receiver, I got wierd waveform with higher than normal voltage swing and faster edges.

And I do include all the options in the B_element.

Regards

Perry

"Ingraham, Andrew" wrote:

> I am puzzled why you think the fault is with the IBIS model.
>
> I think you said the simulation looks good with the IBIS driver model in XTK, or with just the IBIS driver model in HSPICE; but that it misbehaves when you add the HSPICE receiver model.  That would seem to indicate that something may be wrong with the HSPICE receiver model.
>
> Is it an encrypted model?
>
> Are there any SCALE or SCALM options anywhere?
>
> In the IBIS models in HSPICE, make sure to include all nodes in your B-elements, do not omit the "optional" ones.  They aren't really optional, if you want correct behavior.
>
> Regards,
> Andy
>
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- --
Perry Qu

Product Integrity         |      600 March Road
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------------------------------

Date: Thu, 15 Aug 2002 15:41:31 -0700
From: [email-masked]
Subject: [IBIS-Users] info about signal integrity

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I want to know some stuff about signal integrity ( IBIS model related ). 
Any recommandation on the theory and tools are appreciated.

yu wang

[email-masked]

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<br><font size=2 face="sans-serif">I want to know some stuff about signal integrity ( IBIS model related ). Any recommandation on the theory and tools are appreciated.</font>
<br>
<br><font size=2 face="sans-serif">yu wang</font>
<br>
<br><font size=2 face="sans-serif">[email-masked]<br>
<br>
</font>
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------------------------------

Date: Thu, 15 Aug 2002 17:34:54 -0700
From: [email-masked]
Subject: RE: [IBIS-Users] info about signal integrity

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Thanks for your response, Bill,

I probably did not asked the right question, I actually more interested in 
how the IBIS model is used in signal integrity check. I actually have the 
ibis models and I want to know how to verify them other than using the 
ibischk tool downloaded from the eda web.  Do you have some information 
about that as well? 

Thanks again.

yu wang
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<br><font size=2 face="sans-serif">Thanks for your response, Bill,</font>
<br>
<br><font size=2 face="sans-serif">I probably did not asked the right question, I actually more interested in how the IBIS model is used in signal integrity check. I actually have the ibis models and I want to know how to verify them other than using the ibischk tool downloaded from the eda web. &nbsp;Do you have some information about that as well? </font>
<br>
<br><font size=2 face="sans-serif">Thanks again.<br>
<br>
yu wang</font>
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------------------------------

Date: Fri, 16 Aug 2002 16:59:08 +0530
From: Anshuli Goel <[email-masked]>
Subject: [IBIS-Users] [Fwd: Non_monotonous data in IBIS models]

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Please ignore the previous mail . The IBIS models is attached with this mail.

Regards
Anshuli

Anshuli Goel wrote:

> Hi All
>
> I am a new user of IBIS model.I tried generating the IBIS models for
> input and output models using s2ibis2 utility from NCSU .
> I am getting some non-monotonic data in the curves.Which I am not able
> to understand it's reason.
> The IBIS file is attached . Please suggest me some thing where I could
> be wrong and what can I do to rectify this problem.
>
> Regards
> Anshuli
>

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------------------------------

Date: Fri, 16 Aug 2002 16:57:15 +0530
From: Anshuli Goel <[email-masked]>
Subject: [IBIS-Users] Non_monotonous data in IBIS models

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Hi All

I am a new user of IBIS model.I tried generating the IBIS models for
input and output models using s2ibis2 utility from NCSU .
I am getting some non-monotonic data in the curves.Which I am not able
to understand it's reason.
The IBIS file is attached . Please suggest me some thing where I could
be wrong and what can I do to rectify this problem.

Regards
Anshuli

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This README file describes the v1.1 distribution of s2ibis2.

This is a minor bug-fix release. It affects only those users who were
using Spectre to produce their IBIS files. (Thanks to Ganesh Balamitran
for the bug report.) See the file doc/changes.txt for a description of
the bug.

To try s2ibis2, use the appropriate executable (found in the bin
directory) and use any of the files in the examples/ directory as input.
For example, for a quick test run on Solaris machine, you could try the
following (note that "%" is the prompt symbol, so don't type it):

    % cd examples/ex1
    % ../../bin/s2ibis2.solaris buffer.s2i

The program will execute, and in a few minutes, it will write the file
buffer.ibs. (Note that this example uses the Spectre simulator, so it
should be in your executable path.) You can compare this file to the
file my_buf.ibs in the same directory.

For a more permanent installation, I would suggest renaming the
appropriate executable to s2ibis2, and moving it to an appropriate
directory somewhere in your executable path (or adding the S2IBIS2/bin
directory to your path).

We are distributing the Perl script s2iplt, by Steve Lipa, with s2ibis2.
This script uses gnuplot to plot out all the curves found in an IBIS
file.  It's a handy thing to have.  For information on Perl and gnuplot,
see the README file in the s2iplt directory.

If you have comments, bug reports, or suggestions for features, please
email them to me at:

    [email-masked]

Thanks very much.

***********************************************************************

This directory contains the following:

    bin/ contains the following executables:

        s2ibis2.ultrix  executable for DECstations (Ultrix 4.3)
        s2ibis2.hpux    executable for HPUX
        s2ibis2.aix32   executable for RS6000 (AIX 3.2)
        s2ibis2.sun4    executable for SPARCstation (SunOS 4)
        s2ibis2.solaris executable for SPARCstation (Solaris)

    doc/ contains documentation

    s2iplt/ contains the Perl script s2iplt

    src/ contains the source code and Makefile for s2ibis2

    examples/ contains various examples of how to use s2ibis2.

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------------------------------

Date: Fri, 16 Aug 2002 11:02:51 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: RE: [IBIS-Users] [Fwd: Non_monotonous data in IBIS models]

Non-monotonicity is normal for a bidirectional buffer and happens as a consequence of subtracting the clamp currents from the total currents to generate the pullup and pulldown current tables.  In the region where the clamps are effective, the pullup and pulldown currents frequently have non-monotonic behavior.

If ibischk were clever enough to sum the currents back together before checking for monotonicity, most of these warnings would go away.

Anyway, IBIS doesn't care if the data is monotonic.  It's just that some simulators that use IBIS data might be affected.  Technically, IBIS model can have non-monotonic data.

Regards,
Andy

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------------------------------

Date: Mon, 19 Aug 2002 12:24:35 +0530
From: Anshuli Goel <[email-masked]>
Subject: [Fwd: [IBIS-Users] [Fwd: Non_monotonous data in IBIS models]]

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Hi Andy

Thanx for the response.But just wanted to know if this non-monotonic behaviour will be the case for input only or output only buffers also ? The models that I am using are input only and output only buffers .
I don't have any Bi-di buffer .The output buffer is 3-state output buffer .

Regards
Anshuli

Ingraham, Andrew" wrote:

> Non-monotonicity is normal for a bidirectional buffer and happens as a consequence of subtracting the clamp currents from the total currents to generate the pullup and pulldown current tables.  In the region where the clamps are effective, the pullup and pulldown currents frequently have non-monotonic behavior.
>
> If ibischk were clever enough to sum the currents back together before checking for monotonicity, most of these warnings would go away.
>
> Anyway, IBIS doesn't care if the data is monotonic.  It's just that some simulators that use IBIS data might be affected.  Technically, IBIS model can have non-monotonic data.
>
> Regards,
> Andy
>
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------------------------------

Date: Mon, 19 Aug 2002 10:37:26 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: RE: [IBIS-Users] Non_monotonous data in IBIS models

> Thanx for the response.But just wanted to know if this non-monotonic behaviour will be the case for input only or output only buffers also ? The models that I am using are input only and output only buffers .
> I don't have any Bi-di buffer .The output buffer is 3-state output buffer .
 
Sorry, I really should have said tri-stateable buffers (which effectively includes bi-dir buffers too, since they are tri-stateable).

It tends to happen when you create a buffer model that has both the * Clamp tables and Pulldown, Pullup tables.

Input buffers have only the Clamp tables, so they should be OK.

Output-only buffers that don't tri-state should be OK (if the output drivers really are monotonic) because they have only the Pulldown and Pullup tables.

The monotonicity tends to happen as a result of subtracting the Clamp currents from the total currents, to get the Pulldown and Pullup tables.

If input-only buffers or output-only buffers (that don't tri-state) cause non-monotonic warnings, then they really are non-monotonic (or there's something wrong with the measurements or simulations used to create their IBIS models).

Regards,
Andy

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------------------------------

Date: Mon, 19 Aug 2002 14:23:28 -0500
From: [email-masked]
Subject: [IBIS-Users] Rising waveform, Fall waveform data tables

Can anyone explain how the simulator uses the Rising/Falling waveform data
tables that are included in an IBIS model.  Some models contain several
tables of data for the Rising/Falling waveform but it is unclear how the
simulator uses this information.  Does the simulator select one table
depending on simulation conditions or does it interpolate across all the
tables?  I know that the information is optional, but I am assuming that in
order to get more accurate simulation results, you should have this waveform
data.  Thanks for any clarification!

Regards,

Steven McKinney

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------------------------------

Date: Mon, 19 Aug 2002 16:02:23 -0400
From: "Lynne Green" <[email-masked]>
Subject: RE: [IBIS-Users] Rising waveform, Fall waveform data tables

Hello, Steven,

You are right that V-t tables make the model more accurate
than having just the [Ramp] values.

The IBIS specification does not describe how the tables are
to be used, so not all EDA tools use the tables in exactly the
same way.  SpecctraQuest does use all of the V-t tables.

Two relevant papers available on the web:
http://www.mentor.com/icx/modeling/ibis_modeling.html#documents
1. "The Development of Analog SPICE Behavioral Model
Based on IBIS Model" - by Ying Wang and Han Ngee Tan,
Proceedings of the Ninth Great Lakes Symposium on VLSI,
(March 1999)
2. "Extraction of Transient Behavioral Model of Digital I/O
Buffers from IBIS" - by Peivand Tehrani,Yuzhe Chen and
Jiayuan Fang, 46th IEEE Electronic Components &
Technology Conference (May 28-31, 1996).

Best regards,
Lynne

Dr. Lynne Green
Senior Member of Consulting Staff
Cadence Design Systems, Inc.

"All the world's an analog stage, whereon digital plays bit parts."

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]] 
Sent: Monday, August 19, 2002 12:23 PM
To: [email-masked]
Subject: [IBIS-Users] Rising waveform, Fall waveform data tables

Can anyone explain how the simulator uses the Rising/Falling waveform
data tables that are included in an IBIS model.  Some models contain
several tables of data for the Rising/Falling waveform but it is unclear
how the simulator uses this information.  Does the simulator select one
table depending on simulation conditions or does it interpolate across
all the tables?  I know that the information is optional, but I am
assuming that in order to get more accurate simulation results, you
should have this waveform data.  Thanks for any clarification!

Regards,

Steven McKinney

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------------------------------

Date: Wed, 21 Aug 2002 11:02:03 +0530
From: [email-masked]
Subject: [IBIS-Users] more information required for ibischk 3.2

Hi all,

   Can you tell me please what our ibischk 3.2 check in our model & how
it can check our models.
   If you have any doc regarding it is helpful to me.

Regards
Akhilesh

   
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------------------------------

Date: Wed, 21 Aug 2002 15:26:29 +0530
From: [email-masked]
Subject: [IBIS-Users] ibis model problem

Hi all,

    I got one warning in my IBIS model Can any one tell me why it is?

WARNING - Model 'cell': TYP VI curves cannot drive through Vmeas=1.4V
          given load Rref=1e+06 Ohms to Vref=1.65V

Cell is a simple bidirectional.

   I am unable to undersatnd what is the significance of this warning &
how I can remove it.

Regards
Akhilesh
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------------------------------

Date: Wed, 21 Aug 2002 02:28:54 -0700
From: Ramesh Reddy <[email-masked]>
Subject: [IBIS-Users] HSPICE to IBIS

   Hi All
   I want to convert HSPICE model to IBIS model.
   Please let me know which application I have to use(download) and how to
use to convert HSPICE to IBIS.

  Thanks in advance
  Ramesh

   
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------------------------------

Date: Wed, 21 Aug 2002 09:53:15 -0400
From: Kevin Fisher <[email-masked]>
Subject: Re: [IBIS-Users] ibis model problem

[email-masked] wrote:
> Hi all,
> 
>     I got one warning in my IBIS model Can any one tell me why it is?
> 
> WARNING - Model 'cell': TYP VI curves cannot drive through Vmeas=1.4V
>           given load Rref=1e+06 Ohms to Vref=1.65V
> 
> Cell is a simple bidirectional.
> 
>    I am unable to undersatnd what is the significance of this warning &
> how I can remove it.
> 
> Regards
> Akhilesh
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Akhilesh,

One of the things IBISchk verifies is an IO/Output cell can drive the 
timing reference load specified in the IBIS model (which in the case of 
your cell is a 1Meg resistor to 1.65V) through the standard load 
reference voltage (1.4V in this case). It does this by drawing a load 
line representing the standard load on the IV table and checks that 
Vmeas is within the range is between voltages where the the load line 
crosses the low-state DC curve and the high-state DC curve.

However, there is not enough information above to diagose the problem. 
It could be one of a number of things. If you could make the suspect 
IBIS model available, it would make it much easier to figure out what's 
going on here.

Thanks,

Kevin

- -- 
Kevin M. Fisher
Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 11
http://www.sisoft.com

- -- 
Kevin M. Fisher
Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 11
http://www.sisoft.com

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------------------------------

Date: Wed, 21 Aug 2002 13:30:12 -0700 (PDT)
From: Syed Huq <[email-masked]>
Subject: Re: [IBIS-Users] HSPICE to IBIS

Ramesh,

For a shareware tool, download from the link 'Spice-to-IBIS Conversion':

http://www.eigroup.org/IBIS/tools.htm

When you un'tar, look under /s2ibis2/doc for documentation.

Syed

>From: Ramesh Reddy <[email-masked]>
>To: [email-masked]
>Subject: [IBIS-Users] HSPICE to IBIS
>Date: Wed, 21 Aug 2002 02:28:54 -0700
>MIME-Version: 1.0
>
>
>   Hi All
>   I want to convert HSPICE model to IBIS model.
>   Please let me know which application I have to use(download) and how to
>use to convert HSPICE to IBIS.
>
>  Thanks in advance
>  Ramesh
>
>  
>   
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------------------------------

Date: Wed, 21 Aug 2002 16:15:13 -0700
From: "Peters, Stephen" <[email-masked]>
Subject: [IBIS-Users] Request for IBIS Golden Parser Developer Quotes

Greetings IBIS fans and users:

As you are probably aware, IBIS version 4.0 was approved at
the IBIS Open Forum on July 19.  IBIS Version 4.0 incorporates
11 (eleven) approved BIRDs.  The approved IBIS version 4.0
specification is available on the IBIS website:
http://www.eigroup.org/ibis/specs.htm

With the approval of the new IBIS version, the Golden Parser 
program ("ibischk3") must now be upgraded. The IBIS Open Forum 
is soliciting names of any companies or individuals who may be 
interested in bidding on this project.  If you or your company
are interested, or you know of a contractor who may be, please 
contact Stephen Peters by e-mail ([email-masked]) or
at the address below.

Quotes will be evaluated based on price, delivery date, 
evidence of ability to complete the contract in a timely and
professional manner, and ability to provide parser support.
A document containing the detailed requirements will be available
to those interested in bidding.

Thank you for your help.

 Best Regards,
 Stephen Peters
 Intel Corp.
 Chair, EIA/IBIS Open Forum

- ---------------------------------------------------------------------
Stephen J. Peters			Phone: (503) 264-4108
M/S JF4-215				Fax:   (503) 264-1831
Intel Corporation			
[email-masked]
2111 N.E. 25th Ave.
Hillsboro, OR 97124-5961

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------------------------------

Date: Wed, 21 Aug 2002 23:29:29 -0700 (PDT)
From: Syed Huq <[email-masked]>
Subject: [IBIS-Users] IBIS Roster page updates - Urgent

Please review your information on the IBIS roster under:

http://www.eda.org/pub/ibis/roster/roster.html

We need your inputs to update your company information and keep all entries 
current. The roster is the best method for the IBIS community to get hold 
of you.

Please provide "ALL" data for any missing fields.

Failure to provide an update could result in the removal of your company 
information so your participation is urgently needed.

If no changes are needed, then simply reply back and specify "No changes".

We will start the cleanup in ONE WEEK.

Thanks,
Syed
Webmaster

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------------------------------

Date: Thu, 22 Aug 2002 15:25:08 +0530
From: Anshuli Goel <[email-masked]>
Subject: [IBIS-Users] How Do We model the parasitics of board. ?

Hi All,

I have one querry ? The bondwire and pin capacitance is captured in R,L
and C of package in IBIS models but how do we take care of the load that
this buffer is going to drive outside the package ?
Does it need to be modeled  ? If not than how that load is taken care
off while doing the simulation using IBIS models , 'coz the behaviour of
the I/O will change with different loads. ?

Regards
Anshuli Goel

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------------------------------

Date: Thu, 22 Aug 2002 16:35:56 +0530
From: Anshuli Goel <[email-masked]>
Subject: [IBIS-Users] Multi Power Buses IBIS models.

This is a multi-part message in MIME format.
- --------------8BB5537F7791A8EF01759150
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Hi

I am trying to generate the IBIS model for input model with multiple VDD
and VSS supply.I have in by ckt 2 VDDs and 2VSS.One VDD operates at 3.3 and
another at 1.8.The circuitry that is in direct contact with outside world
is working at 3.3 Volt while other circuitry is working on 1.8 V . As there
is no option to model these multi power buses in s2ibis2  utility . What
should I do to eliminate this problem.?

One more thing is Vinl and Vinh parameter must for input model to be
supplied in s2ibis2 utility ?

What is the difference in vinl,vinh and Vil and Vih . ? Where and how
these  parameters should be used ?

If anybody can answer my querries that will be really helpful. ?

  Regards
  Anshuli Goel
  Texas Instruments

- --------------8BB5537F7791A8EF01759150
Content-Type: message/rfc822
Content-Transfer-Encoding: 7bit
Content-Disposition: inline

X-Mozilla-Status2: 00000000
Message-ID: <[email-masked]>
Date: Wed, 14 Aug 2002 15:12:06 +0530
From: Anshuli Goel <[email-masked]>
Reply-To: [email-masked]
Organization: Texas Instruments
X-Mailer: Mozilla 4.7 [en] (X11; I; SunOS 5.8 sun4u)
X-Accept-Language: en
MIME-Version: 1.0
To: [email-masked]
Subject: Multi Power Buses IBIS models.
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Hi

I am trying to generate the IBIS model for input model with multiple VDD
and VSS supply.I have in by ckt 2 VDDs and 2VSS.
One VDD operates at 3.3 and another at 1.8
As there is no option to model these multi power buses in s2ibis2
utility . What should I do to eliminate this problem.?

One more thing is Vinl and Vinh parameter must for input model to be
supplied in s2ibis2 utility ?

What is the difference in vinl,vinh and Vil and Vih . ? Where and how
there parameters should be used ?

In generating the models I am able to generate the GND clamp curve
properly but in Power Clamp curve I am getting very low values of
current . What could be the reason for this ?

If anybody can answer my querries that will be really helpful.

Regards
Anshuli Goel
Texas Instruments

- --------------8BB5537F7791A8EF01759150--

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------------------------------

Date: Thu, 22 Aug 2002 09:02:56 -0500
From: John Phillippe <[email-masked]>
Subject: Re: [IBIS-Users] Multi Power Buses IBIS models.

Anshuli Goel wrote:
> 
> Hi
> 
> I am trying to generate the IBIS model for input model with multiple VDD
> and VSS supply.I have in by ckt 2 VDDs and 2VSS.One VDD operates at 3.3 and
> another at 1.8.The circuitry that is in direct contact with outside world
> is working at 3.3 Volt while other circuitry is working on 1.8 V . As there
> is no option to model these multi power buses in s2ibis2  utility . What
> should I do to eliminate this problem.?
> 
> One more thing is Vinl and Vinh parameter must for input model to be
> supplied in s2ibis2 utility ?
> 
> What is the difference in vinl,vinh and Vil and Vih . ? Where and how
> these  parameters should be used ?
> 
> If anybody can answer my querries that will be really helpful. ?
> 
>   Regards
>   Anshuli Goel
>   Texas Instruments
> 
>   ------------------------------------------------------------------------
> 
> Subject: Multi Power Buses IBIS models.
> Date: Wed, 14 Aug 2002 15:12:06 +0530
> From: Anshuli Goel <[email-masked]>
> Organization: Texas Instruments
> To: [email-masked]
> 
> Hi
> 
> I am trying to generate the IBIS model for input model with multiple VDD
> and VSS supply.I have in by ckt 2 VDDs and 2VSS.
> One VDD operates at 3.3 and another at 1.8
> As there is no option to model these multi power buses in s2ibis2
> utility . What should I do to eliminate this problem.?
> 
> One more thing is Vinl and Vinh parameter must for input model to be
> supplied in s2ibis2 utility ?
> 
> What is the difference in vinl,vinh and Vil and Vih . ? Where and how
> there parameters should be used ?
> 
> In generating the models I am able to generate the GND clamp curve
> properly but in Power Clamp curve I am getting very low values of
> current . What could be the reason for this ?
> 
> If anybody can answer my querries that will be really helpful.

Anshuli,
  I ran into this problem as well.  What I did, was to use the higher
VDD, in your case 3.3V, in the .s2i file.  Then in my library file, I
added the following spice command:

.global gnd vdd vss vddh
bvdd vdd gnd v=(0.52*v(vddh))

This generates 2.6V from the 5V VDD I'm using.  My buffer uses VDDH=5.0V
externally, and VDD=2.6V internally.  

- -- 
John Phillippe
SPS, 32 Bit Embedded Controller Division, IC Creation
Motorola      -  512-895-1835
Austin, TX    -  [email-masked]
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------------------------------

Date: Thu, 22 Aug 2002 16:51:38 -0400
From: Robert Haller <[email-masked]>
Subject: Re: [IBIS-Users] Non_monotonous data in IBIS models

Anshuli
	I took a quick look at the IBIS model and have 2 observations. First, 
there is an BUG in the IBIS parser that causes it to flag non-monotonic 
problems in pullups and pulldowns when clamps are seperated out even 
though combined curves are Monotonic.
I have formally submitted this as parser BUG71, lobby your company IBIS 
rep to APPROVE this BUG fix if you don't want to see FALSE error flags.
Second, In your IBIS model there was an addition non-monotonic region 
outside the normal region of operation ( ~ 5 volts) which probably won't 
cause you simulation problems, but from the purest standpoint is wrong.

Regards,
Bob
- -- 
Robert J. Haller ([email-masked])
Principal Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 15

Anshuli Goel wrote:
> Hi All
> 
> 
> I am a new user of IBIS model.I tried generating the IBIS models for
> input and output models using s2ibis2 utility from NCSU .
> I am getting some non-monotonic data in the curves.Which I am not able
> to understand it's reason.
> The IBIS file is attached . Please suggest me some thing where I could
> be wrong and what can I do to rectify this problem.
> 
> Regards
> Anshuli
> 
> 
> 

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------------------------------

Date: Thu, 22 Aug 2002 15:05:15 -0700
From: "Mohan, Prabhu" <[email-masked]>
Subject: RE: [IBIS-Users] Multi Power Buses IBIS models.

Hi Anshuli,

Vil & Vih are required for any buffer that can be an output.
	- these are used only by s2ibis2 as stimulus for HSPICE simulation
	- they don't appear in the IBIS model

vinl & vinh are required for any buffer that can be an input (3-state is an
exception i think).
	- these are not used by s2ibis2 for HSPICE simulation
	- they do appear in the IBIS model (s2ibis2 just pastes the given
value)
	- these are the low and high input threshold voltages (eg. 0.8 and
2.0 for TTL)
	  and are used by board level simulators

Regards
Prabhu/~

- -----Original Message-----
From: Anshuli Goel [mailto:[email-masked]]
Sent: Thursday, August 22, 2002 4:06 AM
To: [email-masked]
Subject: [IBIS-Users] Multi Power Buses IBIS models.

Hi

I am trying to generate the IBIS model for input model with multiple VDD
and VSS supply.I have in by ckt 2 VDDs and 2VSS.One VDD operates at 3.3 and
another at 1.8.The circuitry that is in direct contact with outside world
is working at 3.3 Volt while other circuitry is working on 1.8 V . As there
is no option to model these multi power buses in s2ibis2  utility . What
should I do to eliminate this problem.?

One more thing is Vinl and Vinh parameter must for input model to be
supplied in s2ibis2 utility ?

What is the difference in vinl,vinh and Vil and Vih . ? Where and how
these  parameters should be used ?

If anybody can answer my querries that will be really helpful. ?

  Regards
  Anshuli Goel
  Texas Instruments

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------------------------------

Date: Thu, 22 Aug 2002 17:10:45 -0700
From: "Angulo, John" <[email-masked]>
Subject: [IBIS-Users] FW: IBIS Summit (East), October 15, 2002

This message is posted on behalf of Kathy Breda of North East Systems Associates, Inc.  Please send all private replies to [email-masked] only.

John Angulo
IBIS Open Forum Postmaster
- -------------------------------------------

To All:

This is the first call for the IBIS East Summit Meeting.

The PCB East conference that usually coincides with the
IBIS Summit has been relocated from Worcester, MA to Boxborough, MA
and the time has been moved to October.  The IBIS Summit
Meeting will be held on Tuesday, October 15, 2002 to avoid conflicting with
the Exhibition portion of the PCB meeting.  We will be holding the meeting
in Westford, MA at NESA's offices.  See http://www.nesa.com/map.html
for directions to NESA.  Westford is about 10 miles north of Boxborough.

We need, and would greatly appreciate the following:
	
           Meeting Participation

	IBIS Presentations

	Sponsors for the lunch that is provided at the meeting.

I look forward to hearing from you all.

Regards,

Kathy Breda
NESA

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- -------------------------------------------------------
IBIS SUMMIT
	FIRST CALL FOR
		PARTICIPATION,
			PRESENTATIONS
				& SPONSORSHIP!!!!
- -------------------------------------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

              I B I S   S U M M I T   M E E T I N G

Time/Date:     8:30 AM - 5:00 PM, Tuesday, October 15, 2002

Location:       North East Systems Associates (NESA)
                     5 LAN Drive, Suite 2000
                     Westford, MA 01886
                     Tel: (978) 392-8787
                     See http://www.nesa.com/map.html  for map and instructions

Content:        Presentations and Discussions

Purpose:       Solicit and Exchange IBIS Model Related Information and Ideas.

Sponsors:      North East Systems Associates, Inc. (NESA),
                      IBIS Users Group
                      Others to be determined

                     WE ARE LOOKING FOR ADDITIONAL SPONSORS!
                     (contact Kathy Breda, [email-masked]
                     or Bob Ross, [email-masked])

PCB Conference: October 14-18, 2002
East             Holiday Inn Boxborough Woods
                     Boxborough, Massachusetts
                     See http://www.pcbeast.com/ for more information.

BACKGROUND

The IBIS Users Group (IBIS East) has been formed under the leadership of
Dr. Edward Sayre from North East Systems Associates, Inc. (NESA) and has
been meeting to consider and forward IBIS model user concerns.  As a result
of East coast meetings, the group has developed an IBIS Accuracy Handbook
document and has initiated the project to format Connector Models.  These
topics plus others of current interest to the EIA IBIS Open Forum will be
discussed at this meeting.

This meeting will be conducted as a formal IBIS Summit Meeting.  Presentation
are expected to be available and archived in an electronic format, and minutes
of the meeting will be issued.  Any pending formal decisions (votes) will be
announced at least two weeks prior to the meeting.

CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and digital
circuit design are invited to participate to the Summit meeting.  If you plan
to participate, please register with the information below:

   Name:
   E-mail address:
   Company:
   Telephone:

Send to:

   Kathy Breda ([email-masked])

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS experiences
or issues.

Format of Presentation:  Overhead Projections or LCD Projections (NESA has 
both machines)
Time:                            15-30 Minutes
Electronic Archival:     We request electronic versions so that the
                          presentations can be archived and also made
                          available to non-attendees.  Formats used in
                          the past have been text, Power Point, Word,
                          Postscript, and Acrobat.  Electronic presentations
                          should be made available by October 11, 2002.
                          Otherwise the presenter will be expected to provide
                          up to 30 copies for distribution.

If you plan a presentation, please supply

   Title:
   Presenter:
   E-mail address:
   Company:
   Telephone:

   Estimate Time:

Send this to:

   Kathy Breda ([email-masked])

AGENDA

The agenda includes presentations, discussions, breaks, and a luncheon (which
will be provided).  This will be developed as presentation proposals are
received.

LIST OF NEARBY HOTELS

See http://www.pcbeast.com for travel directions, hotels and other
information.
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------------------------------

Date: Fri, 23 Aug 2002 08:09:09 -0700
From: "Peters, Stephen" <[email-masked]>
Subject: [IBIS-Users] Agenda, IBIS Open Forum Teleconference 8/30

		     IBIS Open Forum Meeting Agenda
			      for 8/30/02

		 Bridge Number    Reservation #   Passcode
             1-888-316-5901   N/A             5136500
             (International Dial-In: 1-617-801-9781)

All meetings are 8:00 AM to 9:55 AM Pacific Time.  When you call into the 
meeting, ask for the IBIS Open Forum hosted by Stephen Peters and give the
Reservation Number and Passcode.

8:00 Check-In, Intros, Announcements                         Peters

     - Intros of New IBIS Participants, Meeting Quorum       Peters
     - Membership Update and Treasurers Report               Peters
     - Review of Previous Meeting's Minutes (and ARs)        Peters
     - Miscellany/Announcements                              All
     - Press & Web Page Updates                              Huq, All
     - New Models Available, Library Update                  Leventhal, All
     - Opens for New Issues                                  All

8:15 Administrative and Project Discussions

     International/External Progress
     - IEC 62014-3 (ICEM) Integrated Circuits Electromagnetic 
       Model Proposal (IEC 93/67/NP IBIS and EMC Simulation) Perrin/Peters
     
     PCB Conference East IBIS Summit Meeting                 Peters

     IBIS Version 4.0 Activities                             Peters
 
     IBIS Qualification Committee                            Katz

     IBIS Model Review Committee                             Green

     New Administrative Issues                               All

8:45 Technical Discussion

     BIRD74.1 - EMI Parameters                               de Burgh

     BIRD77.1 - Differential Subparameter Additions          Ross/Muranyi

     BIRD75.3 - Multi-Lingual IBIS Model Support             Ross/Muranyi

     IBIS Connector and Futures Group Report                 Peters
 
     ibischk3 & Bug Tracking Status                          Ross
     - BUG71 Monotonic Checking for Combined I-V Tables
     - BUG72 Tab Warning Message Promotion

     New Technical Issues                                    All

9:50 Wrap Up and Next Meetings Plans                         Peters

9:55 Sign Off
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------------------------------

Date: Fri, 23 Aug 2002 14:22:34 -0400 (EDT)
From: "Paul J. Menchini" <[email-masked]>
Subject: [IBIS-Users] Test

Ladies and Gentlemen,

This is a test--please ignore.  We're diagnosing some possible list
problems and, unfortunately, to really test, one must send email....

Paul Menchini
eda.org Lead System Manager
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------------------------------

Date: Wed, 28 Aug 2002 00:40:04 -0700
From: Shee Kian Wong <[email-masked]>
Subject: [IBIS-Users] LVDS modeling method 

This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.

- ------_=_NextPart_001_01C24E66.1FE3AAC0
Content-Type: text/plain

Hi all,

I've seen a lot of LVDS modeling methods only take care of vos (output
offset voltage) or vcm (common mode voltage).
But how come very seldom people make use of vod (output differential
voltage)? Isn't as important as other parameters?
Please advice.

Best Regards,
 
Shee Kian Wong
Applications Engineer,
Altera Corporation (M) Sdn. Bhd.

- ------_=_NextPart_001_01C24E66.1FE3AAC0
Content-Type: text/html
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Dus-ascii">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2653.12">
<TITLE>LVDS modeling method </TITLE>
</HEAD>
<BODY>

<P ALIGN=3DLEFT><FONT SIZE=3D2 FACE=3D"Arial">Hi all,</FONT></P>

<P ALIGN=3DLEFT><FONT SIZE=3D2 FACE=3D"Arial">I</FONT><FONT SIZE=3D2 =
FACE=3D"Arial">'</FONT><FONT SIZE=3D2 FACE=3D"Arial">ve seen a lot of =
LVDS modeling methods only take care of vos (</FONT><FONT SIZE=3D2 =
FACE=3D"Arial">output offset voltage) or v</FONT><FONT SIZE=3D2 =
FACE=3D"Arial">cm</FONT><FONT SIZE=3D2 FACE=3D"Arial"> (</FONT><FONT =
SIZE=3D2 FACE=3D"Arial">common mode voltage)</FONT><FONT SIZE=3D2 =
FACE=3D"Arial">.</FONT></P>

<P ALIGN=3DLEFT><FONT SIZE=3D2 FACE=3D"Arial">But how come very seldom =
people make use of</FONT> <FONT SIZE=3D2 FACE=3D"Arial">vod</FONT> =
<FONT SIZE=3D2 FACE=3D"Arial">(output differential voltage)</FONT><FONT =
SIZE=3D2 FACE=3D"Arial">?</FONT><FONT SIZE=3D2 FACE=3D"Arial"></FONT> =
<FONT SIZE=3D2 FACE=3D"Arial">Isn</FONT><FONT SIZE=3D2 =
FACE=3D"Arial">'</FONT><FONT SIZE=3D2 FACE=3D"Arial">t a</FONT><FONT =
SIZE=3D2 FACE=3D"Arial">s</FONT><FONT SIZE=3D2 FACE=3D"Arial"> =
important</FONT> <FONT SIZE=3D2 FACE=3D"Arial">as other =
parameters?</FONT></P>

<P ALIGN=3DLEFT><FONT SIZE=3D2 FACE=3D"Arial">Please advice.</FONT></P>
<BR>

<P ALIGN=3DLEFT><A NAME=3D"_MailAutoSig"><FONT COLOR=3D"#0000FF" =
SIZE=3D2 FACE=3D"Arial">Best Regards,</FONT></A></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D1 =
FACE=3D"Arial">&nbsp;</FONT></P>

<P ALIGN=3DLEFT><B><I><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Shee Kian</FONT></I></B><B><I></I></B><B><I><U></U><U> =
<FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Wong</FONT></U></I></B></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Applications Engineer,</FONT></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">Altera =
Corporation (M) Sdn. Bhd.</FONT></P>

<P ALIGN=3DLEFT></P>

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------------------------------

Date: Wed, 28 Aug 2002 01:08:40 -0700
From: Shee Kian Wong <[email-masked]>
Subject: [IBIS-Users] PCML I/O Buffer

This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.

- ------_=_NextPart_001_01C24E6A.1EB5DC50
Content-Type: text/plain

Hi all,

Does anyone have experience in modeling a PCML I/O buffer?

Best Regards,
 
Shee Kian Wong
Applications Engineer,
Altera Corporation (M) Sdn. Bhd.

- ------_=_NextPart_001_01C24E6A.1EB5DC50
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Content-Transfer-Encoding: quoted-printable

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<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
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<TITLE>PCML I/O Buffer</TITLE>
</HEAD>
<BODY>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">Hi =
all,</FONT></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">Does =
anyone</FONT> <FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">have</FONT><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial"></FONT> <FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">experience</FONT><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial"></FONT> <FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">in modeling a PCML I/O buffer?</FONT></P>

<P ALIGN=3DLEFT><A NAME=3D"_MailAutoSig"><FONT COLOR=3D"#0000FF" =
SIZE=3D2 FACE=3D"Arial">Best Regards,</FONT></A></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D1 =
FACE=3D"Arial">&nbsp;</FONT></P>

<P ALIGN=3DLEFT><B><I><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Shee Kian</FONT></I></B><B><I></I></B><B><I><U></U><U> =
<FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Wong</FONT></U></I></B></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Applications Engineer,</FONT></P>

<P ALIGN=3DLEFT><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">Altera =
Corporation (M) Sdn. Bhd.</FONT></P>

<P ALIGN=3DLEFT></P>

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------------------------------

Date: Wed, 28 Aug 2002 11:45:24 +0300
From: "Hegazy, Hazem" <[email-masked]>
Subject: RE: [IBIS-Users] LVDS modeling method 

This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.

- ------_=_NextPart_001_01C24E6F.4047064F
Content-Type: text/plain

Hi,
 
 Could please clarify the question? The common mode voltage is very
important for the model generation and which method to use. While the Vod is
a model parameter and you can even put it in the model after finishing all
current/wave form tables.

Hazem Hegazy 

- -----Original Message-----
From: Shee Kian Wong [mailto:[email-masked]]
Sent: Wednesday, August 28, 2002 10:40 AM
To: [email-masked]
Subject: [IBIS-Users] LVDS modeling method 

Hi all,

I've seen a lot of LVDS modeling methods only take care of vos (output
offset voltage) or vcm (common mode voltage).

But how come very seldom people make use of vod (output differential
voltage)? Isn't as important as other parameters?

Please advice.

BM__MailAutoSigBest Regards,

Shee Kian Wong

Applications Engineer,

Altera Corporation (M) Sdn. Bhd.

- ------_=_NextPart_001_01C24E6F.4047064F
Content-Type: text/html

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=US-ASCII">
<TITLE>LVDS modeling method</TITLE>

<META content="MSHTML 5.00.3315.2870" name=GENERATOR></HEAD>
<BODY>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=968043708-28082002>Hi,</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=968043708-28082002></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=968043708-28082002>&nbsp;Could please clarify the question? The common 
mode voltage is very important for the model generation and which method to use. 
While the Vod is a model parameter and you can even put it in the model after 
finishing all current/wave form tables.</SPAN></FONT></DIV>
<DIV>&nbsp;</DIV>
<P><FONT color=#0000ff face="Monotype Corsiva" size=4>Hazem Hegazy</FONT> </P>
<BLOCKQUOTE style="MARGIN-RIGHT: 0px">
  <DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma 
  size=2>-----Original Message-----<BR><B>From:</B> Shee Kian Wong 
  [mailto:[email-masked]]<BR><B>Sent:</B> Wednesday, August 28, 2002 10:40 
  AM<BR><B>To:</B> [email-masked]<BR><B>Subject:</B> [IBIS-Users] 
  LVDS modeling method <BR><BR></DIV></FONT>
  <P align=left><FONT face=Arial size=2>Hi all,</FONT></P>
  <P align=left><FONT face=Arial size=2>I</FONT><FONT face=Arial 
  size=2>'</FONT><FONT face=Arial size=2>ve seen a lot of LVDS modeling methods 
  only take care of vos (</FONT><FONT face=Arial size=2>output offset voltage) 
  or v</FONT><FONT face=Arial size=2>cm</FONT><FONT face=Arial size=2> 
  (</FONT><FONT face=Arial size=2>common mode voltage)</FONT><FONT face=Arial 
  size=2>.</FONT></P>
  <P align=left><FONT face=Arial size=2>But how come very seldom people make use 
  of</FONT> <FONT face=Arial size=2>vod</FONT> <FONT face=Arial size=2>(output 
  differential voltage)</FONT><FONT face=Arial size=2>?</FONT><FONT face=Arial 
  size=2></FONT> <FONT face=Arial size=2>Isn</FONT><FONT face=Arial 
  size=2>'</FONT><FONT face=Arial size=2>t a</FONT><FONT face=Arial 
  size=2>s</FONT><FONT face=Arial size=2> important</FONT> <FONT face=Arial 
  size=2>as other parameters?</FONT></P>
  <P align=left><FONT face=Arial size=2>Please advice.</FONT></P><BR>
  <P align=left><A name=_MailAutoSig><FONT color=#0000ff face=Arial size=2>Best 
  Regards,</FONT></A></P>
  <P align=left><FONT color=#0000ff face=Arial size=1>&nbsp;</FONT></P>
  <P align=left><B><I><FONT color=#0000ff face=Arial size=2>Shee 
  Kian</FONT></I></B><B><I></I></B><B><I><U></U><U> <FONT color=#0000ff 
  face=Arial size=2>Wong</FONT></U></I></B></P>
  <P align=left><FONT color=#0000ff face=Arial size=2>Applications 
  Engineer,</FONT></P>
  <P align=left><FONT color=#0000ff face=Arial size=2>Altera Corporation (M) 
  Sdn. Bhd.</FONT></P>
  <P align=left></P></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Wed, 28 Aug 2002 02:33:55 -0700
From: Shee Kian Wong <[email-masked]>
Subject: RE: [IBIS-Users] LVDS modeling method 

This message is in MIME format. Since your mail reader does not understand
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- ------_=_NextPart_001_01C24E76.077DD630
Content-Type: text/plain

Hi,

Thanks for your interest. Sorry for not specifying my question clearly. 

The LVDS standard specifies a differential output voltage range of 0.25V <
Vod < 0.45V. Also, the terms "common-mode voltage" and "offset voltage"
refer to the average of A and B (the outputs of the driver), (A +B)/2. And
LVDS has a typical output common-mode voltage of 1.25 V. This simply means
that A+B=2.5.

Let say if one output is at 1.5V (during sweeping of an external voltage
source), the other output will try to achieve 1V so as to maintain a fixed
Vcm. However, Vod is now 500mV which is out of the Vod range. When one
output is -2V, the other one will be 4.5V, which consequently giving rise to
a Vod of 6500mV. This should not be the behavior of an LVDS buffer.

My question was: Is it possible to model an LVDS buffer by controlling both
vcm and vod?

Please correct me if I'm wrong. Thanks.

Best Regards, 
  
Shee Kian Wong 
Applications Engineer, 
Altera Corporation (M) Sdn. Bhd. 

- -----Original Message-----
From: Hegazy, Hazem [mailto:[email-masked]] 
Sent: Wednesday, August 28, 2002 4:45 PM
To: 'Shee Kian Wong'; [email-masked]
Subject: RE: [IBIS-Users] LVDS modeling method 

Hi,

 Could please clarify the question? The common mode voltage is very
important for the model generation and which method to use. While the Vod is
a model parameter and you can even put it in the model after finishing all
current/wave form tables.

Hazem Hegazy 

- -----Original Message-----
From: Shee Kian Wong [mailto:[email-masked]]
Sent: Wednesday, August 28, 2002 10:40 AM
To: [email-masked]
Subject: [IBIS-Users] LVDS modeling method 

Hi all,

I've seen a lot of LVDS modeling methods only take care of vos (output
offset voltage) or vcm (common mode voltage).

But how come very seldom people make use of vod (output differential
voltage)? Isn't as important as other parameters?

Please advice.

Best Regards,

Shee Kian Wong

Applications Engineer,

Altera Corporation (M) Sdn. Bhd.

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<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Hi,</span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>&nbsp;</span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Thanks for your interest. Sorry for not specifying my
question clearly. </span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>&nbsp;</span></font></p>

<p class=MsoNormal style='text-autospace:none'><font size=2 face=Arial><span
style='font-size:10.0pt;font-family:Arial'>The LVDS standard specifies a
differential output voltage range of 0.25V &lt; Vod &lt; 0.45V. Also, the terms
&quot;common-mode voltage&quot; and &quot;offset voltage&quot; refer to the
average of A and B (the outputs of the driver), (A +B)/2. And LVDS has a
typical output common-mode voltage of 1.25 V. This simply means that A+B=2.5.</span></font></p>

<p class=MsoNormal style='text-autospace:none'><font size=2 face=Arial><span
style='font-size:10.0pt;font-family:Arial'>&nbsp;</span></font></p>

<p class=MsoNormal style='text-autospace:none'><font size=2 face=Arial><span
style='font-size:10.0pt;font-family:Arial'>Let say if one output is at 1.5V
(during sweeping of an external voltage source), the other output will try to
achieve 1V so as to maintain a fixed Vcm. However, Vod is now 500mV which is
out of the Vod range. When one output is -2V, the other one will be 4.5V, which
consequently giving rise to a Vod of 6500mV. This should not be the behavior of
an LVDS buffer.</span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>&nbsp;</span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>My question was: Is it possible to model an LVDS buffer by
controlling both vcm and vod?</span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>&nbsp;</span></font></p>

<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Please correct me if I'm wrong. Thanks.</span></font></p>

<p class=MsoNormal><font size=2 color=blue face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:blue'>&nbsp;</span></font></p>

<div>

<p><font size=2 color=blue face=Arial><span style='font-size:10.0pt;font-family:
Arial;color:blue'>Best Regards,</span></font><font color=blue><span
style='color:blue'> <br>
</span></font><font size=1 color=blue face=Arial><span style='font-size:7.5pt;
font-family:Arial;color:blue'>&nbsp;</span></font><font color=blue><span
style='color:blue'> <br>
</span></font><b><i><font size=2 color=blue face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:blue;font-weight:bold;font-style:italic'>Shee
Kian<u> Wong</u></span></font></i></b><font color=blue><span style='color:blue'>
<br>
</span></font><font size=2 color=blue face=Arial><span style='font-size:10.0pt;
font-family:Arial;color:blue'>Applications Engineer,</span></font><font
color=blue><span style='color:blue'> <br>
</span></font><font size=2 color=blue face=Arial><span style='font-size:10.0pt;
font-family:Arial;color:blue'>Altera Corporation (M) Sdn. Bhd.</span></font><font
color=blue><span style='color:blue'> </span></font></p>

</div>

<p class=MsoNormal style='margin-left:.5in'><font size=2 face=Tahoma><span
style='font-size:10.0pt;font-family:Tahoma'>-----Original Message-----<br>
<b><span style='font-weight:bold'>From:</span></b> Hegazy, Hazem
[mailto:[email-masked]] <br>
<b><span style='font-weight:bold'>Sent:</span></b> Wednesday, August 28, 2002
4:45 PM<br>
<b><span style='font-weight:bold'>To:</span></b> 'Shee Kian Wong'; </span></font><font
 size=2 face=Tahoma><span style='font-size:10.0pt;font-family:Tahoma'>[email-masked]</span></font><font
size=2 face=Tahoma><span style='font-size:10.0pt;font-family:Tahoma'><br>
<b><span style='font-weight:bold'>Subject:</span></b> RE: [IBIS-Users] LVDS
modeling method </span></font></p>

<p class=MsoNormal style='margin-left:.5in'><font size=3 face="Times New Roman"><span
style='font-size:12.0pt'>&nbsp;</span></font></p>

<div>

<p class=MsoNormal style='margin-left:.5in'><font size=2 color=blue face=Arial><span
style='font-size:10.0pt;font-family:Arial;color:blue'>Hi,</span></font></p>

</div>

<div>

<p class=MsoNormal style='margin-left:.5in'><font size=3 face="Times New Roman"><span
style='font-size:12.0pt'>&nbsp;</span></font></p>

</div>

<div>

<p class=MsoNormal style='margin-left:.5in'><font size=2 color=blue face=Arial><span
style='font-size:10.0pt;font-family:Arial;color:blue'>&nbsp;Could please
clarify the question? The common mode voltage is very important for the model
generation and which method to use. While the Vod is a model parameter and you
can even put it in the model after finishing all current/wave form tables.</span></font></p>

</div>

<div>

<p class=MsoNormal style='margin-left:.5in'><font size=3 face="Times New Roman"><span
style='font-size:12.0pt'>&nbsp;</span></font></p>

</div>

<p style='margin-left:.5in'><font size=4 color=blue face="Monotype Corsiva"><span
style='font-size:13.5pt;font-family:"Monotype Corsiva";color:blue'>Hazem Hegazy</span></font>
</p>

<blockquote style='margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt'>

<p class=MsoNormal style='margin-right:0in;margin-bottom:12.0pt;margin-left:
.5in'><font size=2 face=Tahoma><span style='font-size:10.0pt;font-family:Tahoma'>-----Original
Message-----<br>
<b><span style='font-weight:bold'>From:</span></b> Shee Kian Wong
[mailto:[email-masked]]<br>
<b><span style='font-weight:bold'>Sent:</span></b> Wednesday, August 28, 2002
10:40 AM<br>
<b><span style='font-weight:bold'>To:</span></b> [email-masked]<br>
<b><span style='font-weight:bold'>Subject:</span></b> [IBIS-Users] LVDS
modeling method </span></font></p>

<p style='margin-left:.5in'><font size=2 face=Arial><span style='font-size:
10.0pt;font-family:Arial'>Hi all,</span></font></p>

<p style='margin-left:.5in'><font size=2 face=Arial><span style='font-size:
10.0pt;font-family:Arial'>I've seen a lot of LVDS modeling methods only take
care of vos (output offset voltage) or vcm (common mode voltage).</span></font></p>

<p style='margin-left:.5in'><font size=2 face=Arial><span style='font-size:
10.0pt;font-family:Arial'>But how come very seldom people make use of</span></font>
<font size=2 face=Arial><span style='font-size:10.0pt;font-family:Arial'>vod</span></font>
<font size=2 face=Arial><span style='font-size:10.0pt;font-family:Arial'>(output
differential voltage)?</span></font> <font size=2 face=Arial><span
style='font-size:10.0pt;font-family:Arial'>Isn't as important</span></font> <font
size=2 face=Arial><span style='font-size:10.0pt;font-family:Arial'>as other
parameters?</span></font></p>

<p style='margin-left:.5in'><font size=2 face=Arial><span style='font-size:
10.0pt;font-family:Arial'>Please advice.</span></font></p>

<p class=MsoNormal style='margin-left:.5in'><font size=3 face="Times New Roman"><span
style='font-size:12.0pt'>&nbsp;</span></font></p>

<p style='margin-left:.5in'><font size=2 color=blue face=Arial><span
style='font-size:10.0pt;font-family:Arial;color:blue'>Best Regards,</span></font></p>

<p style='margin-left:.5in'><font size=1 color=blue face=Arial><span
style='font-size:7.5pt;font-family:Arial;color:blue'>&nbsp;</span></font></p>

<p style='margin-left:.5in'><b><i><font size=2 color=blue face=Arial><span
style='font-size:10.0pt;font-family:Arial;color:blue;font-weight:bold;
font-style:italic'>Shee Kian</span></font><u> </u></i></b><b><i><u><font
size=2 color=blue face=Arial><span style='font-size:10.0pt;font-family:Arial;
color:blue;font-weight:bold;font-style:italic'>Wong</span></font></u></i></b></p>

<p style='margin-left:.5in'><font size=2 color=blue face=Arial><span
style='font-size:10.0pt;font-family:Arial;color:blue'>Applications Engineer,</span></font></p>

<p style='margin-left:.5in'><font size=2 color=blue face=Arial><span
style='font-size:10.0pt;font-family:Arial;color:blue'>Altera Corporation (M)
Sdn. Bhd.</span></font></p>

</blockquote>

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------------------------------

Date: Wed, 28 Aug 2002 12:51:49 +0300
From: "Hegazy, Hazem" <[email-masked]>
Subject: RE: [IBIS-Users] LVDS modeling method 

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First, I modeled LVDS buffer has a voltage swing of 800mV !!. This happened
not only once.
Second, The Vod of a LVDS buffer between 0.25V and  0.45V is at standard
loads. The no load or capacitive load conditions might give higher swings.
In your example of A= -2V then B=4.5V, This is not the dc conditions (Steady
state) This assumed to happen in transient. Over/under shoots are the reason
here to model the buffer in these voltage ranges.
 
BR,

Hazem Hegazy 
Development Engineer 
IBIS & TAU Modeling Team 
Mentor Graphics 
Tel: +20(2) 4135458 
Mobile: +20(10) 6052154 
Fax: +20(2) 4141306 

- -----Original Message-----
From: Shee Kian Wong [mailto:[email-masked]]
Sent: Wednesday, August 28, 2002 12:34 PM
To: Hegazy, Hazem; [email-masked]
Subject: RE: [IBIS-Users] LVDS modeling method 

Hi,

Thanks for your interest. Sorry for not specifying my question clearly. 

The LVDS standard specifies a differential output voltage range of 0.25V <
Vod < 0.45V. Also, the terms "common-mode voltage" and "offset voltage"
refer to the average of A and B (the outputs of the driver), (A +B)/2. And
LVDS has a typical output common-mode voltage of 1.25 V. This simply means
that A+B=2.5.

Let say if one output is at 1.5V (during sweeping of an external voltage
source), the other output will try to achieve 1V so as to maintain a fixed
Vcm. However, Vod is now 500mV which is out of the Vod range. When one
output is -2V, the other one will be 4.5V, which consequently giving rise to
a Vod of 6500mV. This should not be the behavior of an LVDS buffer.

My question was: Is it possible to model an LVDS buffer by controlling both
vcm and vod?

Please correct me if I'm wrong. Thanks.

Best Regards, 
  
Shee Kian Wong 
Applications Engineer, 
Altera Corporation (M) Sdn. Bhd. 

- -----Original Message-----
From: Hegazy, Hazem [mailto:[email-masked]] 
Sent: Wednesday, August 28, 2002 4:45 PM
To: 'Shee Kian Wong'; [email-masked]
Subject: RE: [IBIS-Users] LVDS modeling method 

Hi,

 Could please clarify the question? The common mode voltage is very
important for the model generation and which method to use. While the Vod is
a model parameter and you can even put it in the model after finishing all
current/wave form tables.

Hazem Hegazy 

- -----Original Message-----
From: Shee Kian Wong [mailto:[email-masked]]
Sent: Wednesday, August 28, 2002 10:40 AM
To: [email-masked]
Subject: [IBIS-Users] LVDS modeling method 

Hi all,

I've seen a lot of LVDS modeling methods only take care of vos (output
offset voltage) or vcm (common mode voltage).

But how come very seldom people make use of vod (output differential
voltage)? Isn't as important as other parameters?

Please advice.

Best Regards,

Shee Kian Wong

Applications Engineer,

Altera Corporation (M) Sdn. Bhd.

- ------_=_NextPart_001_01C24E78.8732761D
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<BODY lang=EN-US link=blue vLink=purple>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=406354909-28082002>First, 
I modeled LVDS buffer has a voltage swing of 800mV !!. This happened not only 
once.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=406354909-28082002>Second, The Vod of a LVDS buffer between 0.25V 
and&nbsp; 0.45V is at standard loads. The no load or capacitive load conditions 
might give higher swings.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=406354909-28082002>In 
your example of A= -2V then B=4.5V, This is not the dc conditions (Steady state) 
This assumed to happen in transient. Over/under shoots are the reason here to 
model the buffer in these voltage ranges.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=406354909-28082002></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=406354909-28082002>BR,</SPAN></FONT></DIV>
<DIV>&nbsp;</DIV>
<P><FONT color=#0000ff face="Monotype Corsiva" size=4>Hazem Hegazy</FONT> 
<BR><FONT face="Times New Roman" size=4>Development Engineer</FONT> <BR><FONT 
face="Times New Roman" size=4>IBIS &amp; TAU Modeling Team</FONT> <BR><FONT 
color=#ff0000 face="Times New Roman" size=4>Mentor Graphics</FONT> <BR><FONT 
color=#000000 face="Times New Roman">Tel: +20(2) 4135458</FONT> <BR><FONT 
color=#000000 face="Times New Roman">Mobile: +20(10) 6052154</FONT> <BR><FONT 
color=#000000 face="Times New Roman">Fax: +20(2) 4141306</FONT> </P>
<BLOCKQUOTE style="MARGIN-RIGHT: 0px">
  <DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma 
  size=2>-----Original Message-----<BR><B>From:</B> Shee Kian Wong 
  [mailto:[email-masked]]<BR><B>Sent:</B> Wednesday, August 28, 2002 12:34 
  PM<BR><B>To:</B> Hegazy, Hazem; [email-masked]<BR><B>Subject:</B> RE: 
  [IBIS-Users] LVDS modeling method <BR><BR></DIV></FONT>
  <DIV class=Section1>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Hi,</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Thanks for your interest. Sorry 
  for not specifying my question clearly. </SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">The LVDS standard specifies a 
  differential output voltage range of 0.25V &lt; Vod &lt; 0.45V. Also, the 
  terms "common-mode voltage" and "offset voltage" refer to the average of A and 
  B (the outputs of the driver), (A +B)/2. And LVDS has a typical output 
  common-mode voltage of 1.25 V. This simply means that 
  A+B=2.5.</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Let say if one output is at 1.5V 
  (during sweeping of an external voltage source), the other output will try to 
  achieve 1V so as to maintain a fixed Vcm. However, Vod is now 500mV which is 
  out of the Vod range. When one output is -2V, the other one will be 4.5V, 
  which consequently giving rise to a Vod of 6500mV. This should not be the 
  behavior of an LVDS buffer.</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">My question was: Is it possible to 
  model an LVDS buffer by controlling both vcm and vod?</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;</SPAN></FONT></P>
  <P class=MsoNormal><FONT face=Arial size=2><SPAN 
  style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Please correct me if I'm wrong. 
  Thanks.</SPAN></FONT></P>
  <P class=MsoNormal><FONT color=blue face=Arial size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;</SPAN></FONT></P>
  <DIV>
  <P><FONT color=blue face=Arial size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Best 
  Regards,</SPAN></FONT><FONT color=blue><SPAN style="COLOR: blue"> 
  <BR></SPAN></FONT><FONT color=blue face=Arial size=1><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 7.5pt">&nbsp;</SPAN></FONT><FONT 
  color=blue><SPAN style="COLOR: blue"> <BR></SPAN></FONT><B><I><FONT color=blue 
  face=Arial size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt; FONT-STYLE: italic; FONT-WEIGHT: bold">Shee 
  Kian<U> Wong</U></SPAN></FONT></I></B><FONT color=blue><SPAN 
  style="COLOR: blue"> <BR></SPAN></FONT><FONT color=blue face=Arial 
  size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Applications 
  Engineer,</SPAN></FONT><FONT color=blue><SPAN style="COLOR: blue"> 
  <BR></SPAN></FONT><FONT color=blue face=Arial size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Altera Corporation 
  (M) Sdn. Bhd.</SPAN></FONT><FONT color=blue><SPAN style="COLOR: blue"> 
  </SPAN></FONT></P></DIV>
  <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT face=Tahoma size=2><SPAN 
  style="FONT-FAMILY: Tahoma; FONT-SIZE: 10pt">-----Original 
  Message-----<BR><B><SPAN style="FONT-WEIGHT: bold">From:</SPAN></B> Hegazy, 
  Hazem [mailto:[email-masked]] <BR><B><SPAN 
  style="FONT-WEIGHT: bold">Sent:</SPAN></B> Wednesday, August 28, 2002 4:45 
  PM<BR><B><SPAN style="FONT-WEIGHT: bold">To:</SPAN></B> 'Shee Kian Wong'; 
  </SPAN></FONT><FONT face=Tahoma size=2><SPAN 
  style="FONT-FAMILY: Tahoma; FONT-SIZE: 10pt">[email-masked]</SPAN></FONT><FONT 
  face=Tahoma size=2><SPAN 
  style="FONT-FAMILY: Tahoma; FONT-SIZE: 10pt"><BR><B><SPAN 
  style="FONT-WEIGHT: bold">Subject:</SPAN></B> RE: [IBIS-Users] LVDS modeling 
  method </SPAN></FONT></P>
  <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT face="Times New Roman" 
  size=3><SPAN style="FONT-SIZE: 12pt">&nbsp;</SPAN></FONT></P>
  <DIV>
  <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT color=blue face=Arial 
  size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Hi,</SPAN></FONT></P></DIV>
  <DIV>
  <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT face="Times New Roman" 
  size=3><SPAN style="FONT-SIZE: 12pt">&nbsp;</SPAN></FONT></P></DIV>
  <DIV>
  <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT color=blue face=Arial 
  size=2><SPAN 
  style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">&nbsp;Could please 
  clarify the question? The common mode voltage is very important for the model 
  generation and which method to use. While the Vod is a model parameter and you 
  can even put it in the model after finishing all current/wave form 
  tables.</SPAN></FONT></P></DIV>
  <DIV>
  <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT face="Times New Roman" 
  size=3><SPAN style="FONT-SIZE: 12pt">&nbsp;</SPAN></FONT></P></DIV>
  <P style="MARGIN-LEFT: 0.5in"><FONT color=blue face="Monotype Corsiva" 
  size=4><SPAN 
  style="COLOR: blue; FONT-FAMILY: 'Monotype Corsiva'; FONT-SIZE: 13.5pt">Hazem 
  Hegazy</SPAN></FONT> </P>
  <BLOCKQUOTE style="MARGIN-BOTTOM: 5pt; MARGIN-RIGHT: 0in; MARGIN-TOP: 5pt">
    <P class=MsoNormal 
    style="MARGIN-BOTTOM: 12pt; MARGIN-LEFT: 0.5in; MARGIN-RIGHT: 0in"><FONT 
    face=Tahoma size=2><SPAN 
    style="FONT-FAMILY: Tahoma; FONT-SIZE: 10pt">-----Original 
    Message-----<BR><B><SPAN style="FONT-WEIGHT: bold">From:</SPAN></B> Shee 
    Kian Wong [mailto:[email-masked]]<BR><B><SPAN 
    style="FONT-WEIGHT: bold">Sent:</SPAN></B> Wednesday, August 28, 2002 10:40 
    AM<BR><B><SPAN style="FONT-WEIGHT: bold">To:</SPAN></B> 
    [email-masked]<BR><B><SPAN 
    style="FONT-WEIGHT: bold">Subject:</SPAN></B> [IBIS-Users] LVDS modeling 
    method </SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT face=Arial size=2><SPAN 
    style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Hi all,</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT face=Arial size=2><SPAN 
    style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">I've seen a lot of LVDS modeling 
    methods only take care of vos (output offset voltage) or vcm (common mode 
    voltage).</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT face=Arial size=2><SPAN 
    style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">But how come very seldom people 
    make use of</SPAN></FONT> <FONT face=Arial size=2><SPAN 
    style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">vod</SPAN></FONT> <FONT 
    face=Arial size=2><SPAN style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">(output 
    differential voltage)?</SPAN></FONT> <FONT face=Arial size=2><SPAN 
    style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Isn't as important</SPAN></FONT> 
    <FONT face=Arial size=2><SPAN style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">as 
    other parameters?</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT face=Arial size=2><SPAN 
    style="FONT-FAMILY: Arial; FONT-SIZE: 10pt">Please advice.</SPAN></FONT></P>
    <P class=MsoNormal style="MARGIN-LEFT: 0.5in"><FONT face="Times New Roman" 
    size=3><SPAN style="FONT-SIZE: 12pt">&nbsp;</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT color=blue face=Arial size=2><SPAN 
    style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Best 
    Regards,</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT color=blue face=Arial size=1><SPAN 
    style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 7.5pt">&nbsp;</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><B><I><FONT color=blue face=Arial size=2><SPAN 
    style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt; FONT-STYLE: italic; FONT-WEIGHT: bold">Shee 
    Kian</SPAN></FONT><U> </U></I></B><B><I><U><FONT color=blue face=Arial 
    size=2><SPAN 
    style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt; FONT-STYLE: italic; FONT-WEIGHT: bold">Wong</SPAN></FONT></U></I></B></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT color=blue face=Arial size=2><SPAN 
    style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Applications 
    Engineer,</SPAN></FONT></P>
    <P style="MARGIN-LEFT: 0.5in"><FONT color=blue face=Arial size=2><SPAN 
    style="COLOR: blue; FONT-FAMILY: Arial; FONT-SIZE: 10pt">Altera Corporation 
    (M) Sdn. Bhd.</SPAN></FONT></P></BLOCKQUOTE></DIV></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Wed, 28 Aug 2002 22:09:06 +0630
From: [email-masked]
Subject: [IBIS-Users] HSPICE(.rlc/.sp) files

Hi All,

I have some package model information in the following formats

     Format: HSPICE W Element (.rlc)
     Format: HSPICE (.sp)

I'm using XTK/ScratchPad from Innoveda for SI analysis.

I would like to know the method to include the package files in HSPICE format
along with the IBIS buffer model of the component,
in the topology created in ScratchPad/XTK

Or

Is there a conversion tool available to convert HSPICE model into IBIS/QUAD
format (input format for XTK).
Can anyone please suggest a method to include the package model information?

Thanking you in advance

Thanks & Regards
Suchitha,

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------------------------------

Date: Thu, 29 Aug 2002 10:34:33 +0530
From: Nirav Patel <[email-masked]>
Subject: [IBIS-Users] IBIS issue at high frequencies

IBIS gurus,

We are using Avanti HSPICE to correlate the IBIS 
model performance to spice. We notice that the model 
starts misbehaving abruptly as we increase the toggle 
rate.

Our observation has been that the onset of this
misbehavior is a function of the delay through the
buffer. Buffers that have long propagation delays
tend to misbehave at lower toggle rates.

Does anybody have a clue on what may be the cause
of this issue? Any help will be very much appreciated.

Thanks in advance.

- --Nirav
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------------------------------

Date: Thu, 29 Aug 2002 11:09:13 +0300
From: "Hegazy, Hazem" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS issue at high frequencies

This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.

- ------_=_NextPart_001_01C24F33.2847DCA1
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Hi,
Should I ask at which rate or rise/fall time you generate the model? I mean,
the stimulus of the input side while extracting wave form tables is it fast
or slow compared to the tested frequency?

BR,

Hazem Hegazy
Development Engineer
IBIS & TAU Modeling Team
Mentor Graphics
Tel: +20(2) 4135458
Mobile: +20(10) 6052154
Fax: +20(2) 4141306

- -----Original Message-----
From: Nirav Patel [mailto:[email-masked]]
Sent: Thursday, August 29, 2002 8:05 AM
To: [email-masked]; [email-masked]
Subject: [IBIS-Users] IBIS issue at high frequencies

IBIS gurus,

We are using Avanti HSPICE to correlate the IBIS 
model performance to spice. We notice that the model 
starts misbehaving abruptly as we increase the toggle 
rate.

Our observation has been that the onset of this
misbehavior is a function of the delay through the
buffer. Buffers that have long propagation delays
tend to misbehave at lower toggle rates.

Does anybody have a clue on what may be the cause
of this issue? Any help will be very much appreciated.

Thanks in advance.

- --Nirav
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
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charset=3DUS-ASCII">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2655.35">
<TITLE>RE: [IBIS-Users] IBIS issue at high frequencies</TITLE>
</HEAD>
<BODY>

<P><FONT SIZE=3D2>Hi,</FONT>
<BR><FONT SIZE=3D2>Should I ask at which rate or rise/fall time you =
generate the model? I mean, the stimulus of the input side while =
extracting wave form tables is it fast or slow compared to the tested =
frequency?</FONT></P>

<P><FONT SIZE=3D2>BR,</FONT>
</P>

<P><FONT SIZE=3D2>Hazem Hegazy</FONT>
<BR><FONT SIZE=3D2>Development Engineer</FONT>
<BR><FONT SIZE=3D2>IBIS &amp; TAU Modeling Team</FONT>
<BR><FONT SIZE=3D2>Mentor Graphics</FONT>
<BR><FONT SIZE=3D2>Tel: +20(2) 4135458</FONT>
<BR><FONT SIZE=3D2>Mobile: +20(10) 6052154</FONT>
<BR><FONT SIZE=3D2>Fax: +20(2) 4141306</FONT>
</P>
<BR>

<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Nirav Patel [<A =
HREF=3D"mailto:[email-masked]">mailto:[email-masked]</A>]</FONT>
<BR><FONT SIZE=3D2>Sent: Thursday, August 29, 2002 8:05 AM</FONT>
<BR><FONT SIZE=3D2>To: [email-masked]; [email-masked]</FONT>
<BR><FONT SIZE=3D2>Subject: [IBIS-Users] IBIS issue at high =
frequencies</FONT>
</P>
<BR>

<P><FONT SIZE=3D2>IBIS gurus,</FONT>
</P>

<P><FONT SIZE=3D2>We are using Avanti HSPICE to correlate the IBIS =
</FONT>
<BR><FONT SIZE=3D2>model performance to spice. We notice that the model =
</FONT>
<BR><FONT SIZE=3D2>starts misbehaving abruptly as we increase the =
toggle </FONT>
<BR><FONT SIZE=3D2>rate.</FONT>
</P>

<P><FONT SIZE=3D2>Our observation has been that the onset of =
this</FONT>
<BR><FONT SIZE=3D2>misbehavior is a function of the delay through =
the</FONT>
<BR><FONT SIZE=3D2>buffer. Buffers that have long propagation =
delays</FONT>
<BR><FONT SIZE=3D2>tend to misbehave at lower toggle rates.</FONT>
</P>

<P><FONT SIZE=3D2>Does anybody have a clue on what may be the =
cause</FONT>
<BR><FONT SIZE=3D2>of this issue? Any help will be very much =
appreciated.</FONT>
</P>

<P><FONT SIZE=3D2>Thanks in advance.</FONT>
</P>

<P><FONT SIZE=3D2>--Nirav</FONT>
<BR><FONT =
SIZE=3D2>|--------------------------------------------------------------=
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------------------------------

Date: Thu, 29 Aug 2002 12:46:33 +0200
From: [email-masked]
Subject: RE: [IBIS-Users] IBIS issue at high frequencies

Hi Nirav,

I am not quite sure that you have the same problem as I had with Avanti HSpice a little while ago. I encountered funny effects when a buffer was switched before the end of a waveform was reached, e.g. if a waveform was 1.2ns long but I swiched/toggled the buffer again after less than 1.2ns. I got spikes in the transient analysis. These went away when I toggled the buffer at (1.2+ x)ns.

When I create IBIS models I now make sure that the waveforms are shorter than the fastest bit period the part is intended to run at. I do that by cutting the lead-in time (in a consistent manner for all corners). Below is an excerpt of a conversation that I had with an IBIS model user:

> I believe that the downward spike has to do with the way 
> HSpice interprets the IBIS model.
> 
> The downspike only occurs when the bit pattern is very short 
> and the simulator jumps straight from the falling waveform of 
> the IBIS file to the rising waveform. Why this creates a spike 
> is a mystery to me at the moment, as the curves nicely match up. 
> It does not occur in the Ones either, only in the Zeros.
>
> I was able to fix it by shortening the falling and rising 
> waveforms so that the simulator is forced to use the static 
> pullup/pulldown curves before it invokes another waveform. 

This effect may well depend on the version of HSpice.

I hope this helps,

Best Regards,

	Herbert.

- -----Original Message-----
From: Nirav Patel [mailto:[email-masked]]
Sent: 29 August 2002 07:05
To: [email-masked]; [email-masked]
Subject: [IBIS-Users] IBIS issue at high frequencies

IBIS gurus,

We are using Avanti HSPICE to correlate the IBIS 
model performance to spice. We notice that the model 
starts misbehaving abruptly as we increase the toggle 
rate.

Our observation has been that the onset of this
misbehavior is a function of the delay through the
buffer. Buffers that have long propagation delays
tend to misbehave at lower toggle rates.

Does anybody have a clue on what may be the cause
of this issue? Any help will be very much appreciated.

Thanks in advance.

- --Nirav
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------------------------------

Date: Thu, 29 Aug 2002 17:03:55 +0530
From: Nirav Patel <[email-masked]>
Subject: Re: [IBIS-Users] IBIS issue at high frequencies

Hazem Hegazy,

Thanks for your suggestions. I made rise/fall time same as test
frequency but problem remained same. Million thanks to Herbert.
I had same problem as he described, before following his suggestions. 

Thanks,
Nirav
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------------------------------

Date: Thu, 29 Aug 2002 17:02:43 -0400
From: "Todd Westerhoff" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS issue at high frequencies

If you attempt to switch the buffer before the end of the V-T curve sweep,
then you have an abrupt change in the buffer's output state.  The buffer
jumps from the point on the transient curve that was switching to the start
point on the curve you are transitioning to.

You'll see the same problem at any frequency if the DC settling points of
the rise and fall curves are different.  If your rise curve settles at 2.5V
(as an example), and the corresponding fall curve starts at 2.3V, then there
will be an abrupt change (and "spike")at the start of the falling edge.

Bottom line: Herbert is right - attempting to switch an IBIS buffer before
it finishes the V-T sweep can cause weird problems.  Because each
simulator's IBIS implementation is a bit different, the problems you will
see can vary.

IBIS models weren't meant to model inertial delays, and they don't ...

Todd.

Todd Westerhoff
Signal Integrity Engineer
Cisco Systems
250 Apollo Drive - Chelmsford, MA - 01824
email:[email-masked]
ph: 978-497-0272
============================================

"When did the choices get so hard, with so much more at stake?
 Life gets mighty precious when there's less of it to waste"

- - Bonnie Raitt, "Nick of Time"

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On
Behalf Of [email-masked]
Sent: Thursday, August 29, 2002 6:47 AM
To: [email-masked]; [email-masked]
Subject: RE: [IBIS-Users] IBIS issue at high frequencies

Hi Nirav,

I am not quite sure that you have the same problem as I had with Avanti
HSpice a little while ago. I encountered funny effects when a buffer was
switched before the end of a waveform was reached, e.g. if a waveform was
1.2ns long but I swiched/toggled the buffer again after less than 1.2ns. I
got spikes in the transient analysis. These went away when I toggled the
buffer at (1.2+ x)ns.

When I create IBIS models I now make sure that the waveforms are shorter
than the fastest bit period the part is intended to run at. I do that by
cutting the lead-in time (in a consistent manner for all corners). Below is
an excerpt of a conversation that I had with an IBIS model user:

> I believe that the downward spike has to do with the way
> HSpice interprets the IBIS model.
>
> The downspike only occurs when the bit pattern is very short
> and the simulator jumps straight from the falling waveform of
> the IBIS file to the rising waveform. Why this creates a spike
> is a mystery to me at the moment, as the curves nicely match up.
> It does not occur in the Ones either, only in the Zeros.
>
> I was able to fix it by shortening the falling and rising
> waveforms so that the simulator is forced to use the static
> pullup/pulldown curves before it invokes another waveform.

This effect may well depend on the version of HSpice.

I hope this helps,

Best Regards,

	Herbert.

- -----Original Message-----
From: Nirav Patel [mailto:[email-masked]]
Sent: 29 August 2002 07:05
To: [email-masked]; [email-masked]
Subject: [IBIS-Users] IBIS issue at high frequencies

IBIS gurus,

We are using Avanti HSPICE to correlate the IBIS
model performance to spice. We notice that the model
starts misbehaving abruptly as we increase the toggle
rate.

Our observation has been that the onset of this
misbehavior is a function of the delay through the
buffer. Buffers that have long propagation delays
tend to misbehave at lower toggle rates.

Does anybody have a clue on what may be the cause
of this issue? Any help will be very much appreciated.

Thanks in advance.

- --Nirav
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------------------------------

Date: Fri, 6 Sep 2002 12:27:35 -0500 
From: "Haque, Moshiul" <[email-masked]>
Subject: [IBIS-Users] IBIS model for FET switch

IBIS Gurus,
I am trying to model a switch with parallel NMOS and PMOS. I am kind of
confused about the description of Series Mosfet keyword in IBIS Version 4
specification. The description says that either of the FET's could be
removed. Thus this model covers all four conditions , off, single NMOS,
single PMOS and parallel NMOS/PMOS. 

1) Does that mean that I have to model NMOS, PMOS and off condition
separately? Or only one Series Mosfet keyword with different VDS is
sufficient to model the switch.
2) How to model the off condition? I thought to model off condition series
current keyword with off sub parameter is necessary.
3) What would be appropriate keyword to model parallel FET switches, series
current or series mosfet?

I have tried to model the switch with series switch keyword. One problem
with this type of model is the error generated due to decreasing current. In
the IBISCHK3.2.9 version the error has been changed to warning. But lot of
the simulator uses the older version of IBISCHK and my concern is that will
this error prevent the simulator from simulating? 

Appreciate any suggestions.

Regards
Moshiul Haque	             
Standard Linear and Logic Marketing
Texas Instruments Incorporated                
Ph: (903) 868-7153          	        
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------------------------------

Date: Fri, 06 Sep 2002 11:57:00 -0700
From: "Ross, Bob" <[email-masked]>
Subject: Re: [IBIS-Users] IBIS model for FET switch

Moshiul:

Some responses are below in your text.

Bob Ross
Mentor Graphics

"Haque, Moshiul" wrote:
> 
> IBIS Gurus,
> I am trying to model a switch with parallel NMOS and PMOS. I am kind of
> confused about the description of Series Mosfet keyword in IBIS Version 4
> specification. The description says that either of the FET's could be
> removed. Thus this model covers all four conditions , off, single NMOS,
> single PMOS and parallel NMOS/PMOS.
> 
> 1) Does that mean that I have to model NMOS, PMOS and off condition
> separately?

No, do the I-V extraction on the total switch for a given Vgs.

Or only one Series Mosfet keyword with different VDS is
> sufficient to model the switch.

Yes.

> 2) How to model the off condition? I thought to model off condition series
> current keyword with off sub parameter is necessary.

Actually the [Off] keyword is necessary.  Also, the Off subparameter
is normally listed in the [Series Switch Groups] table if a completely
off (High-Z or whatever) condition exists.

> 3) What would be appropriate keyword to model parallel FET switches, series
> current or series mosfet?

[Series MOSFET] since it captures some "across" impedance changes as a
function of actual input voltage at one terminal.

> 
> I have tried to model the switch with series switch keyword. One problem
> with this type of model is the error generated due to decreasing current. In
> the IBISCHK3.2.9 version the error has been changed to warning. But lot of
> the simulator uses the older version of IBISCHK and my concern is that will
> this error prevent the simulator from simulating?

No.  Most simulators will allow Warning messages, but will reject models
with Error messages.  Some Warnings are informational to alert the user
of some internal values or characteristics in an otherwise technically
correct model.  There might be philosophical arguments about allowing this,
but that is currently the reason some messages (such as large package
model values) exist.  The non-monotonic I-V characteristic is technically
correct, but some EDA tools might be limited.  So the Warning message
give some guidance to the user that this might be an issue.

> 
> Appreciate any suggestions.
> 
> Regards
> Moshiul Haque
> Standard Linear and Logic Marketing
> Texas Instruments Incorporated
> Ph: (903) 868-7153
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------------------------------

Date: Thu, 12 Sep 2002 18:17:48 -0700
From: Abdulrahman Rafiq <[email-masked]>
Subject: [IBIS-Users] Re: Question: Obtaining I/V and Switiching Info via lab measurments 

- --------------BD30FB5FF6B18916D029F6D9
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Dear Ibis users,

Could some explain how one would go about extracting data for ibis
models via lab measurments?  Is there a document which describes the
ibis model creation via lab measurment in detail ?

Thanks,

Abdulrahman rafiq
[email-masked]

- --
- ---------------------------------------------------------------------------
      |           |             Abdulrahman A. Rafiq
     :|:         :|:            Hardware Engineer
    :|||:       :|||:           HSS Engineering Services, (ISBU)
 .:|||||||:...:|||||||:.        Direct: (408) 527-5540
 c i s c o S y s t e m s        Fax   : (408) 526-6603
      www.cisco.com             email : [email-masked]
      800-250-4800              epage : [email-masked]
                                URL1  : http://wwwin-sipd.cisco.com
                                URL2  : http://wwwin-people.cisco.com/~arafiq
- -----------------------------------------------------------------------------

- --------------BD30FB5FF6B18916D029F6D9
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit

<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
Dear Ibis users,
<p>Could some explain how one would go about extracting data for ibis models
via lab measurments?&nbsp; Is there a document which describes the ibis
model creation via lab measurment in detail ?
<p>Thanks,
<p>Abdulrahman rafiq
<br>[email-masked]
<pre>--&nbsp;
- ---------------------------------------------------------------------------
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Abdulrahman A. Rafiq&nbsp;&nbsp;
&nbsp;&nbsp;&nbsp;&nbsp; :|:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; :|:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Hardware Engineer
&nbsp;&nbsp;&nbsp; :|||:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; :|||:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; HSS Engineering Services, (ISBU)
&nbsp;.:|||||||:...:|||||||:.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Direct: (408) 527-5540
&nbsp;c i s c o S y s t e m s&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Fax&nbsp;&nbsp; : (408) 526-6603
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; www.cisco.com&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; email : [email-masked]
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 800-250-4800&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; epage : [email-masked]
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; URL1&nbsp; : <A HREF="http://wwwin-sipd.cisco.com">http://wwwin-sipd.cisco.com</A>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; URL2&nbsp; : <A HREF="http://wwwin-people.cisco.com/~arafiq">http://wwwin-people.cisco.com/~arafiq</A>
- -----------------------------------------------------------------------------</pre>
&nbsp;</html>

- --------------BD30FB5FF6B18916D029F6D9--

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------------------------------

Date: Fri, 13 Sep 2002 19:00:28 +0530
From: [email-masked]
Subject: [IBIS-Users] need ibischk information

Hello,

   Can you tell me plase how our ibischk check our models or any document
regarding it. I got some errors during ibischk but unable to analyse it.

Regards
Akhilesh
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------------------------------

Date: Fri, 13 Sep 2002 08:32:12 -0700
From: "Peters, Stephen" <[email-masked]>
Subject: [IBIS-Users] Agenda, IBIS Open Forum Teleconference 9/20

		     IBIS Open Forum Meeting Agenda
			      for 9/20/02

		 Bridge Number    Reservation #   Passcode
             1-916-356-2663   2               0597966
             (International Dial-In: 1-617-801-9781)

All meetings are 8:00 AM to 9:55 AM Pacific Time.  When you call into the 
meeting, ask for the IBIS Open Forum hosted by Stephen Peters and give the
Reservation Number and Passcode.

8:00 Check-In, Intros, Announcements                         Peters

     - Intros of New IBIS Participants, Meeting Quorum       Peters
     - Call for Patents                                      Peters
     - Membership Update and Treasurers Report               Peters
     - Review of Previous Meeting's Minutes (and ARs)        Peters
     - Miscellany/Announcements                              All
     - Press & Web Page Updates                              Huq, All
     - New Models Available, Library Update                  Leventhal, All
     - Opens for New Issues                                  All

8:15 Administrative and Project Discussions

     International/External Progress
     - IEC 62014-3 (ICEM) Integrated Circuits Electromagnetic 
       Model Proposal (IEC 93/67/NP IBIS and EMC Simulation) Perrin/Peters

     PCB Conference East IBIS Summit Meeting Planning        Peters/Green
     - Teleconference Bridge

     IBIS Version 4.0 Activities                             Peters
     - Documents
     - Parser

     IBIS Quality Committee                                  Katz

     IBIS Model Review Committee                             Green

     New Administrative Issues                               All

8:45 Technical Discussion

     IBIS Connector and Futures Group Report                 Peters/Green

     BIRD74.1 - EMI Parameters                               de Burgh

     BIRD75.4 - Multi-Lingual IBIS Model Support             Ross/Muranyi
     BIRD77.1 - Differential Subparameter Additions          Ross

     BIRD78 - Comment Line Length Limit                      Green

     ibischk3 Status                                         Ross
     - BUG71 - Monotonic Checking for Combined I-V Tables    Haller
     - BUG73 - Extreme Non-Monotonic I-V Table Fails         Muranyi
               End-Point Test
     - BUG74 - Missing Timing Test Load Warning Messages     Haller
     - BUG75 - Successive EBD Checking Crashes Automated     Green

     New Technical Issues                                    All

9:50 Wrap Up and Next Meetings Plans                         Peters

9:55 Sign Off
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------------------------------

Date: Fri, 13 Sep 2002 14:02:50 -0400
From: Robert Haller <[email-masked]>
Subject: Re: [IBIS-Users] Re: Question: Obtaining I/V and Switiching Info via lab measurments

I would suggest to check the IBIS Accuracy Handbook.
http://www.eda.org/pub/ibis/accuracy/

Regards,
Bob Haller

Abdulrahman Rafiq wrote:
> Dear Ibis users,
> 
> Could some explain how one would go about extracting data for ibis 
> models via lab measurments?  Is there a document which describes the 
> ibis model creation via lab measurment in detail ?
> 
> Thanks,
> 
> Abdulrahman rafiq
> [email-masked]
> 
> -- 
> ---------------------------------------------------------------------------
>       |           |             Abdulrahman A. Rafiq  
>      :|:         :|:            Hardware Engineer
>     :|||:       :|||:           HSS Engineering Services, (ISBU)
>  .:|||||||:...:|||||||:.        Direct: (408) 527-5540
>  c i s c o S y s t e m s        Fax   : (408) 526-6603
>       www.cisco.com             email : [email-masked]
>       800-250-4800              epage : [email-masked]
>                                 URL1  : http://wwwin-sipd.cisco.com
>                                 URL2  : http://wwwin-people.cisco.com/~arafiq
> -----------------------------------------------------------------------------
> 
>  

- -- 
Robert J. Haller ([email-masked])
Principal Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 15

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------------------------------

Date: Sun, 15 Sep 2002 15:47:45 +0530
From: [email-masked]
Subject: [IBIS-Users] IBIS problem

Hello,
 I got one problem in my during ibischk

ERROR - Model BD2TARDQP_TC_40: The [Rising Waveform] 
      with [R_fixture]=50 Ohms and [V_fixture]=3.3V
      has TYP column DC endpoints of  2.44V and  3.30v, but
      an equivalent load applied to the model's I-V tables yields
      different voltages ( 2.30V and  3.30V)

   My cell's Rising Waveform have 2.44V & 3.30V dc end ponit but I am
unable to find out how IBISCHK got 2.30V & 3.30V DC end point.

   Can anyone tell me please how IBISCHK got DC endpoint.

Regards
Akhilesh
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------------------------------

Date: Sun, 15 Sep 2002 10:28:57 -0400
From: Kevin Fisher <[email-masked]>
Subject: Re: [IBIS-Users] IBIS problem

Akhilesh,

For each VT curve entry in a model, the IBIS parser will take the 
fixture circuit used for that VT curve and draw a load line representing 
the circuit against the IV curves of the same process corner. The DC 
endpoints found, which in your example were 2.30V and 3.30V, are 
determined as the intersection of the load line with the pullup (+ power 
clamp if I/O) and pulldown (+gnd clamp if I/O) IV curves. There are few 
possible causes for this descrepency, however in my experience, the most 
common reason was that the VT curves never reach the DC values. Either 
the VT curves simulation was not run long enough, or the extraction of 
the VT curves did not get the whole curve. I would first check the VT 
curves and see if it looks like they've reached DC.

Hope this helps.
Kevin

- -- 

Kevin M. Fisher
Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 11
http://www.sisoft.com

[email-masked] wrote:

>Hello,
> I got one problem in my during ibischk
>
>ERROR - Model BD2TARDQP_TC_40: The [Rising Waveform] 
>      with [R_fixture]=50 Ohms and [V_fixture]=3.3V
>      has TYP column DC endpoints of  2.44V and  3.30v, but
>      an equivalent load applied to the model's I-V tables yields
>      different voltages ( 2.30V and  3.30V)
>
>   My cell's Rising Waveform have 2.44V & 3.30V dc end ponit but I am
>unable to find out how IBISCHK got 2.30V & 3.30V DC end point.
>
>   Can anyone tell me please how IBISCHK got DC endpoint.
>
>Regards
>Akhilesh
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>  
>

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------------------------------

Date: Mon, 16 Sep 2002 14:41:49 +0530
From: Anshuli Goel <[email-masked]>
Subject: [IBIS-Users] s2ibis2 validity

Hi IBIS users

I am generating the IBIS models using s2ibis2 utility. I wanted to know
how much reliable is this utility in doing this and is there any way to
validate the models obtained from this utility.

Regards
Anshuli

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------------------------------

Date: Mon, 16 Sep 2002 08:18:54 -0400
From: Robert Haller <[email-masked]>
Subject: Re: [IBIS-Users] s2ibis2 validity

Anshuli,
	This utility works reasonably well after you come up the learning 
curve. A lot of companies create there own custom versions as well.

Once you have created an IBIS model, to validate the results, you
simply run both models (spice and IBIS) through your simulator of choice 
and compare the results.
regards,
bob

- -- 
Robert J. Haller ([email-masked])
Principal Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 15

Anshuli Goel wrote:
> Hi IBIS users
> 
> I am generating the IBIS models using s2ibis2 utility. I wanted to know
> how much reliable is this utility in doing this and is there any way to
> validate the models obtained from this utility.
> 
> Regards
> Anshuli
> 
> 
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------------------------------

Date: Mon, 16 Sep 2002 08:46:53 -0400
From: Peter LaFlamme <[email-masked]>
Subject: Re: [IBIS-Users] IBIS problem

Hi Akhilesh,
Based on the error you got I think that there are two possibilities that come up. First, because the endpoint that is causing the error is the starting point for the rising waveform. You may want to look at the plot of this waveform. It is possible that
the spice simulation has a strange starting point or you get a slight ringing on the output before the buffer switches. Secondly, it is possible that the load in your simulation is different than is specified. I think that this is probably not the case,
but you may want to look at the ".sp" file to see the actual loading.

If this is the only error, or warning that you got on the VT curves then I think that you will find that it is probably one of the above two possibilities. 

Good Luck,
Peter

P.s. If you want to send me the .ibs file I can take a quick look and see if I can see the discrepancy. 

[email-masked] wrote:
> 
> Hello,
>  I got one problem in my during ibischk
> 
> ERROR - Model BD2TARDQP_TC_40: The [Rising Waveform]
>       with [R_fixture]=50 Ohms and [V_fixture]=3.3V
>       has TYP column DC endpoints of  2.44V and  3.30v, but
>       an equivalent load applied to the model's I-V tables yields
>       different voltages ( 2.30V and  3.30V)
> 
>    My cell's Rising Waveform have 2.44V & 3.30V dc end ponit but I am
> unable to find out how IBISCHK got 2.30V & 3.30V DC end point.
> 
>    Can anyone tell me please how IBISCHK got DC endpoint.
> 
> Regards
> Akhilesh
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- -- 
Peter LaFlamme

Applied Micro Circuits Corp.
System Applications Engineer
200 Minuteman Rd, 3rd Floor
Andover, MA 01810

978-247-8470 phone
978-623-0055 Fax
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------------------------------

Date: Mon, 16 Sep 2002 09:59:45 -0400
From: "Mike LaBonte" <[email-masked]>
Subject: RE: [IBIS-Users] IBIS problem

Ibischk must have calculated the current to be 20mA, since
(3.3v - 2.30v) / 50ohms = 20mA. Since the initial endpoint
of a rising edge is examined here, the Pulldown I/V curve
must be drawing 20mA at 2.3V.

I am wondering if one of the clamp curves has significant
leakage current within the buffer operating range, and
ibischk is ignoring other curves in it's calculation.
Although a too-short simulation duration easily causes
mismatches at the final endpoint, it is unusual to see
the initial point come out wrong.

Mike LaBonte

- -----Original Message-----
From: [email-masked] [mailto:[email-masked]]On
Behalf Of [email-masked]
Sent: Sunday, September 15, 2002 6:18 AM
To: [email-masked]
Subject: [IBIS-Users] IBIS problem

Hello,
 I got one problem in my during ibischk

ERROR - Model BD2TARDQP_TC_40: The [Rising Waveform] 
      with [R_fixture]=50 Ohms and [V_fixture]=3.3V
      has TYP column DC endpoints of  2.44V and  3.30v, but
      an equivalent load applied to the model's I-V tables yields
      different voltages ( 2.30V and  3.30V)

   My cell's Rising Waveform have 2.44V & 3.30V dc end ponit but I am
unable to find out how IBISCHK got 2.30V & 3.30V DC end point.

   Can anyone tell me please how IBISCHK got DC endpoint.

Regards
Akhilesh
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------------------------------

Date: Mon, 16 Sep 2002 08:46:52 -0700 (PDT)
From: Syed Huq <[email-masked]>
Subject: Re: [IBIS-Users] s2ibis2 validity

Anshuli,

The reliability of the output data is based on how well the translation
setup was done. It is also based on the original SPICE models you are 
trying to translate. After all, you are simply getting the V/I and V/T 
output coming out of your spice simulation and formatting it to meet the 
IBIS standard.

So, review the IBIS model and validate the model on a simulator.

Syed

>Date: Mon, 16 Sep 2002 14:41:49 +0530
>From: Anshuli Goel <[email-masked]>
>X-Accept-Language: en
>MIME-Version: 1.0
>To: "[email-masked]" <[email-masked]>
>Subject: [IBIS-Users] s2ibis2 validity
>Content-Transfer-Encoding: 7bit
>
>Hi IBIS users
>
>I am generating the IBIS models using s2ibis2 utility. I wanted to know
>how much reliable is this utility in doing this and is there any way to
>validate the models obtained from this utility.
>
>Regards
>Anshuli
>
>

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------------------------------

Date: Tue, 17 Sep 2002 10:37:07 +0530 (IST)
From: S Jairam <[email-masked]>
Subject: [IBIS-Users] On IBIS Model Generation

Hi,

      This might sound very dumb a question, but I dont have an
answer to this. 

       When IBIS model generation for an IO buffer is in progress,
only one package load (a set of RLC parameters) is used to calculate
all the IV curves. Is that valid ? Because in such a case the
I-V curves of buffer would then be dependent of the package load. 

    Shouldn't it be that the calculation be done for various load
points with each load-point providing a set of I-V curves.

Please correct me if I am wrong.

Thanks and Regards,
Jairam.
- -- 
# S.Jairam,
# Texas Instruments Bangalore,
# E-Mail: [email-masked] 
# Phone : 080 5099 689
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------------------------------

Date: Mon, 16 Sep 2002 23:26:24 -0700
From: "Mohan, Prabhu" <[email-masked]>
Subject: RE: [IBIS-Users] On IBIS Model Generation

Hi Jairam,

The package parameters (RLC) are NOT taken into account while generating the
IBIS model. They are to be provided seperately to facilitate simulation
using other (SI) tools. 

Ragards
Prabhu/~

- -----Original Message-----
From: S Jairam [mailto:[email-masked]]
Sent: Monday, September 16, 2002 10:07 PM
To: [email-masked]
Subject: [IBIS-Users] On IBIS Model Generation

Hi,

      This might sound very dumb a question, but I dont have an
answer to this. 

       When IBIS model generation for an IO buffer is in progress,
only one package load (a set of RLC parameters) is used to calculate
all the IV curves. Is that valid ? Because in such a case the
I-V curves of buffer would then be dependent of the package load. 

    Shouldn't it be that the calculation be done for various load
points with each load-point providing a set of I-V curves.

Please correct me if I am wrong.

Thanks and Regards,
Jairam.
- -- 
# S.Jairam,
# Texas Instruments Bangalore,
# E-Mail: [email-masked] 
# Phone : 080 5099 689
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------------------------------

Date: Tue, 17 Sep 2002 12:18:19 +0530 (IST)
From: S Jairam <[email-masked]>
Subject: RE: [IBIS-Users] On IBIS Model Generation

Hi Prabhu,

Thanks for the answer. However the flavour of the question still
remains the same. The buffer drive will depend on the load (might not
just be the package load) that will be hooked up. Should not this
again be varied for generating the IBIS model ?

Thanks and Regards,
Jairam.

Mohan, Prabhu writes:
#Hi Jairam,
#
#The package parameters (RLC) are NOT taken into account while generating the
#IBIS model. They are to be provided seperately to facilitate simulation
#using other (SI) tools. 
#
#Ragards
#Prabhu/~
#
#-----Original Message-----
#From: S Jairam [mailto:[email-masked]]
#Sent: Monday, September 16, 2002 10:07 PM
#To: [email-masked]
#Subject: [IBIS-Users] On IBIS Model Generation
#
#
#
#Hi,
#
#      This might sound very dumb a question, but I dont have an
#answer to this. 
#
#       When IBIS model generation for an IO buffer is in progress,
#only one package load (a set of RLC parameters) is used to calculate
#all the IV curves. Is that valid ? Because in such a case the
#I-V curves of buffer would then be dependent of the package load. 
#
#    Shouldn't it be that the calculation be done for various load
#points with each load-point providing a set of I-V curves.
#
#Please correct me if I am wrong.
#
#Thanks and Regards,
#Jairam.
#-- 
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------------------------------

Date: Tue, 17 Sep 2002 00:41:35 -0700
From: "Mohan, Prabhu" <[email-masked]>
Subject: RE: [IBIS-Users] On IBIS Model Generation

Hi Jairam,

You are correct. The buffers characteristics will vary with load.
Since there is no real way to know what load the buffer will be driving 
and fast edge rates make traces look like 50ohm transmission lines,
most models use 50ohm pullup and pulldown to derive the VT curves.

At this point I think it is upto the simulator vendor to come up 
with the appropriate algorithm to extract buffer characteristics 
for other loads.

Hope that was of some help.

Prabhu/~

- -----Original Message-----
From: S Jairam [mailto:[email-masked]]
Sent: Monday, September 16, 2002 11:48 PM
To: Mohan, Prabhu
Cc: [email-masked]
Subject: RE: [IBIS-Users] On IBIS Model Generation

Hi Prabhu,

Thanks for the answer. However the flavour of the question still
remains the same. The buffer drive will depend on the load (might not
just be the package load) that will be hooked up. Should not this
again be varied for generating the IBIS model ?

Thanks and Regards,
Jairam.

Mohan, Prabhu writes:
#Hi Jairam,
#
#The package parameters (RLC) are NOT taken into account while generating
the
#IBIS model. They are to be provided seperately to facilitate simulation
#using other (SI) tools. 
#
#Ragards
#Prabhu/~
#
#-----Original Message-----
#From: S Jairam [mailto:[email-masked]]
#Sent: Monday, September 16, 2002 10:07 PM
#To: [email-masked]
#Subject: [IBIS-Users] On IBIS Model Generation
#
#
#
#Hi,
#
#      This might sound very dumb a question, but I dont have an
#answer to this. 
#
#       When IBIS model generation for an IO buffer is in progress,
#only one package load (a set of RLC parameters) is used to calculate
#all the IV curves. Is that valid ? Because in such a case the
#I-V curves of buffer would then be dependent of the package load. 
#
#    Shouldn't it be that the calculation be done for various load
#points with each load-point providing a set of I-V curves.
#
#Please correct me if I am wrong.
#
#Thanks and Regards,
#Jairam.
#-- 
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------------------------------

Date: Tue, 17 Sep 2002 15:15:58 +0530 (IST)
From: S Jairam <[email-masked]>
Subject: RE: [IBIS-Users] On IBIS Model Generation

Prabhu / Eckhard

Thanks for your responses. This makes it clear. So, the assumption
that the buffers sees a proper termination, needs to be adhered.

Regards,
Jairam.

Mohan, Prabhu writes:
#Hi Jairam,
#
#You are correct. The buffers characteristics will vary with load.
#Since there is no real way to know what load the buffer will be driving 
#and fast edge rates make traces look like 50ohm transmission lines,
#most models use 50ohm pullup and pulldown to derive the VT curves.
#
#At this point I think it is upto the simulator vendor to come up 
#with the appropriate algorithm to extract buffer characteristics 
#for other loads.
#
#Hope that was of some help.
#
#Prabhu/~
#
#-----Original Message-----
#From: S Jairam [mailto:[email-masked]]
#Sent: Monday, September 16, 2002 11:48 PM
#To: Mohan, Prabhu
#Cc: [email-masked]
#Subject: RE: [IBIS-Users] On IBIS Model Generation
#
#
#
#Hi Prabhu,
#
#Thanks for the answer. However the flavour of the question still
#remains the same. The buffer drive will depend on the load (might not
#just be the package load) that will be hooked up. Should not this
#again be varied for generating the IBIS model ?
#
#Thanks and Regards,
#Jairam.
#
#
#Mohan, Prabhu writes:
##Hi Jairam,
##
##The package parameters (RLC) are NOT taken into account while generating
#the
##IBIS model. They are to be provided seperately to facilitate simulation
##using other (SI) tools. 
##
##Ragards
##Prabhu/~
##
##-----Original Message-----
##From: S Jairam [mailto:[email-masked]]
##Sent: Monday, September 16, 2002 10:07 PM
##To: [email-masked]
##Subject: [IBIS-Users] On IBIS Model Generation
##
##
##
##Hi,
##
##      This might sound very dumb a question, but I dont have an
##answer to this. 
##
##       When IBIS model generation for an IO buffer is in progress,
##only one package load (a set of RLC parameters) is used to calculate
##all the IV curves. Is that valid ? Because in such a case the
##I-V curves of buffer would then be dependent of the package load. 
##
##    Shouldn't it be that the calculation be done for various load
##points with each load-point providing a set of I-V curves.
##
##Please correct me if I am wrong.
##
##Thanks and Regards,
##Jairam.
##-- 

- -- 
# S.Jairam,
# Texas Instruments Bangalore,
# E-Mail: [email-masked] 
# Phone : 080 5099 689
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------------------------------

Date: Tue, 17 Sep 2002 14:15:53 -0400
From: "Ingraham, Andrew" <[email-masked]>
Subject: RE: [IBIS-Users] On IBIS Model Generation

Jairam,

The I-V curves are essentially static or DC, so even if they did include the package, only the package resistance would affect them.  L and C would not.

They are also load-independent.  Their purpose is to "map out" or describe the characteristics of the IO buffer alone.  You may think of it as connecting a constant voltage source (or perhaps a current source) to the IO pin.  At that voltage, you would measure some value of current, which depends on the strength of the IO buffer alone.  Repeat at other voltage values to create a curve.

I think it is extremely rare for a buffer's drive strength to depend on the load.  (Actually, there are some technologies that are capable of adjusting themselves against their loads; but once so adjusted, the drive strength remains constant until the next re-cal.)  So except for rare cases, while the output current does depend on the load as you say, the drive strength, i.e., the shape and magnitude of the I-V curve, does not.

On the other hand, the V-T curves do greatly depend on load; and for that reason, it is highly desirable for the model creator to have at least one V-T curve whose test load fixture is similar to the actual load that the customer will use.  The simulator tool will need to extrapolate or interpolate around V-T curves in order to derive the waveform when a somewhat different load is used.  Accuracy is theoretically enhanced when the actual load is very similar to the test load.  An exact termination is not required, but the simulator needs to be "smart" enough to figure out what to do.

Regards,
Andy

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------------------------------

Date: Wed, 18 Sep 2002 10:38:05 +0200
From: Ege Engin <[email-masked]>
Subject: Re: [IBIS-Users] On IBIS Model Generation

Dies ist eine mehrteilige Nachricht im MIME-Format.
- --------------E86FDF1BAB148215066738B7
Content-Type: text/plain; charset=iso-8859-9
Content-Transfer-Encoding: 7bit

Andrew,

I-V and V-T curves are both obtained when the (CMOS) driver is connected
to an ideal supply voltage. The resultant driver model is a 2-pole
model, such that the signal return current is assumed to flow back on
the AC short-circuited power and/or ground. Do you think, it is possible
to use/extend IBIS (similar to the 4-terminal device model in the
japanese IMIC) to include the power supply noise? You mentioned that the
V-T curves at various loads is required to enhance accuracy. Maybe, a
possible way to include the power-supply noise is to have all these V-T
(and V-I) curves at various power-supply levels as well. I think the
simulator needs to be "smarter" in this case to figure out what to do.

Regards,
Ege

"Ingraham, Andrew" schrieb:
> 
> Jairam,
> 
> The I-V curves are essentially static or DC, so even if they did include the package, only the package resistance would affect them.  L and C would not.
> 
> They are also load-independent.  Their purpose is to "map out" or describe the characteristics of the IO buffer alone.  You may think of it as connecting a constant voltage source (or perhaps a current source) to the IO pin.  At that voltage, you would measure some value of current, which depends on the strength of the IO buffer alone.  Repeat at other voltage values to create a curve.
> 
> I think it is extremely rare for a buffer's drive strength to depend on the load.  (Actually, there are some technologies that are capable of adjusting themselves against their loads; but once so adjusted, the drive strength remains constant until the next re-cal.)  So except for rare cases, while the output current does depend on the load as you say, the drive strength, i.e., the shape and magnitude of the I-V curve, does not.
> 
> On the other hand, the V-T curves do greatly depend on load; and for that reason, it is highly desirable for the model creator to have at least one V-T curve whose test load fixture is similar to the actual load that the customer will use.  The simulator tool will need to extrapolate or interpolate around V-T curves in order to derive the waveform when a somewhat different load is used.  Accuracy is theoretically enhanced when the actual load is very similar to the test load.  An exact termination is not required, but the simulator needs to be "smart" enough to figure out what to do.
> 
> Regards,
> Andy
> 
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