Subject: Using IBIS models in Avanti Star-Hspice

From: [email-masked]
Date: Fri, 27 Oct 2000 14:45:02 -0600

I received an IBIS model from Silicon Image under an NDA and have been
trying to get it to run 
inside my Avanti Hspice file. 
I keep getting an error message at the point in my .sp file where I define
the IBIS input buffer. 
I've read the section "Using IBIS Models" supplied by Avanti and I believe
I'm getting hung-up on the 
syntax. 
What I really need is a document that describes how to include an IBIS file
inside a spice file. 
For example: 
b1 nd_pc nd_gc node_in node_out_of_in 
+ file='filename' model='modelname' 
+ etc. 
How many input node and output nodes? Is this determined by the IBIS file? 
If I'm simulating 6 lines, how do I assign these inputs to the IBIS input
buffer? 
I could go on..... 
Thanks for any help....

Lonnie N. Adams
Hardware Design Engineer
REALimage Solutions Group
Evans & Sutherland Computer Corporation(www.es.com)
tel: (801)588-1219, fax: (801)588-4518,email: [email-masked]

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From: "Ingraham, Andrew" <[email-masked]>
Date: Mon, 30 Oct 2000 12:43:55 -0500

> I received an IBIS model from Silicon Image under an NDA 
 
An IBIS model that requires an NDA, hmmm...

> and have been
 
The Hspice documentation for using IBIS models is not the most clear.

First, note the fact that their implementation of IBIS models does not
include even the simplest of package parasitics.  You must add your own
subcircuit, such as the one shown in the manual, between the package pin
("node_pin") and the die pad ("node_out"), with component values that you
manually extract from the vendor's IBIS "model".

> How many input node and output nodes? Is this determined by the IBIS file?
It is determined mainly by which kind of buffer you have.  An input-only
buffer has four total nodes.  An output-only buffer has either four or six;
if you omit the optional nodes, Hspice treats the clamps in a way that is
contrary to the IBIS spec ... so unless you know what you are doing, always
use all optional nodes!  (They don't need to connect to anything useful in
the rest of your SPICE circuit.)  Tristate buffers have five or seven;
again, use all seven.  I/O bidirectional buffers have six or eight; use all
eight.

By default, most of the nodes in each Hspice IBIS model, are driven
internally by the model.  Remember that IBIS includes the power supply
voltage within the "model".  When the Hspice IBIS model has nodes for ground
(nd_gc, nd_pd) and power (nd_pc, nd_pu), these nodes are internally driven
by the IBIS model, when "power=on" (default).  They are brought out of the
IBIS model for you to look at, but not for you to drive or to connect to
power and ground.  Those "connections" are already made for you ... relative
to ideal SPICE ground (node 0).

If you want to drive the power and ground nodes yourself, or include package
parasitics, specify "power=off" with each IBIS buffer.

If you had six identical input buffers with "power=on" (default), you might
have something like:

b1 pwr1 gnd1 pad1 buf1 file=... buffer=1 ...
b2 pwr2 gnd2 pad2 buf2 file=... buffer=1 ...
b3 pwr3 gnd3 pad3 buf3 file=... buffer=1 ...
b4 pwr4 gnd4 pad4 buf4 file=... buffer=1 ...
b5 pwr5 gnd5 pad5 buf5 file=... buffer=1 ...
b6 pwr6 gnd6 pad6 buf6 file=... buffer=1 ...

Each line above refers to the same IBIS filename, and modelname within that
file (as appropriate for the buffers in your device).

Nodes pad1 through pad6 are the die pads.

Nodes buf1 through buf6 are the digital representations of the buffered
input signal.  You can do whatever you want to with them.  Each is driven by
a voltage source within Hspice's IBIS model, and toggles between 0v and 1v.
You can use them to monitor the state of the input signals, or ignore them
(just given them unique nodenames and ignore them).

Nodes pwr1 through pwr6, and gnd1 through gnd6, are nodes you can look at,
but should not drive, nor should you bus them together.  Just give them
unique nodenames.  If "power=off", connect them to appropriate external
elements.

IBIS buffers that drive, require a digital (0v/1v) voltage source that you
connect to the appropriate node(s), the ones referred to as "nd_in" and
"nd_en" in the manual for those output buffers.

The meaning of some terms, such as "nd_in", is not consistent in the Hspice
docs.  For an input buffer, "nd_in" is the IC pad (the point that is
wirebonded or otherwise connected to the signal pin).  For an output or
bi-direct buffer, "nd_in" is the internal digital "signal" that makes the
output buffer drive high or low.  Remember that these names are
place-holders.  Just like the resistor whose syntax is described as:

Rxxx n1 n2 ...

you would actually use the resistor with nodenames of your choice.

This is just a start; hope it helps.

Regards,
Andy