Subject: Re:

From: "Hirut Asfaw" <[email-masked]>
Date: Fri, 15 Jun 2001 14:01:03 -0400

Hi Folks,
     A question regarding *LVDS* I/Os with internal terminations between
the diff pins.
          When characterizing the Series resistance between the diff pins,
is the intention to capture the current prior to IBIS generation.  Meaning,
is this part of Spice set up before the IBIS model is generated? or can we
just include this resistance (as a physical) model once the IBIS model is
genrated?

Thanks,
Hirut

Hirut Asfaw
ASIC I/O Developement
IBM Microelectronics Division
External:  (802) 769-0652   T/L: 6-0652
[email-masked]

---

From: Peter LaFlamme <[email-masked]>
Date: Fri, 15 Jun 2001 15:06:32 -0400

Hi Hirut,
I had this discussion with Bob Ross a few weeks ago. This is the
information that he gave me. 

Use IBIS Version 3.2 and the [R Series] keyword to model internal
differential
resistor terminations for differential I/O models.  That means that you
will
also need the [Series Pin Mapping] keyword to show the connection of [R
Series].

Here is the example that I created using Bob's advice, starting with the
[pin] Keyword and modeling the series resistor between pins 1 and 2:

[Pin]        signal_name     model_name         R_pin   L_pin   C_pin
  1             PAD          lvds_drv            NA      NA      NA
  2             PADN         lvds_drv          NA      NA      NA
| 
[Series Pin Mapping]    pin_2   model_name      function_table_group
1                     2           rterm_100

| 
[Diff_pin]      inv_pin     vdiff     tdelay_typ    tdelay_min   
tdelay_max
| 
   1               2          NA          0             0             0

[Model]  rterm_100
C_comp                   0.1pF   0.1pF  0.1pF

Model_type  Series
|variable        R(typ)  R(min)  R(max)
[R Series]      100     80      120

[Temperature Range]     50.00    125.00    0.00
[Voltage Range]         1.800    1.650   1.950

I have tried it out and the syntax is correct, but you will need to use
a simulator that can understand it. I think that there is a way to do it
with a dynamic clamp, but I think that there may be potential problems
with that. I say this because the voltage at the true and complement
pins are dependent on each other. With the dynamic clamp implementation
I do not believe that this is  true.

Regards,
Peter

-- 
Peter LaFlamme

Applied Micro Circuits Corp.
Staff System Applications Engineer
200 Minuteman Rd, 3rd Floor
Andover, MA 01810

978-247-8470 phone
978-623-0055 Fax