Subject: RE: On chip Active termination

From: "Ingraham, Andrew" <[email-masked]>
Date: Mon, 16 Apr 2001 14:34:18 -0400

... if I look at the GND clamp curve I observe ~ 0mA
> current at 1.3V ( which is the valid voltage level with the output
> tristated).
 
This may not be directly related to your question....

I am just curious whether it is appropriate to put your active termination
in the [GND clamp] curve.

If a supply voltage is involved in this on-chip termination, then the I/V
characteristics would vary with the supply voltage.  Putting the termination
I/V data in only the [GND Clamp] table means that it would not vary with
supply voltage, in the IBIS model.

If the termination is (or behaves like) something other than a resistance to
just the supply, then you could split the termination current between the
[GND Clamp] and [POWER Clamp] tables, to make the model more accurate.

Sorry if this is what you have already done.

Regards,
Andy