Subject: built in termination

From: Chris Burton <[email-masked]>
Date: Tue, 10 Apr 2001 09:52:34 -0400

This might be a simple question, but I couldn't find it in any of the
documentation...

Can IBIS model an input with a build in termination?  

I created a model with the termination in the spice simulation (for
s2ibis).  The ibischk3 didn't report any problems with it.  But when I
simulated it in Hspice, first Hspice complained that the current wasn't
0 at gnd (for gnd clamp) and 0 at vdd (for power clamp).  The resultant
waveforms were the correct shape but offset from the proper voltage (I
ran the transistor version of the input in the same circuit for
comparison).

I then removed the termination and recreated the ibis model.  I
resimulated with an external termination in Hspice (but connected
directly to the input node) and everything matched fine.

-- 
Chris Burton Cad Support
603-546-0617 [email-masked]

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From: [email-masked]
Date: Tue, 10 Apr 2001 09:51:34 -0500

Chris,
This sounds like an HSpice problem.  Many of the models I use have pull-up
terminators modeled in the power clamp.  I see no reason why one couldn't
model a termination to ground in the ground clamp.

Aubrey Sparkman
Signal Integrity
[email-masked]
(512) 723-3592

> -----Original Message-----
> From: Chris Burton [mailto:[email-masked]]
> Sent: Tuesday, April 10, 2001 8:53 AM
> To: [email-masked]
> Subject: built in termination
> 
> 
>

---

From: "Muranyi, Arpad" <[email-masked]>
Date: Tue, 10 Apr 2001 09:53:32 -0700

Chris,

We do this all the time without any problems in the
waveforms (with the B-element).  From your description,
it sounds like your clamp waveforms are not correct.
Even if you have on die terminations, the clamp curves
should go through the origin.

For example, if you have a termination that is connected
to GND, your GND_clamp IV curve will look similar to
a pulldown IV curve.  In this case the Power_clamp IV
curve should look like a normal diode curve having about
zero current between GND and Vcc.

If you have a terminator to Vcc, the mirror of the previous
description should be true.  Notice that the IV curve have
zero current at the origin in both cases.  If your curves
don't look like this, than your buffer has either some
fancy features (other than a normal terminator) or the
IBIS model was not generated correctly.  Keep in mind that
it is very easy to double count for the terminator in these
IV curves, and some numerical massaging of the data may be
necessary to get it right.

I do have a few foils on this issue in my IBIS class presentation
which you can get from

http://www.eigroup.org/ibis/ibis.htm

under Articles/Training/IBIS_class_JEDEC.ZIP, in the PDF file,
pages 78-81.

Arpad Muranyi
Intel Corporation
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