Subject: transistor diodes in HSPICE

From: [email-masked] (Cornelia Foss)
Date: Fri, 1 Nov 96 11:09:09 +0100

Arpad,

I'm just a very beginner in IBIS modelling and I came across the 
same problem Scott Schlachter rised up.
It was very kind if you could tell me how you handle this problem
or if I perhaps misunderstood something.

In your answer to Scott Schlachters question you wrote:

>If you have access to an HSPICE manual, look up the RD, RDC, RS,
>RSC, etc. parameters.  Don't let yourself get confused that these
>are Drain and Source resistance numbers; the currents of parasitic
>diodes go through Drain, Source, and Bulk.

I think you are absolutely right when saying it is possible to correctly
model the resistance of the diodes. But there are some
problems with the HSPICE diode implementatation, anyhow.
RD, RDC, RSH ... specify the diode resistance. HSIPCE assumes the
currend through the drain-bulk diode (for instance) to flow the 
same way as the drain-source currend does, so only one resistor
is used in the HSPICE model (I guess to simplify numerical algorithms).
Actually there are two differend resistances to take into account.

Rdrain decreases as gate width increases and increases as 
HDIF+LD+LDD (contact to gate distance) increases but Rdiode
decreases as both parameters increase.

So I have to manually correlate every transistor diode params with
actual measurment.
If using only a few transistor types in gate arrays it is possible
but otherwise this will cause a huge extra expenditure to generate
IBIS models.

Additionally there is no IK (forward knee current) parameter;
neigther in ACM=0, 1, 2 nor 3. So it becomes impossible to model
low and high current charactristics correctly.

I was very pleased if you counceled me, much thanks in advance.

Kindest regards
Sascha Pawel