Subject: HSPICE diode modeling for IBIS

From: [email-masked] (Cornelia Foss)
Date: Tue, 5 Nov 96 14:48:45 +0100

Arpad,

thank you for your response regarding diode resistance models.

Modeling the diode resistance characteristics with an discrete resistor
as you proposed is surely possible - but it equals to modeling with an
external diode in efford.
Unfortunately(??) I'm working at the silicon vendor's side, so I can't
simply take the finished HSPICE files and rely on it.
That is why I would like very much to find a "good" solution for the
diode modeling problem.

It absolutely was the best if one could model the diode within the ACM
HSPICE model and so I examined possible solutions in HSPICE and came across
some effects perhaps worth keeping in mind.

The basic flaw within HSPICE seems to be that the resistance of the diodes
is added to the effective drain (/source) resistance.

Lets take an n-channel-MOSFET with negative Vout applied to drain and
V_gate=0V.(source, bulk are at ground)
The currend through the drain is I_diode + I_transistor where I_transistor
is I_drain_source without any diode influence. Vout vs. I_transistor is
expected to be (approximately) a straight line with the slope ~ R_cannel.
I simulated such a transistor with all diodes disabled and got I_transistor
as expected. When I simulated the same transistor with diodes enabled and
looked at I_source (that is I_transistor) I found that the currend stops
rising at about 0.7V. This is because of the incorrect R_diode
handling in HSPICE that causes the voltage across R_cannel+R_source to be
only the voltage across the differential resistance rdiff of the pn-junction 
and not the whole voltage across the diode (rdiff+Rdiode).
Please see "pictures" below:

HSPICE:
                           o 
                           |
                           | 
                           \ 
                           /
               Rdrain_eff  \   (= Rdrain_cont+R_drain+Rdiode)
                           /
                           |
                           |
                     --------------
                    |             |
                    |             |
Rcannel+Rsource_eff /             |   
                    \             |
                    /             |
                    \             |
                    |             |
                    |            ___
                    |             ^
                    |            / \  (diode -> rdiff)
                    |            '''
                    |             |             
                   ---           ----

"real":

                           o 
                           |
                           | 
                           \ 
                           /
              Rdrain_cont  \
                           /
                           |
                           |
                     --------------
                    |             |
                    |             /
Rcannel+Rsource_eff /             \  Rdiode 
+R_drain            \             /
                    /             \
                    \             |
                    |             |
                    |            ___
                    |             ^  (rdiff)
                    |            / \
                    |            '''
                    |             |             
                   ---           ----

For rdiff is very small at high currends, the voltage across
Rchannel+Rsource_eff+R_drain (that determines I_transistor) does rise
only very slowly if voltages are smaller than about -0.7V.
This causes an inaccuracy because I_transistor would normaly slow down
its rising at voltages not less 2-3V.

HSPICE:

                               | I_drain_source (I_transistor)
                               |               .   .
                               |       .
                               |    .
                               |  .
                               |. 
                   -----------------------------------------Vout
                  .   .   .  . |
                               |
                               |
                               |
"real":

                               | I_drain_source (I_transistor)
                               |               .   .
                               |       .
                               |    .
                               |  .
                               |. 
                   -----------------------------------------Vout
                             . |
                           .   |
                         .     |
                       .       |

If this is not just a mistake I made, it should be whatched at.
I hope you can tell me weather I'm wrong or not, I will highly
appreciate any information. Much thanks in advance.

Kindest regards
Sascha Pawel

---

From: "D.C. Sessions" <[email-masked]>
Date: Tue, 05 Nov 1996 10:40:35 -0700

> some effects perhaps worth keeping in mind.

For what it's worth, we've approached this by creating accurate models
for source/drain to bulk diodes and then having a script rewrite the
SPICE deck to replace transistors with a parameterized subcircuit that
contains the transistor and the two parasitic diodes.

-- 
D. C. Sessions
[email-masked]