Subject: Re: DRAM output IV Curve

From: "Jin Man Han" <[email-masked]>
Date: Mon, 10 Feb 1997 16:53:38 -0800 (PST)

Right after power up and without any pattern writing, most of the
memory cell will be initialized to zero.(I cannnot gurantee, thouh)
The problem is, since internal Read is differential, DRAM output may
be one or zero accroding to row addresses. So if you access a certain
row(with some luck), then you may get all ones.(and vice versa)
If you don't want to bother supplying address to DRAM at all, then
just operate DRAM in Multi-bit-test mode. Then, most likely, you will
have one in you output driver.
When you entering MBT mode, most of the current DRAM outputs
one if all the cells under test have the same data. And that's very
likely.

Hope this will help you extract DRAM IBIS data.
Thanks.

Jin Man Han
Samsung Electronics
[email-masked]
[email-masked]

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From: "Jin Man Han" <[email-masked]>
Date: Mon, 10 Feb 1997 16:59:53 -0800 (PST)

Jin Man Han
Samsung Electronics
[email-masked]
[email-masked]