Subject: Scaling IBIS models

From: Paul Gregory <[email-masked]>
Date: Wed, 11 Nov 1998 8:28:23 MST

I have a v2.1 model from a supplier.  The models is of
a CMOS 24ma driver.  After simulations, I find that the
driver is too strong, that is, there is ringing on the
transitions, and the transition is faster than is
necessary.  So I request the supplier to reduce the drive
strength by 10%, rebuild the IBIS models and send me the
new stuff.

I get the new models.  I find that the V/I tables show 
about a 10% reduction.  That is what I expected.  But, 
the transition times and rising and falling waveforms 
are not slower, but faster than the original (by about 
10%).  I think about this.  Perhaps its because the 
capacitance of the the gate is reduced.  No, the C_comp 
value is not changed.

Note: these models are created from a home-grown s2ibis
procedure.  These are not measured values.

So the questions: Why does a model with reduced drive
capacity have faster edge rates?  Is this a model error
or should it really be so?

Second, if you need to do some "what-if'ing", and you decide
to edit the ibis model to scale it, what things should be
changed and in what direction (that is increased or decreased)? 
Should everything scale by the same factor?

 -- Paul Gregory

---

From: "D. C. Sessions" <[email-masked]>
Date: Wed, 11 Nov 1998 09:15:00 -0700

> strength by 10%, rebuild the IBIS models and send me the

Quick sanity check: the clamp curves should be pretty much
unchanged.  This is because the total amount of output
transistor is determined mostly by ESD requirements, so
when a driver is sized the drain area is left unchanged
but several gates are tied off.

> capacitance of the the gate is reduced.  No, the C_comp

They didn't change the predriver.  Output transition times
are dictated by the rise and fall times of the final drive
gate voltages, which in turn are a function of the predriver
output currents and the gate capacitance of the final drive
stage.  When they tied off 10% of the final stage gates, the
ones that were left switched faster, giving a higher di/dt
at the output.

> or should it really be so?

It's real.

> Should everything scale by the same factor?

IMNSHO (This is my job, here) each predriver should be
individually sized to give adequate results with the intended
final stage.  Failing that, you can *almost* expect a constant
value for di/dt irrespective of final drive size as long as
the predriver doesn't change.  The clamp curves shouldn't
change at all, and the final drive saturation (short-circuit)
current should scale.

-- 
D. C. Sessions
[email-masked]