Subject: RE: convergence problem

From: "Muranyi, Arpad" <[email-masked]>
Date: Mon, 16 Nov 1998 16:09:00 -0800

Sagheer,

Not knowing how you are doing this in HSPICE (i.e. what is your behavioral 
model constructed) it is hard to give you exact solutions.  However, there 
are generally two types of problems, and is seems that you got them both.

If your circuit doesn't converge for DC (i.e. it can't find a DC operating 
point before the transient simulation begins), chances are that your I-V 
curves have more than just one solution, or the solution is just not there.

To overcome this problem you can use the .IC statement to help the simulator

to find a DC operating point solution.

Once you got the transients running, you might get "time step too small" 
errors, if your behavioral elements violate the relative 
(iteration-to-iteration) currents and/or voltages exceed the tolerance 
limits.  Since controlled sources have a tendency to behave in an "ideal" 
fashion, this condition can happen very easily, especially if you are using 
tight tolerance settings (like the accurate option).

Your question, however, is not entirely clear to me when you say "doesn't 
converge ... (beyond 3.8 volt and below -2 volt of out voltage)".  What are 
you talking about?  A situation when the signal on the output goes above 3.8

or below -2 volts?  Are you saying that if the voltage is in-between you
have 
no problems at all?  If that is the case you may need to extend the I-V
curve 
range to cover the voltages you expect to see on the node.  HSPICE tends to 
continue the data tables of PWL sources (I assume your I-V curves also) 
horizontally in the undefined range, which may cause the problem.

I hope these hints might get you going in the right direction.

Arpad Muranyi
===========================================================================

I am trying to do IBIS modeling of my output buffer  (vdd= 3,3.3,3.6 volt). 
While simulating, using hspice for getting pull-up data, circuit does't
converge
for DC as well as TRAN analsis (beyond 3.8volt and below -2volt of out
voltage).

And it looks correct that output buffers should not converge (if there are
no 
clamp/ESD diodes) in those conditions. If that happens that what should I 
should. Should I truncate the pull-up range (-vdd to vdd*2) to -2v to 3.8v
only.
Or there is some other solution possible.

Please help me out. I am stuck.

Thanks in advance,
Sagheer at Interra.