Subject: Pseudo-ECL output models

From: [email-masked]
Date: Fri, 9 Jan 1998 15:28:27 -0800

Hi, all.
     
     For a communications serializer-deserializer high speed(1Gb/s) serial 
     output IC, with the following configuration,(ignore the *star* line till 
     you get to question 3)

                         *
            |------|-----*---------------------      
            >      >     *      |            |
            <      <     *      |           |/
            |      |___C_*______|___________|
            |      |     *      |           |\
            |      |     *      |            |
            |      |     *     |/            A____ 
            |______|___D_*_____|             |    | 
            |      |     *     |\            |    < 
            |      |     *      |            |    >
          |/       \|    *      |            |    | 
     -----|         |    *      |            |   GND
          |         |    *      B____________|________ 
          |\       /|    *  Current     Current      |
           |       |     *  source      Source       | 
           ---------     *      |            |       <
               |         *      |            |       > 
               |         *      |            |       |
              Current    *      GND        GND      GND 
              Source     *
               |
               |
               GND 
     
     Where A and B are the IC buffer boundary and the two resistors to 
     ground are 150 ohms each from A and B,
     
     I am trying to generate an IBIS model. I have the following questions-
     
     1. For the pull-up and pull-down tables I get negative currents. I 
     understand that for standard ECL outputs,currents are positive. Will this 
     cause any simulation difficulties? ( For simulation, the buffer shown above 
     is ac coupled to a transmission line and terminated differentially in 2*Z0)
     
     2. For generating the IBIS pullup/pulldown table, I bias the buffer in such 
     a way that one of the outputs is "high"/"low" and the other is 
     "low"/"high", with the 150 ohm resistors in place. Then on the output that 
     is "high" a voltage is swept in steps while monitoring the current. Is this 
     the correct way of generating the IBIS table?( Note that one leg of the 
     differential outputs has only the 150 ohm resistor to ground while a 
     voltage is connected to the other leg and is being swept while currents are 
     being measured)
     
     3. For an output buffer structure that is shown on the left hand side of 
     the vertical *star* line, with C and D as the differential output 
     terminals,  has any one come up with an IBIS model? This output structure 
     is used for high speed buffers and the traditional way of generating the 
     IBIS tables do not work. 
     (This kind of structure is very useful in that in provides back termination 
     for transmission lines without any external resistors and the biasing of 
     the internal transistors is automatic) Again, typically, this buffer is ac 
     coupled to a transmission line that is terminated differentially in 2*Z0 
     for simulation.

      Answers, suggestions and questions are welcome. If this information exists 
     somewhere please direct me to it. (I did not find it in the cookbook)
     
     Thanks.

---

From: Stephen Peters <[email-masked]>
Date: Mon, 12 Jan 1998 10:39:28 -0800

Hello Prasad:

    Interesting circuit you have there!  I assume that the 'current source' you
show at the output nodes is used to extablish a current flow thru the 
termination
resistors even if both of the upper xsistors are off.  The upper xsistor then
supply current to change the logic level -- correct?  Anyway, my answers are 
below, prefefixed with >>>.

                  Regards,
                  Stephen Peters
                  Intel Corp.

             >>>  Actually, for standard ECL outputs the current direction is
             >>>  'negative' (assuming positive current flows from + to -
             >>>  (hole flow)).  I don't think that should cause simulators
             >>>  difficulty, as long as all tables are consistent.

             >>>  By the way, could you please explain what you mean by 'ac 
coupling'
             >>>  to a transmission line?  To me, ac coupling means putting a
             >>>  capacitor is series with the output to block DC current and 
             >>>  voltage -- which doesn't make much sense.  Please enlighten.
>      
             >>>  From what you have described, it sounds correct.  I emphasis 
that
             >>>  the leg you apply the voltage to and measure the current on 
does
             >>>  NOT have the 150 termination resistor.  Also, remember to 
remove
             >>>  any package model -- you want just the DC output 
characteristics
             >>>  of the output node itself.
>      
             >>>  Fundementally, the C and D outputs are standard 
open-collector
             >>>  outputs, which the IBIS spec will handle just fine.  The only
             >>>  trick is that the two ouputs have a 'differential' 
relationship
             >>>  but again, you should be able to specify that in IBIS.
>      
>