Subject: RE: Multiple voltage levels and s2ibis2

From: "Beal, Weston" <[email-masked]>
Date: Wed, 2 Jun 1999 16:18:11 -0500

Rob,

Just connect your internal power node to a voltage source in your netlist.
The voltage that needs to be varied for case modeling is that of the output
stage (3.3V).  In the s2ibis control file you can set Vih to 1.8V for the
level of the input pulse.

Regards,
Weston Beal
Signal Integrity Engineer
Compaq Computer Corp.

		-----Original Message-----
		From:	Robert Goodrich (ra3862)
[mailto:[email-masked]]
		Sent:	Wednesday, 02 June, 1999 1:04 PM
		To:	[email-masked]
		Subject:	Multiple voltage levels and s2ibis2

		All:

		To my knowledge s2ibis2 cannot be used directly to model a
		buffer that is powered internally at one potential, but will

		drive externally at another.  For instance, I am required to

		model I/O that internally is 1.8V, but drives a 3.3V
		output.  I was wondering, first of all, if there were any
		plans in the works for an "updated" s2ibis program (ver
		3.2?).  Next, I was wondering if anyone had developed any
		scripts or programs on their own that would help model a
		buffer of this type.   If so, would you be open to sharing
		them?

		--Rob

		--

		Rob Goodrich
		Circuit Design - Advanced Imaging Technology (AIT)
		Motorola SPS, I&E Solutions
		6501 William Cannon Drive West MD: OE37
		Austin, TX 78735
		[email-masked]
		(512) 895-7341

---

From: Dan Aleksandrowicz <[email-masked]>
Date: Thu, 03 Jun 1999 09:01:06 +0300

Rob,I agree with  Beal's solution, and would like to add to it another aspect.If you create in your spice stack a global voltage source of VDD1_8 - 1.8VI would recommend you use voltage dependent source which is relevant to the3.3V of your pad supply.This will enable you to properly simulate the max & min cases were themin voltage will be = (1.8-0.18)  and the max = (1.8 +0.18). I also recommendyou checking your [vil] and [vih] in the *s2i file that they fit the min andmax cases.[vil] 0.6 0.4 0.8[vih] 1.6 1.4 1.8good luck.Dan."Beal, Weston" wrote:> Rob,>> Just connect your internal power node to a voltage source in your netlist.> The voltage that needs to be varied for case modeling is that of the output> stage (3.3V).  In the s2ibis control file you can set Vih to 1.8V for the> level of the input pulse.>> Regards,> Weston Beal> Signal Integrity Engineer> Compaq Computer Corp.>>                 -----Original Message----->                 From:   Robert Goodrich (ra3862)>                 model I/O that internally is 1.8V, but drives a 3.3V>                 output.  I was wondering, first of all, if there were any>                 plans in the works for an "updated" s2ibis program (ver>                 3.2?).  Next, I was wondering if anyone had developed any>                 scripts or programs on their own that would help model a>                 buffer of this type.   If so, would you be open to sharing>                 them?>>--                \\|//                (o o)~~~~~~~~~~~~oOOo~(_)~oOOo~~~~~~~~~~~~~~~~~~~Dan AleksandrowiczGalileo TechnologyMercaz Ofek 1   (Building B')Northern Industrial Zone, LOD 71293,  ISRAELemail:[email-masked]: +972 8 9247555    (-     Ext. 324         |__|                      |__|                     #|oo| |--|   ___           _  _    |--|  | |  |\ |oo|)        /\       __  \\ \\   |------------\| #|--\     _||-   ____\ \__\\_\\__|_||_________________\___|   |__v-___   \                                                   /    \      "Smoke on the water. Fire in the sky."     /~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~