FREQUENTLY ASKED QUESTIONS (FAQ) 1.0 What is this IBIS stuff anyhow ? IBIS(Input Output Buffer Information Specification) is a method of providing the Input/Output device characteristics through V/I data without disclosing any circuit/process information. It can be thought of as a behavioral modeling specification suitable for transmission line simulation of Digital Systems and applicable to most digital components. 2.0 What is the "Golden Parser" ? The "Golden Parser" is a program called ibis_chk that parses the model file to verify that the file conforms to the IBIS specification. It is free, publically available executable code developed by contractors for the IBIS Open Forum. All model files must pass the parser before a model can be released to vhdl.org. 3.0 Where can I find the IBIS Golden Parser ? The parser is freely available in object code format for many platforms, and can be downloaded via anonymous ftp from the vhdl.org BBS (198.31.14.3). It resides under the /pub/ibis/ibis_chk directory. The Golden Parser source code is also available from the EIA IBIS committee for a fee. In addition to checking syntax, it creates data structures from model data that simulators can use. There are three options for licensing the IBIS Golden Parser source code, V2.1, depending on your membership status in the IBIS committee of EIA: 1) If you are a current member of the IBIS committee, you can license the parser source for an additional $250.00 2) If you are not a member, but would like to be, you can join the committee and license the parser source for a total of $750 3) If you are not a member, and do not wish to become a member, you can license the source for $500. In any case, submit a request to: EIA 2500 Wilson Blvd. Arlington, VA 22201 (703) 907-7545 (phone) (703) 907-7501 (fax) Enclose a check in the appropriate amount made out to EIA. EIA will take care of distributing the source. 4.0 Where can I find available IBIS models ? All IBIS models released today resides in an anonymous ftp site at vhdl.org. You may ftp to this site and change directory to /pub/ibis/models to find all models. There are multiple ways of downloading these models from the Internet: Using any Web browser: URL> http://www/vhdl.org/pub/ibis or URL> ftp://www/vhdl.org/pub/ibis click on 'models' Using FTP: ftp to vhdl.org or ftp to 198.31.14.3 and login as anonymous password can be your E-mail id change dir using cd to /pub/ibis/models use ftp command 'get' to copy files. Using Dial-up Modem: Use any communication software on your PC (Ex. QuikLink, Procomm, LapLink. Terminal(Windows) etc) Dial: (415)335-0110 Login as guest Password: just hit return You will see the Welcome message from VHDL and it will prompt for password again. Enter your E-mail id this time Typical Modem setup: Baudrate=upto 14.4 Databit=8 Stop=1 Parity=None Flow=Xon/Xoff You can download files using "kermit","zmodem" or "sz" etc 5.0 Can IBIS model best case, worst case models ? Yes, by using the min, max current with the proper min, max ramp rates, the Best, Typical and Worst case can be modeled. 6.0 Can IBIS model SSO(Simultaneous Switching Output) ? IBIS as a model, has the key parameters required to model an SSO event. These are mainly the package inductance, other associated parasitics and the number of buffers switching. IBIS specifies R, L and C in matrix format and the use of a matrix for the inductance accounts for the "loop"inductance i.e. the mutuals between the pins. Specifying the mutual inductance is necessary to account for SSO event simulation. [Pin Mapping] keyword was specifically defined in IBISv2.1 to handle SSO defination. Simulating SSO depends on the model provided and the simulator used. 7.0 Why do we need to sweep -Vcc to 2Vcc ? Simulation accuracy is greatly enhanced by the "beyond-the-rail" data. Overshoot and undershoot generally fall within this range, and the range encompasses the forward-biased regions of protection diodes often used on buffers. Also, reflections caused by improper terminations can produce voltages at the driver/receiver terminals from -Vcc to 2Vcc. The drivers and receivers, therefore, need to be modeled over this entire range. Since measurement of diodes over the entire range is often not possible, measurement over a reasonable range and extrapolation of data to the end-point values is permitted to produce IBIS models. Most non-SPICE based simulators will do their own extrapolation to get to the end point. Most Spice simulators truncate data to the table end-points. The -Vcc to 2Vcc range ensures consistent performance for both types of simulators. 8.0 Can IBIS model GTO(Gradual Turn On) or Slew rate controlled outputs ? IBISv2.1 can model RTC(Rise Time Controlled), GTO(Gradual Turn on) or Slew rate controlled outputs. These are defined under [Rising Waveform] and [Falling Waveform] keywords. The waveform tables can also serve as "golden waveforms" to check simulator accuracy, since the load conditions that produced the tables are specified. That is, the simulator should produce these waveforms when the model is connected to the specified loads. See IBISv2.1 specification for more details. 9.0 Can IBIS model ground bounce ? Yes, IBIS contains the the package parasitic information necessary to simulate ground bounce. Even though the data is available within the model file, not all simulators may be able to use it to simulate ground bounce. Refer to your respective simulator for support. 10.0 Can IBIS provide timing information ? ex.propdelays, skew etc No, the present IBISv2.1 does not provide timing information. 11.0 Can IBIS model be used to measure propagation delays ? IBISv2.1 does not support measurement of propagation delays. IBIS is mainly used to simulate transmission lines and analyze signal integrity issues. 12.0 What type of Input/output structures are supported by IBIS ? Following is a list of the output model types supported by IBISv2.1: Input, Input_ECL, Output_ECL, I/O_ECL, I/O, I/O_open_drain, I/O_open_sink, I/O_open_source,Input_ECL, I/O_ECL, Terminator, Output, 3-state, Open_sink, Open_drain, Open_source Refer to IBISv2.1 for a full explanation of the Input/Output structures. 13.0 How do I release an IBIS model to the Internet ? North Carolina State University handles all IBIS model releases to the Internet. Follow the procedure described below to release a model: PROCEDURE FOR SUBMITTING A MODEL TO THE IBIS MODEL LIBRARY January 6, 1994 Michael Steer IBIS Model Librarian Department of Electrical and Computer Engineering North Carolina State University Raleigh, NC 27695-7911 phone: +1-919-515-5191 fax: +1-919-515-3027 email: mbs@ncsu.edu (preferred means of communication) Vendors and others are encouraged to submit IBIS models to the IBIS model library. The IBIS librarian maintains the IBIS models stored on vhdl.org in the directory /pub/ibis/models . 1. Before submission models must be readable by the Golden Parser with out errors or warning messages being generated. 2. A submission should consist of the following: a. A readme file ( named README.TXT ) including the following Name of Person Submitting: XXXXXXXXXXXX Address: XXXXXXXXXXXXXXXXXXXXXXXXXXXX Affiliation: XXXXXXXXXXXXXXXXXXXXXXXXXXXX E-Mail: XXXXXXXXXXXXXXX Telephone Number: XXXXXXXXXXXXXXXXXXXXXXX Fax Number: XXXXXXXXXXXXXXXXXXXXXXX Suggested Directory Structure XXXXXXXXXXX Structure for models b. A Model Transfer Agreement Use the sample below) must be signed and mailed to the IBIS librarian < mbs@ncsu.edu >. The model transfer agreement must be MAILED to Dr. Michael Steer Attn: IBIS Department of Electrical and Computer Engineering North Carolina State University Raleigh, NC 27696-7911 The above address is good for the post-office, Federal Express, Airborne, UPS etc. even though there is no street address. The model check-in procedure will not be finalized until this agreement has been received by the IBIS librarian. c. All files should be in a single file before emailing to the IBIS librarian. Use one of the following four methods: 1. [ gnu tar AND ( uuencode OR mmencode ) ] 2. [ tar AND compressed AND ( uuencode OR mmencode ) ] 3. [ zip AND ( uuencoded OR mmencode'd ) ] 4. [ zip ] Note that zip'ing alone may result in problems due to non-ascii characters. You can obtain suitable programs for DOS as follows: ftp oak.oakland.edu login as anonymous binary // to put in binary transfer mode cd /pub/msdos/zip get pkz204g.exe // the zip archive create/extract program. Run this program to generate the required utilities cd /pub/msdos/compress get comp430d.zip // Unix-compatible 16bit compress/uncompress utility cd /pub/msdos/decode get qux01_91.zip // UUencode/UUdecode quit // finish up Expect an acknowledgement within two days. 3. When models are received: a. The following will be added to each IBIS file if not already present: [Disclaimer] IBIS Open Forum disclaims all warranties. See DISCLAIM.TXT in vhdl.org:/pub/IBIS/models for the full disclaimer. b. The IBIS models will be checked with the Golden Parser and if they parse successfully they will be accepted. 4. The IBIS models will be treated as confidential until they are publically released. When new models are added an announcement will be made. ============================================================================== IBIS Model Transfer Agreement The under-signed submitter has submitted the following models to the IBIS library (list model filenames) ------------------------------------------------------------------------------ ------------------------------------------------------------------------------ ------------------------------------------------------------------------------ The submitter authorizes inclusion of the submitted models in the model library. The model files will be provided as is except for the addition of the following statement to each file: [Disclaimer] IBIS Open Forum disclaims all warranties. See DISCLAIM.TXT in vhdl.org:/pub/IBIS/models for the full disclaimer. If the models were written as a work made for hire in the course of employment, the Work is owned by the company/employer which must sign this agreement in the space provided below. Submitter's Signature and Date _______________________________ Typed or Printed Name and Title _______________________________ Institution or Company _____________________________________________ Authorization (if required) _______________________________ Typed or Printed Name and Title _______________________________ Please Check ___________ ___ Submitter's Own Work | | |__| ___ Work done for Hire | | |__| 14.0 It is rightly pointed out that the pulldown and pullup characteristic for tristate outputs may be non-monotonic. The standard says that this can happen in at most one place. The i-v characteristic may then locally have a negative resistance. Will this not pose a problem to simulators ? The IBIS standard specifies that the pullup and pulldown curves contain pullup and pulldown data ONLY, i.e. in the region where the clamp diodes are active the current due to the clamp diodes must be subtracted from the pullup/pulldown current. This is where the non-monotonic curves come from -- at the extremes of the I/V curves where you are subtracting a large diode current from the combined diode/on-state-IV curve. In practice, a simulator sums the two currents together (power clamp and pullup or gnd clamp and pulldown) thereby making the result monotonic. 15.0 Is there a provision for specifying a pad or die resistance i.e R_comp in addition to C_comp? No. The effects of a pad or die resistance are accounted for in the I/V curves. 16.0 The standard does not explicity specify the nature of the input ramp in obtaining ramp rates. What should be the input rise time as well as the high and low values of the input pulse? IBIS does not provide an Input pulse specification for deriving Ramp rates (and Waveform Tables). A reasonable guideline is to mimic actual conditions for which the device would be used. Therefore it is probably better not to mandate a specific condition. The voltage swing should be appropriate for the technology, e.g., 0 to 5V for CMOS and about 0 to 3V for TTL. A signal faster than the expected Ramp rates is preferred, although a case could be made to provide a response that mimics the data book input ramps specified for timing tests.Possibly a 50 Ohm series resistance approximating the pulser source impedance and trace environment to the device input should be included. However, since the actual thresholds are narrow (several 100 mV), the Ramp rates and Waveform tables should not differ significantly for any reasonable, appropriate Input. 17.0 How do I become an active participant in IBIS activities? To participate in IBIS discussions, send your email address to ibis-request@vhdl.org (198.31.14.3). You will be added to the IBIS reflector, which is a mail group used by IBIS partipants to exchange ideas and data. Notices of upcoming teleconferences, agendas, and meeting minutes are also distributed through the IBIS reflector. END