| [IBIS Ver] 1.1 [File name] pp100sem.ibs [File Rev] 3.0 [Date] 10/15/94 [Source] File originated at Intel Corporation. | Copyright 1994 by Intel Corp. | [Notes] The following information corresponds to the Pentium(TM) Processor at iComp(TM) index 735\90 MHz and Pentium(TM) Processor at iComp(TM) index 815\100 MHz I/O buffers in the SEM-in-IBIS format. The SEM-in-IBIS format model is created by replacing the output resistance used by the Simplified Electrical Model (SEM) shown in the data book with a simple two-point straight line I-V curve table that is used in the IBIS model. | | [Disclaimer] This information is for modeling purposes only, and is not guaranteed. [Disclaimer] IBIS Open Forum disclaims all warranties. See DISCLAIM.TXT in vhdl.org:/pub/IBIS/models for the full disclaimer. |------------------------------------------------------------------ | [Component] Pentium_processor(735\90,815\100) [Manufacturer] Intel [Package] | | typ min max R_pkg 0.00m 0.00m 0.00m L_pkg 11.33nH 8.24nH 14.41nH C_pkg 3.48pF 1.67pF 5.29pF | |------------------------------------------------------------------ | [Pin] signal_name model_name R_pin L_pin C_pin | | The per pin package information listed for I/O_EB1 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 8.2nH 18.4nH | C_pin 1.3pF 7.0pF | A5 D41 I/O_EB1 NA 13.3nH 4.15pF A31 D22 I/O_EB1 NA 13.3nH 4.15pF A33 D18 I/O_EB1 NA 13.3nH 4.15pF A35 D15 I/O_EB1 NA 13.3nH 4.15pF B4 D43 I/O_EB1 NA 13.3nH 4.15pF B30 D20 I/O_EB1 NA 13.3nH 4.15pF B32 D16 I/O_EB1 NA 13.3nH 4.15pF B34 D13 I/O_EB1 NA 13.3nH 4.15pF B36 D11 I/O_EB1 NA 13.3nH 4.15pF C3 D47 I/O_EB1 NA 13.3nH 4.15pF C5 D45 I/O_EB1 NA 13.3nH 4.15pF C7 DP4 I/O_EB1 NA 13.3nH 4.15pF C9 D38 I/O_EB1 NA 13.3nH 4.15pF C11 D36 I/O_EB1 NA 13.3nH 4.15pF C13 D34 I/O_EB1 NA 13.3nH 4.15pF C15 D32 I/O_EB1 NA 13.3nH 4.15pF C17 D31 I/O_EB1 NA 13.3nH 4.15pF C19 D29 I/O_EB1 NA 13.3nH 4.15pF C21 D27 I/O_EB1 NA 13.3nH 4.15pF C23 D25 I/O_EB1 NA 13.3nH 4.15pF C25 DP2 I/O_EB1 NA 13.3nH 4.15pF C27 D24 I/O_EB1 NA 13.3nH 4.15pF C29 D21 I/O_EB1 NA 13.3nH 4.15pF C31 D17 I/O_EB1 NA 13.3nH 4.15pF C33 D14 I/O_EB1 NA 13.3nH 4.15pF C35 D10 I/O_EB1 NA 13.3nH 4.15pF C37 D9 I/O_EB1 NA 13.3nH 4.15pF D2 D50 I/O_EB1 NA 13.3nH 4.15pF D4 D48 I/O_EB1 NA 13.3nH 4.15pF D6 D44 I/O_EB1 NA 13.3nH 4.15pF D8 D40 I/O_EB1 NA 13.3nH 4.15pF D10 D39 I/O_EB1 NA 13.3nH 4.15pF D12 D37 I/O_EB1 NA 13.3nH 4.15pF D14 D35 I/O_EB1 NA 13.3nH 4.15pF D16 D33 I/O_EB1 NA 13.3nH 4.15pF D18 DP3 I/O_EB1 NA 13.3nH 4.15pF D20 D30 I/O_EB1 NA 13.3nH 4.15pF D22 D28 I/O_EB1 NA 13.3nH 4.15pF D24 D26 I/O_EB1 NA 13.3nH 4.15pF D26 D23 I/O_EB1 NA 13.3nH 4.15pF D28 D19 I/O_EB1 NA 13.3nH 4.15pF D30 DP1 I/O_EB1 NA 13.3nH 4.15pF D32 D12 I/O_EB1 NA 13.3nH 4.15pF D34 D8 I/O_EB1 NA 13.3nH 4.15pF D36 DP0 I/O_EB1 NA 13.3nH 4.15pF E1 D54 I/O_EB1 NA 13.3nH 4.15pF E3 D52 I/O_EB1 NA 13.3nH 4.15pF E5 D49 I/O_EB1 NA 13.3nH 4.15pF E7 D46 I/O_EB1 NA 13.3nH 4.15pF E9 D42 I/O_EB1 NA 13.3nH 4.15pF E33 D7 I/O_EB1 NA 13.3nH 4.15pF E35 D6 I/O_EB1 NA 13.3nH 4.15pF F2 DP6 I/O_EB1 NA 13.3nH 4.15pF F4 D51 I/O_EB1 NA 13.3nH 4.15pF F6 DP5 I/O_EB1 NA 13.3nH 4.15pF F34 D5 I/O_EB1 NA 13.3nH 4.15pF F36 D4 I/O_EB1 NA 13.3nH 4.15pF G3 D55 I/O_EB1 NA 13.3nH 4.15pF G5 D53 I/O_EB1 NA 13.3nH 4.15pF G33 D3 I/O_EB1 NA 13.3nH 4.15pF G35 D1 I/O_EB1 NA 13.3nH 4.15pF H4 D56 I/O_EB1 NA 13.3nH 4.15pF J3 D57 I/O_EB1 NA 13.3nH 4.15pF J5 D58 I/O_EB1 NA 13.3nH 4.15pF J35 D2 I/O_EB1 NA 13.3nH 4.15pF K4 D59 I/O_EB1 NA 13.3nH 4.15pF K34 D0 I/O_EB1 NA 13.3nH 4.15pF L3 D61 I/O_EB1 NA 13.3nH 4.15pF L5 D60 I/O_EB1 NA 13.3nH 4.15pF M4 D62 I/O_EB1 NA 13.3nH 4.15pF N3 D63 I/O_EB1 NA 13.3nH 4.15pF N5 DP7 I/O_EB1 NA 13.3nH 4.15pF T4 M/IO# I/O_EB1 NA 13.3nH 4.15pF U3 CACHE# I/O_EB1 NA 13.3nH 4.15pF AA3 PHIT# I/O_EB1 NA 13.3nH 4.15pF AC3 PHITM# I/O_EB1 NA 13.3nH 4.15pF AD4 PBGNT# I/O_EB1 NA 13.3nH 4.15pF AE3 PBREQ# I/O_EB1 NA 13.3nH 4.15pF AE33 A23 I/O_EB1 NA 13.3nH 4.15pF AF34 A21 I/O_EB1 NA 13.3nH 4.15pF AG33 A27 I/O_EB1 NA 13.3nH 4.15pF AG35 A24 I/O_EB1 NA 13.3nH 4.15pF AH4 LOCK# I/O_EB1 NA 13.3nH 4.15pF AH34 A26 I/O_EB1 NA 13.3nH 4.15pF AH36 A22 I/O_EB1 NA 13.3nH 4.15pF AJ3 HLDA I/O_EB1 NA 13.3nH 4.15pF AJ33 A31 I/O_EB1 NA 13.3nH 4.15pF AJ35 A25 I/O_EB1 NA 13.3nH 4.15pF AK2 AP I/O_EB1 NA 13.3nH 4.15pF AK4 D/C# I/O_EB1 NA 13.3nH 4.15pF AK10 BE1# I/O_EB1 NA 13.3nH 4.15pF AK12 BE3# I/O_EB1 NA 13.3nH 4.15pF AK34 A29 I/O_EB1 NA 13.3nH 4.15pF AK36 A28 I/O_EB1 NA 13.3nH 4.15pF AL9 BE0# I/O_EB1 NA 13.3nH 4.15pF AL11 BE2# I/O_EB1 NA 13.3nH 4.15pF AL13 BE4# I/O_EB1 NA 13.3nH 4.15pF AL17 SCYC I/O_EB1 NA 13.3nH 4.15pF AM36 A30 I/O_EB1 NA 13.3nH 4.15pF |------------------------------------------------------------ |* The Pentium Processor has 3 different strenght for the I/O_EB2 Buffer. |* In the Pentium Processor Data Book, they are listed as I/O_EB2, |* I/O_EB2A and I/O_EB2B. All three of the Buffers |* have the same output capacitance and packaging parastics. |* If one needs to model any one of these three buffers, just |* replace the model_name with appropriate buffer model name next |* to the pin listing. | | The per pin package information listed for I/O_EB2 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 8.5nH 16.0nH | C_pin 1.3pF 5.4pF | AJ5 ADS# I/O_EB2 NA 12.25nH 3.35pF AK22 A19 I/O_EB2 NA 12.25nH 3.35pF AK24 A17 I/O_EB2 NA 12.25nH 3.35pF AK26 A15 I/O_EB2 NA 12.25nH 3.35pF AK28 A13 I/O_EB2 NA 12.25nH 3.35pF AK30 A9 I/O_EB2 NA 12.25nH 3.35pF AK32 A5 I/O_EB2 NA 12.25nH 3.35pF AL5 HITM# I/O_EB2 NA 12.25nH 3.35pF AL21 A20 I/O_EB2 NA 12.25nH 3.35pF AL23 A18 I/O_EB2 NA 12.25nH 3.35pF AL25 A16 I/O_EB2 NA 12.25nH 3.35pF AL27 A14 I/O_EB2 NA 12.25nH 3.35pF AL29 A12 I/O_EB2 NA 12.25nH 3.35pF AL31 A11 I/O_EB2 NA 12.25nH 3.35pF AL33 A7 I/O_EB2 NA 12.25nH 3.35pF AL35 A3 I/O_EB2 NA 12.25nH 3.35pF AM6 W/R# I/O_EB2 NA 12.25nH 3.35pF AM32 A8 I/O_EB2 NA 12.25nH 3.35pF AM34 A4 I/O_EB2 NA 12.25nH 3.35pF AN31 A10 I/O_EB2 NA 12.25nH 3.35pF AN33 A6 I/O_EB2 NA 12.25nH 3.35pF |------------------------------------------------------------ | The per pin package information listed for I/O_EB3 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 10.5nH 14.3nH | C_pin 1.90pF 4.2pF | AK6 HIT# I/O_EB3 NA 12.4n 3.05p |------------------------------------------------------------- | The per pin package information listed for I/O_EB4 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 10.7nH 14.6nH | C_pin 2.00pF 4.3pF | | J33 PICD0 I/O_EB4 NA 12.65n 3.15p L35 PICD1 I/O_EB4 NA 12.65n 3.15p | |------------------------------------------------------------- | The per pin package information listed for I/O_EB5 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 8.1nH 16.3nH | C_pin 1.1pF 5.8pF | N33 TDO OUT_ED1 NA 12.2nH 3.45pF P4 IERR# OUT_ED1 NA 12.2nH 3.45pF Q3 PM0/BP0 OUT_ED1 NA 12.2nH 3.45pF Q5 FERR# OUT_ED1 NA 12.2nH 3.45pF R4 PM1/BP1 OUT_ED1 NA 12.2nH 3.45pF S3 BP2 OUT_ED1 NA 12.2nH 3.45pF S5 BP3 OUT_ED1 NA 12.2nH 3.45pF AC5 PRDY OUT_ED1 NA 12.2nH 3.45pF AE5 APCHK# OUT_ED1 NA 12.2nH 3.45pF AF4 PCHK# OUT_ED1 NA 12.2nH 3.45pF AG3 SMIACT# OUT_ED1 NA 12.2nH 3.45pF AG5 PCD OUT_ED1 NA 12.2nH 3.45pF AJ1 BREQ OUT_ED1 NA 12.2nH 3.45pF AK14 BE5# OUT_ED1 NA 12.2nH 3.45pF AK16 BE7# OUT_ED1 NA 12.2nH 3.45pF AL3 PWT OUT_ED1 NA 12.2nH 3.45pF AL15 BE6# OUT_ED1 NA 12.2nH 3.45pF AM2 ADSC# OUT_ED1 NA 12.2nH 3.45pF AE35 D/P# OUT_ED1 NA 12.2nH 3.45pF | |------------------------------------------------------------- | The per pin package information listed for INPUT_ER0 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 4.0nH 6.0nH | C_pin 3.0pF 5.0pF | AK18 CLK INPUT_ER0 NA 5.0nH 4.0pF | |------------------------------------------------------------- | The per pin package information listed for INPUT_ER1/ER2 | is the average of the min and max data. The minimum | and maximum values listed in the Data Book are: | min max | L_pin 7.7nH 15.3nH | C_pin 1.1pF 5.3pF | M34 TCK INPUT_ER1 NA 11.5nH 3.2pF N35 TDI INPUT_ER1 NA 11.5nH 3.2pF P34 TMS INPUT_ER1 NA 11.5nH 3.2pF Q33 TRST# INPUT_ER1 NA 11.5nH 3.2pF Q35 CPUTYP INPUT_ER1 NA 11.5nH 3.2pF V34 STPCLK# INPUT_ER1 NA 11.5nH 3.2pF X4 BRDY# INPUT_ER1 NA 11.5nH 3.2pF Y3 BRDYC# INPUT_ER1 NA 11.5nH 3.2pF Y33 BF INPUT_ER1 NA 11.5nH 3.2pF Y35 FRCMC# INPUT_ER1 NA 11.5nH 3.2pF Z34 PEN# INPUT_ER1 NA 11.5nH 3.2pF AA33 INIT INPUT_ER1 NA 11.5nH 3.2pF AA35 IGNNE# INPUT_ER1 NA 11.5nH 3.2pF AB4 HOLD INPUT_ER1 NA 11.5nH 3.2pF AB34 SMI# INPUT_ER1 NA 11.5nH 3.2pF AC33 NMI INPUT_ER1 NA 11.5nH 3.2pF AC35 R/S# INPUT_ER1 NA 11.5nH 3.2pF AD34 INTR INPUT_ER1 NA 11.5nH 3.2pF AK8 A20M# INPUT_ER1 NA 11.5nH 3.2pF AK20 RESET INPUT_ER1 NA 11.5nH 3.2pF AL7 BUSCHK# INPUT_ER1 NA 11.5nH 3.2pF AN7 FLUSH# INPUT_ER1 NA 11.5nH 3.2pF H34 PICCLK INPUT_ER2 NA 11.5nH 3.2pF U5 INV INPUT_ER2 NA 11.5nH 3.2pF V4 AHOLD INPUT_ER2 NA 11.5nH 3.2pF W3 EWBE# INPUT_ER2 NA 11.5nH 3.2pF W5 KEN# INPUT_ER2 NA 11.5nH 3.2pF Y5 NA# INPUT_ER2 NA 11.5nH 3.2pF Z4 BOFF# INPUT_ER2 NA 11.5nH 3.2pF AA5 WB/WT# INPUT_ER2 NA 11.5nH 3.2pF AM4 EADS# INPUT_ER2 NA 11.5nH 3.2pF | | The following are the ground, power and NC pins | A3 VSS GND B6 VSS GND B8 VSS GND B10 VSS GND B12 VSS GND B14 VSS GND B16 VSS GND B18 VSS GND B20 VSS GND B22 VSS GND B24 VSS GND B26 VSS GND B28 VSS GND H2 VSS GND H36 VSS GND K2 VSS GND K36 VSS GND M2 VSS GND M36 VSS GND P2 VSS GND P36 VSS GND R2 VSS GND R36 VSS GND T2 VSS GND T36 VSS GND U35 VSS GND V2 VSS GND V36 VSS GND X2 VSS GND X36 VSS GND Z2 VSS GND Z36 VSS GND AB2 VSS GND AB36 VSS GND AD2 VSS GND AD36 VSS GND AF2 VSS GND AF36 VSS GND AH2 VSS GND AJ37 VSS GND AL37 VSS GND AM8 VSS GND AM10 VSS GND AM12 VSS GND AM14 VSS GND AM16 VSS GND AM18 VSS GND AM20 VSS GND AM22 VSS GND AM24 VSS GND AM26 VSS GND AM28 VSS GND AM30 VSS GND AN37 VSS GND A7 VCC POWER A9 VCC POWER A11 VCC POWER A13 VCC POWER A15 VCC POWER A17 VCC POWER A19 VCC POWER A21 VCC POWER A23 VCC POWER A25 VCC POWER A27 VCC POWER A29 VCC POWER B2 VCC POWER E37 VCC POWER G1 VCC POWER G37 VCC POWER J1 VCC POWER J37 VCC POWER L1 VCC POWER L33 VCC POWER L37 VCC POWER N1 VCC POWER N37 VCC POWER Q1 VCC POWER Q37 VCC POWER S1 VCC POWER S37 VCC POWER T34 VCC POWER U1 VCC POWER U33 VCC POWER U37 VCC POWER W1 VCC POWER W37 VCC POWER Y1 VCC POWER Y37 VCC POWER AA1 VCC POWER AA37 VCC POWER AC1 VCC POWER AC37 VCC POWER AE1 VCC POWER AE37 VCC POWER AG1 VCC POWER AG37 VCC POWER AN9 VCC POWER AN11 VCC POWER AN13 VCC POWER AN15 VCC POWER AN17 VCC POWER AN19 VCC POWER AN21 VCC POWER AN23 VCC POWER AN25 VCC POWER AN27 VCC POWER AN29 VCC POWER A03 NC NC AL01 NC NC AN01 NC NC AN3 NC NC AN5 NC NC B02 NC NC C1 NC NC W33 NC NC A37 NC NC R34 NC NC S33 NC NC S35 NC NC W35 NC NC X34 NC NC AL19 NC NC AN35 NC NC | |---------- BEGINING OF MODEL DESCRIPTION---------------------- | [Model] I/O_EB1 Model_type I/O Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals A[31:21], BE[3:0]#, CACHE#, D/C#, D[63:0], DP[8:0], | HLDA,LOCK#,M/IO#,PBGNT#,PBREQ#,PHIT#,PHITM#,SCYC | | typ min max C_comp 2.3pF 2.0pF 2.6pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | |------------------------------------------------------------------ | the pulldown and pullup data is a straight line resistance | taken from SEM model |------------------------------------------------------------------ | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -108.50mA -72.98mA -211.43mA 7.4V 217.01mA 145.96mA 422.86mA | [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 99.06mA 68.68mA 171.30mA 7.4V -198.12mA -139.36mA -342.59mA | |Ramp data [Ramp] | typ min max dV/dt_r 1.98/1.17n 1.8/1.80n 2.22/0.54n dV/dt_f 1.98/1.08n 1.8/1.68n 2.22/0.48n | |------------------------------------------------------------------ | | [Model] I/O_EB2 Model_type I/O Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals A[20:3], ADS#, HITM#, W/R# | | typ min max C_comp 9.4pF 9.1pF 9.7pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -108.50mA -72.98mA -211.43mA 7.4V 217.01mA 145.96mA 422.86mA | [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 99.06mA 68.68mA 171.30mA 7.4V -198.12mA -139.36mA -342.59mA | | |Ramp data [Ramp] | typ min max | dV/dt_r 1.98/1.17n 1.8/1.80n 2.22/0.54n dV/dt_f 1.98/1.08n 1.8/1.68n 2.22/0.48n | |------------------------------------------------------------------ | | [Model] I/O_EB2A Model_type I/O Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals A[20:3], ADS#, HITM#, W/R# | | typ min max C_comp 9.4pF 9.1pF 9.7pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -245.03mA -174.53mA -411.11mA 7.4V 490.07mA 349.06mA 822.22mA [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 227.69mA 165.18mA 366.34mA 7.4V -455.38mA -330.36mA -732.67mA | | |Ramp data [Ramp] | typ min max | dV/dt_r 1.98/.99n 1.8/1.44n 2.22/0.54n dV/dt_f 1.98/.99n 1.8/1.44n 2.22/0.54n |------------------------------------------------------------------ | | [Model] I/O_EB2B Model_type I/O Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals A[20:3], ADS#, HITM#, W/R# | | typ min max C_comp 9.4pF 9.1pF 9.7pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -437.87mA -300.81mA -804.35mA 7.4V 875.74mA 601.62mA 1.609A [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 402.17mA 286.82mA 672.73mA 7.4V -804.35mA -573.64mA -1.345A | | |Ramp data [Ramp] | typ min max | dV/dt_r 1.98/.75n 1.8/1.08n 2.22/0.42n dV/dt_f 1.98/.75n 1.8/1.08n 2.22/0.42n |------------------------------------------------------------------ [Model] I/O_EB3 Model_type I/O Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals HIT# | | typ min max C_comp 3.6pF 3.3pF 3.9pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -108.50mA -72.98mA -211.43mA 7.4V 217.01mA 145.96mA 422.86mA | [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 99.06mA 68.68mA 171.30mA 7.4V -198.12mA -139.36mA -342.59mA | |Ramp data [Ramp] | typ min max | dV/dt_r 1.98/1.17n 1.8/1.80n 2.22/0.54n dV/dt_f 1.98/1.08n 1.8/1.68n 2.22/0.48n |------------------------------------------------------------------ | [Model] I/O_EB4 Model_type I/O Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals PICD0, PICD1 | | typ min max C_comp 6.0pF 5.0pF 7.0pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -108.50mA -72.98mA -211.43mA 7.4V 217.01mA 145.96mA 422.86mA | [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 99.06mA 68.68mA 171.30mA 7.4V -198.12mA -139.36mA -342.59mA | |Ramp data [Ramp] | typ min max | dV/dt_r 1.98/1.17n 1.8/1.80n 2.22/0.54n dV/dt_f 1.98/1.08n 1.8/1.68n 2.22/0.48n | |------------------------------------------------------------------ | [Model] OUT_ED1 Model_type Output Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals ADSC#, APCHK#, BE4-7#, BP2-3, BREQ, PM1/BP1, | PM0/BP0, FERR#, IERR, PCD, PCHK#, PRDY, | PWT, SMIACT#, TDO, D/P# | | typ min max C_comp 2.3pF 2.0pF 2.6pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | [Pulldown] | falling | voltage I(typ) I(min) I(max) -3.7V -108.50mA -72.98mA -211.43mA 7.4V 217.01mA 145.96mA 422.86mA | [Pullup] | rising | voltage I(typ) I(min) I(max) -3.7V 99.06mA 68.68mA 171.30mA 7.4V -198.12mA -139.36mA -342.59mA | |Ramp data [Ramp] | typ min max | dV/dt_r 1.98/1.17n 1.8/1.80n 2.22/0.54n dV/dt_f 1.98/1.08n 1.8/1.68n 2.22/0.48n |------------------------------------------------------------------ | [Model] INPUT_ER0 Model_type Input Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals CLK | | typ min max C_comp 1.0pF 0.8pF 1.2pF | | typ min max [Voltage range] 3.3V 3.0V 3.7V | | | Diode curves was extracted using Hspice with the | diode parameters given in the Pentium Processor Data Book. | [GND_clamp] | | Voltage I(typ) I(min) I(max) 0.0 0.0mA NA NA -0.40 0.0mA NA NA -0.60 -0.00466m NA NA -0.70 -0.11980m NA NA -0.90 -10.050m NA NA -1.10 -34.960m NA NA -1.30 -62.960m NA NA -1.50 -91.950m NA NA -1.70 -121.40m NA NA -1.90 -151.20m NA NA -2.10 -181.10m NA NA -2.30 -211.10m NA NA -2.50 -241.30m NA NA -3.00 -316.69m NA NA -3.30 -362.40m NA NA | [POWER_clamp] | voltage I(typ) I(min) I(max) 0.0 0.0mA NA NA -0.30 0.0mA NA NA -1.00 0.1806m NA NA -1.10 3.650m NA NA -1.20 13.81m NA NA -1.30 26.60m NA NA -1.50 54.53m NA NA -1.70 83.61m NA NA -1.90 113.2m NA NA -2.00 128.1m NA NA -2.20 158.0m NA NA -2.40 188.1m NA NA -2.50 203.2m NA NA -2.70 233.4m NA NA -2.90 263.7m NA NA -3.00 278.9m NA NA -3.30 324.4m NA NA -3.60 370.0m NA NA | | |------------------------------------------------------------------ [Model] INPUT_ER1 Model_type Input Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals A20M#,BF,BRDY#,BRDYC#, | BUSCLK#,FLUSH#, FRCMC#, | HOLD, IGNNE#, INIT,INTR, | NMI, PEN#, R/S#,RESET, SMI#, | STPCLK#, TCK, TDI, TMS, TRST# | | typ min max C_comp 1.0pF 0.8pF 1.2pF | | typ min max [Voltage range] 3.3V 3.0V 3.6V | | | Diode curves was extracted using Hspice with the | diode parameters given in the Pentium Processor Data Book. [GND_clamp] | Voltage I(typ) I(min) I(max) 0.0 0.0mA NA NA -0.40 0.0mA NA NA -0.60 -0.00466m NA NA -0.70 -0.11980m NA NA -0.90 -10.050m NA NA -1.10 -34.960m NA NA -1.30 -62.960m NA NA -1.50 -91.950m NA NA -1.70 -121.40m NA NA -1.90 -151.20m NA NA -2.10 -181.10m NA NA -2.30 -211.10m NA NA -2.50 -241.30m NA NA -3.00 -316.69m NA NA -3.30 -362.40m NA NA | [POWER_clamp] | voltage I(typ) I(min) I(max) 0.0 0.0mA NA NA -0.30 0.0mA NA NA -1.00 0.1806m NA NA -1.10 3.650m NA NA -1.20 13.81m NA NA -1.30 26.60m NA NA -1.50 54.53m NA NA -1.70 83.61m NA NA -1.90 113.2m NA NA -2.00 128.1m NA NA -2.20 158.0m NA NA -2.40 188.1m NA NA -2.50 203.2m NA NA -2.70 233.4m NA NA -2.90 263.7m NA NA -3.00 278.9m NA NA -3.30 324.4m NA NA -3.60 370.0m NA NA |------------------------------------------------------------- | | INPUT_ER2 is the special input model, | it contains 9 signals. The Power | clamp in this case is 6 diodes in series | to vcc, and will not conduct for | pad voltage < vcc + 3.0 volt. | Diode curves was extracted using Hspice with the | diode parameters given in the Pentium Processor Data Book. [Model] INPUT_ER2 Model_type Input Polarity Non-Inverting Enable Active-Low Vinh = 2.0V Vinl = 0.8V |signals AHOLD, EADS#, KEN#, WB/WT#, INV, NA#, EWBE#, BOFF#, | PICCLK | | typ min max C_comp 1.0pF 0.8pF 1.2pF | | typ min max [Voltage range] 3.3V 3.0V 3.6V | | [GND_clamp] | | Voltage I(typ) I(min) I(max) 0 0 NA NA -0.4V 0 NA NA -0.5V 0 NA NA -0.6V -0.0005mA NA NA -0.7V -0.1198mA NA NA -0.8V -2.080mA NA NA -0.9V -10.05mA NA NA -1.0V -21.80mA NA NA -1.5V -91.95mA NA NA -2.0V -166.1mA NA NA -2.5V -241.3mA NA NA -3.0V -316.9mA NA NA -3.3V -362.4mA NA NA | [POWER_clamp] | voltage I(typ) I(min) I(max) 0 0 NA NA -1.0V 0 NA NA -2.0V 0 NA NA -3.7V 0.00737mA NA NA -4.2V 0.1807mA NA NA -4.7V 2.546mA NA NA -5.2V 9.97mA NA NA -5.7V 20.0mA NA NA -6.2V 31.1mA NA NA -6.7V 42.68mA NA NA [end]