IEEE P1850 -
Standard for PSL - Property Specification Language
The IEEE P1850 PAR can be accessed by clicking here.
Scope:
The Accellera Property Specification Language (PSL), a language for formal specification of electronic system behavior, was developed by Accellera, a consortium of Electronic Design Automation (EDA), semiconductor, and system companies. The proposed project will create an initial IEEE standard based upon Accellera PSL version 1.1. The IEEE standard will refine Accellera PSL version 1.1, addressing errata and a few minor technical issues and clarifying how PSL interfaces with various standard electronic system design languages.
Purpose:
The purpose of this project is to provide a well-defined language for formal specification of electronic system behavior, one that is compatible with multiple electronic system design languages, including IEEE 1076 VHDL, IEEE 1364 Verilog, IEEE 1800 System Verilog, and OSCI SystemC, to facilitate a common specification and verification flow for multi-language and mixed-language designs.
Contacts:
Harry Foster
IEEE-1850 Chair
Sitvanit Ruah
IEEE-1850 Co-Chair
N. S. Subramanian (NSS)
IEEE-1850 Secretary
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Accellera PSL v1.1 was winner of the 2005 IEC DesignVision award!
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P1850 PSL
