From: Daniel Leu [daniel.leu@gmail.com] Peter, a) I don't think too many people use exactly the same name as in the proposal. So it is not that likely that something will be broken. b) If something is broken, the fix is easy. Like the FILE issue years ago (and I still encounter it :) I think it is worthwhile to go ahead with this modif/enhancement. -- -- Daniel ---------------------------------------------------------------- From: rickman If the example you gave is the only way in which existing code could break, I don't see that as a major roadblock. It would be very simple to pick a new name for use in a model and do a global substitution. This should be easy to do without affecting the operation of the code. I know that models have had a lot of work done with them to develop and debug. But a name change can be done without affecting the code functionality. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ---------------------------------------------------------------- From: Mike Treseler Peter Ashenden wrote: > The proposal is to > define vector types for BOOLEAN, INTEGER, REAL and TIME. Users have > commented that these types would be useful for verification models, among > other applications. That would be a convenience. > The down side is that there is potential to break existing models. Suppose, > for example, a model declares INTEGER_VECTOR in a package MY_TYPES, and then > uses the package throughout the model with use clauses. I expect that most would find and fix that soon after the first simulation compile. > We would appreciate feedback from users on their preferred option: adding > the proposed types to STANDARD, or not adding the types to avoid breaking > legacy models. I would add the types. The odds of tripping over them is small and recovery is swift for the unlucky. -- Mike Treseler ---------------------------------------------------------------- From: Paul Uiterlinden Peter Ashenden wrote: > Folks, > > The IEEE VHDL Working Group is considering a proposal to add vector types to > the package STANDARD in the next revision of the language. We would like > your feedback on the issue. > > Currently, package STANDARD defines types STRING as a vector of CHARACTER > elements, and BIT_VECTOR as a vector of BIT elements. The proposal is to > define vector types for BOOLEAN, INTEGER, REAL and TIME. Users have > commented that these types would be useful for verification models, among > other applications. Is this just a matter of convenience or does it really add something that whould not be possible without it? Is suppose an array (vector) of an unconstrained type will still not be possible. Paul. ----------------------------------------------------------------