VHDL Issue Number:      2024

Language_Version:       VHDL-2002
Classification:         Language Modeling Enhancement or Deficiency
Summary:                VHDL needs encryption support
Relevant_LRM_Sections:
Related_Issues:
Key_Words_and_Phrases:  encryption, protect
Authors_Name:           Keith Pflieger
Authors_Phone_Number:   (858) 726-0130, x212
Authors_Fax_Number:
Authors_Email_Address:  kpflieger@trellisware.com
Authors_Affiliation:    TrellisWare Technologies, Inc.
Authors_Address1:       12780 Danielson Ct.
Authors_Address2:       Poway, CA  92064
Authors_Address3:

Current Status:         Forwarded

Superseded By:

------------------------
Date Submitted:         7 March 2003
Date Analyzed:          1-Nov-04
Author of Analysis:     Peter Ashenden
Revision Number:        2
Date Last Revised:      28-Jan-2005

Description of Problem
----------------------

For the purposes of protecting VHDL-based IP cores, I feel that a
method for source code encryption or obfuscation should be built into
the VHDL standard. I envision that this option would be similar to
the:

     'protect
     directive in Verilog.

As part of our IP core deliverables to customers, we normally provide
simulation libraries of our core (targeted to a specific simulator)
along with an edif (or other format) netlist. It would be great if the
language automatically supported obfuscation of entity, port, signal,
constant, ... names so that it would protect certain features of our
designs even more completely than some of the current command line
compile options in current simulator implementations (like the
-nodebug option in ModelSim).


Proposed Resolution
-------------------
TBD

VASG-ISAC Analysis & Rationale
------------------------------

The VHDL-200x Fast Track group is addressing this enhancement request.
The proposal they are considering is to provide for encryption of
sections of the source text of a VHDL description.


VASG-ISAC Recommendation for IEEE Std 1076-2002
-----------------------------------------------

No change.


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------

Implement extensions developed in the IP proposal.


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