VHDL Issue Number: 2027 Language_Version: VHDL-93 Classification: Language Modeling Enhancement or Deficiency Summary: When loop index is static, drivers are created for each element of array Relevant_LRM_Sections: Can't recall, but the issue is on elaboration and creation of drivers Related_Issues: Key_Words_and_Phrases: drivers vhdl composite array Authors_Name: ben cohen Authors_Phone_Number: 310 721-4830 Authors_Fax_Number: Authors_Email_Address: vhdlcohen@aol.com Authors_Affiliation: consultant / author Authors_Address1: www.vhdlcohen.com Authors_Address2: Authors_Address3: Current Status: Not an ISAC issue--send to Modeling & Productivity Superseded By: ------------------------ Date Submitted: 25 April 2003 Date Analyzed: 01 July 2004 Author of Analysis: Chuck Swart Revision Number: $02$ Date Last Revised: $02July2004$ Description of Problem ---------------------- Users cannot easily comprehend why it is necessary for the elaborator to create a driver for each element of an array when the signal assignments are made to a static range. This deficiency causes the uses to write each element individually. Below is a response to an email I gave to an engineer. There is no reason as to why the elaborator cannot determine if an index is static (known range) or dynamic. The issue here is MULTIPLE DRIVERS. Drivers are created at elaboration time. Thus, the following loop for i in 3 downto 0 loop data(i) <= data(i+1); end loop; creates a driver for EACH ELEMENT OF i because the elaborator does not care and does not compute the value of "i", even though "i" looks static. That's vhdl! The rationale is that it is easier for the compiler, since loop indeces can be dynamic (e.g., for i in 0 to Signal_element). In your model you have 2 drivers for data(4) - 1 driver in concurrent signal assignment "data(4) <= jin;" - 1 driver in process (even though data(4) is not assigned for reason mentioned above). In your non-loop example, the drivers are clear to the compiler. By the way, that stuff is also in my Coding Style book! Cheers! Ben Why does my code-checking tool report a combinational feedback loop with this: ... begin data(4) <= jin; process (data) begin -- data(3) <= data(4); -- data(2) <= data(3); -- data(1) <= data(2); -- data(0) <= data(1); for i in 3 downto 0 loop data(i) <= data(i+1); end loop; end process; jout <= data(0); end a; Note submitted by steve bailey:If this is too involved for ISAC, then I think Jim's modeling & productivity group should take it on as an enhancement request. Please let Jim know if ISAC will handle or if MP should handle it. Proposed Resolution ------------------- Allow elaborator to create drivers for specified range of an array or composite when the range in the loop index is static. VASG-ISAC Analysis & Rationale ------------------------------ This is not an ISAC issue. VASG-ISAC Recommendation for IEEE Std 1076-2002 ----------------------------------------------- Forward to Modeling and Productivity group VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD -------------END OF IR----------------