VHDL Issue Number: 2039 Language_Version: VHDL-2002 Classification: LRM Terminology, Grammar and Typographical Errors Summary: Minor typos Relevant_LRM_Sections: Related_Issues: Key_Words_and_Phrases: Authors_Name: Chuck Swart Authors_Phone_Number: 503.685.0846 Authors_Fax_Number: 503.685.0921 Authors_Email_Address: cswart@model.com Authors_Affiliation: Model Technology Authors_Address1: - 8005 SW Boeckman Rd Authors_Address2: - Wilsonville, OR 97070 Authors_Address3: - Current Status: VASG-Approved Superseded By: ------------------------ Date Submitted: 11 August 2004 Date Analyzed: 7 October 2004 Author of Analysis: Peter Ashenden Revision Number: 5 Date Last Revised: 09 May 2005 Description of Problem ---------------------- This is a repository for minor typos in the VHDL-2002 LRM. 1. Bleeding of VHDL-AMS into 1076 Section 3.2.1.1 Index constraints and discrete ranges "The index range for each index of an array object is determined as follows: ... -- For an interface object declared with a subtype indication that defines a constrained array subtype, the index ranges are defined by that subtype or subnature." Comment: The "or subnature" is incorrect. Section 12.6.4 The simulation cycle "A simulation cycle consists of the following steps: ... f) If the break flag is set, the time of the next simulation cycle... Comment: "If the break flag is set" should be removed. Section 13.9 Reserved Words "Procedural", "reference" Comment: These should be removed. Annex B Glossary B.25 augmentation set:.. B.56 cycle pure... Comment: These should be removed. 2. Section 2.5 Package Declarations "If a package declarative item is a type declaration(i.e. a full type declaration whose type definition is a protected type definition..." Comment: Shouldn't this be "If a package declarative item is a protected type declaration..."? 3. Section 3.2.1.1 Index Constraints and Discrete Ranges Examples "Instance: entity E generic map ( 1 to 2 => (others => '0'))" Comment: "1 to 2" should be "ROM(1 to 2)" 4. Section 5.2.1.2 Generic map and port map aspects "It is an error if a scalar formal may be associated with more than one actual." Comment: "may be" should be "is" 5. Section 6.3 Selected names Notes 1 "If the entire object is desired, a selected name whose prefix denotes the access value and whose suffix is the reserved word all is used." Comment: "all" should be in bold. 6. Section 7.2.4 Adding operators "... b) If one of the operands is a one-dimensional...the result of the concatenation is given by the rules in case a using..." Comment: That should be " ... given by the rules in case a)..." 7. Section 9.2 Process statement NOTES number 2 "When a nonpostponed process is resumed, it executes in the current simulation cycle (see 2.6.4)" Comment: "2.6.4" should be "12.6.4" 8. Section 12.3.1.4 Object declarations NOTE 3 "Each object whose type is a protected type creates an instance of the shared objects." Comment: The last word should be "object" not "objects" 9. Section 14.1 Predefined attributes "... For each attribute, the following information is provided: ... - A description of the parameters or argument, if one exists" Comment: "parameters" should be "parameter" 10. Section 14.1 Predefined attributes In at least one place "Type Boolean" should be "Type BOOLEAN" and in many places "Type string" should be "Type STRING" for document consistency. 11. Section 14.1 Predefined attributes T'IMAGE(X) ... "If T is a floating point type or subtype, the number of digits to the right of the decimal point corresponds to the standard form generated when the DIGITS parameter to TextIO. Write for type REAL is set to 0." Comment: "TextIO. Write" should be "TextIO.Write" (no space following .) 12. Section 14.1 Predefined attributes Note 7 "If Ts is the smallest value such that..." Comment: "Ts" should have a subscripted s instead of a lower case s. 13. Section 14.3 Package TEXTIO "Parameter DIGITS specifies...consisting of a normalized mantissa plus exponent (e.g., 1.079236E-23)...." Comment: According to an earlier paragraph this should be "1.079236e-23" i.e., the exponent is printed in lower case. 14. Annex B Glossary "B.74 designated type... B.75 designated subtype..." Comment: These should be reversed to maintain alphabetical order. 15. Annex B Glossary "B.92 execute (A) ... (B) ..." Comment: The "A" and "B" need to be in bold for consistency. 16. Index "processes .... non-postponed..." Comment: This should be "nonpostponed" for consistency with the text. 17. Section 4.3.1.3 Note 4 " VARIABLE Local:shortRange :=0; BEGIN ... " Comment: The BEGIN does not belong there. 18. Section 3.5.1 Examples: "TYPE VariableSizedBitArray IS PROTECTED ... END PROTECTED VariableSizedBitArray;" Comment: VariableSizedBitArray should be VariableSizeBitArray to be consistent with later examples. 19. Section 14.1 Predefined attributes S'DRIVING_VALUE "Result: If S is a scalar signal S, the result is..." Comment: This should read: "Result: If S is a scalar signal, the result is..." 20. Annex B Glossary B.209 register; "A kind of guarded signal that retains ... turned off. (S4.3.1.2)) Comment: There should also be a reference to S2.4. Proposed Resolution ------------------- TBD VASG-ISAC Analysis & Rationale ------------------------------ 1. Bleeding of VHDL-AMS into 1076 Section 3.2.1.1 Index constraints and discrete ranges The reference to subnature is a leakage from VHDL-AMS. Delete the text "or subnature". Section 12.6.4 The simulation cycle The reference to the break flag is a leakage from VHDL-AMS. Delete the text "If the break flag is set, " and capitalize the word "the" that immediately follows. Section 13.9 Reserved Words The reference to "procedural" and "reference" as reserved words is a leakage from VHDL-AMS. Delete those words from the list. Annex B Glossary Entries B.25 and B.56 are a leakage from VHDL-AMS. Delete those entries. 2. Section 2.5 Package Declarations The wording in the LRM is a corruption of what was in P1076-2000/D5: If a package declarative item is a type declaration that is a full type declaration whose type definition is a protected_type definition, then that protected type definition must not be a protected type body. Presumably the IEEE staff editor interpreted "that is" in the sense of "idem est", which is not what was intended, and made the "editorial" change, thus corrupting the meaning. To correct this, the sentence should revert to the wording in P1076-2000/D5. 3. Section 3.2.1.1 Index Constraints and Discrete Ranges The formal part of the association element should be ROM(1 to 2). Moreover, the actual part should be an aggregate, each of whose elements is a value of type Word(31 downto 0). The element value '0' given in the example is not of this type. Presumably, what was intended was the following association: ROM(1 to 2) => (others => (others => '0')) The association element in the generic map should be replaced with this association element. 4. Section 5.2.1.2 Generic map and port map aspects This typo resulted from an incomplete edit on VHDL-2002. In the previous version, the text was No scalar formal may be associated with more than one actual. Change the text "may be" to "is". 5. Section 6.3 Selected names This formatting got lost in 1076 2000 Edition. The reserved word should be formatted in boldface. 6. Section 7.2.4 Adding operators The cross reference should include the right parenthesis character. 7. Section 9.2 Process statement The cross reference should be to 12.6.4. 8. Section 12.3.1.4 Object declarations The last normative paragraph of the subclause describes elaboration of an object of a protected type. It specifies that creation of an object of a protected type involves elaboration of the declarative items in the protected type body. For those declarative items that are object declarations (namely, constant, variable and file declarations), elaboration involves creating objects. Those objects, by virtue of being part of the variable of the protected type, are shared. They are the referents of the word "objects" at issue. The note would be more clearly worded as: Each object whose type is a protected type involves creation of separate instances of the objects declared by object declarations within the protected type body. 9. Section 14.1 Predefined attributes This appears to be a leakage from VHDL-AMS, in which some attributes have more than one parameter. The word "parameters" should be changed to "parameter". 10. Section 14.1 Predefined attributes The case of identifiers is inconsistent throughout the LRM. Different examples use mixes of all uppercase, title case with no underscores, and title case with underscores, and all lowercase with underscores. However, predefined identifiers occurring within text generally are all uppercase. Thus, the occurrences in 14.1 and elsewhere that are not all uppercase should be changed to all uppercase to ensure consistency. This should apply throughout the LRM, not just in 14.1. Rather than listing occurrences here, the LRM editor can search for occurrences and change them where appropriate. 11. Section 14.1 Predefined attributes This typo was introduced in 1076 2000 Edition, and should be corrected as described. 12. Section 14.1 Predefined attributes This typo was introduced in 1076 2000 Edition, and should be corrected as described. 13. Section 14.3 Package TEXTIO The earlier paragraph referred to is the fifth list item in the list describing the string representations of values. To conform to the specifications in that paragraph, the "e" in the exponent should be in lowercase, as described. 14. Annex B Glossary The entries should be reversed as described. 15. Annex B Glossary The "(A)" and "(B)", including the parentheses, should be in boldface to be consistent with other glossary entries that have multiple descriptions. 16. Index All occurrences of the word "nonpostponed" in the text occur without any hyphen. The index entry should omit the hyphen as described. 17. Section 4.3.1.3 The reserved word "begin" should be deleted, as described. 18. Section 3.5.1 Change the two occurrences of "VariableSizedBitArray" as described. 19. Section 14.1 Predefined attributes Delete the second reference to S, as described. 20. Annex B Glossary Subclause 2.4 describes resolution functions. There is no reference to register-kind signals in that subclause. Therefore, the glossary entry should remain unchanged. VASG-ISAC Recommendation for IEEE Std 1076-2002 ----------------------------------------------- Interpret the LRM as if the Recommendation for Future Revisions had been adopted. VASG-ISAC Recommendation for Future Revisions --------------------------------------------- Make the changes as recommended in the analysis. -------------END OF IR----------------