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VHDL Issue Number:        2070

Language_Version          VHDL-2002
Classification            LRM Terminology, Grammar and Typographical Errors
Summary                   Support for floating point denormal numbers
Relevant_LRM_Sections     Section 7.2.7 paragraph 3 and 3.1.4 paragraph 6 conflict with one another.
Related_Issues            
Key_Words_and_Phrases     IEEE 854, 754, floating point, denormal
Authors_Name              David Bishop
Authors_Phone_Number      585-726-6788
Authors_Fax_Number        
Authors_Email_Address     dbishop@vhdl.org
Authors_Affiliation       Eastman Kodak
Authors_Address1          2400 Mt Read Blvd
Authors_Address2          Rochester NY 14650-3006
Authors_Address3          

Current Status:           VASG-Approved

Superseded By:

------------------------
Date Submitted:           28 July 2005
Date Analyzed:            26 October 2005
Author of Analysis:       Chuck Swart
Revision Number:          3
Date Last Revised:        04 May 2006

Description of Problem
----------------------

In some simulators 2.0**-1025 results in 2**-1025 (a denormal 64 bit
IEEE 754 (854) floating point number.  In others, it becomes zero.
Note that this is very similar to the famous "Pentium bug", which is
now built into the IEEE 1076-2002 LRM....

In a floating point number, if the exponent is zero, by IEEE 854 the
number can become "denormal".  This is a mechanism in floating point
which allows you to express very small numbers (3.1.4 paragraph 6).
However, in 7.2.7 paragraph 6 it says "if the exponent is negative
then the result is the reciprocal of that obtained with the absolute
value of the exponent."

Proposed Resolution
-------------------

Modify section 7.2.7 to refer to IEEE 854 on how to treat an exponent.

VASG-ISAC Analysis & Rationale
------------------------------

First, Clause 3.1.4 states that VHDL uses "a representation for all
floating_point types except for universal_real that conforms either to
IEEE std 754 or to IEEE Std 854..."

Note that only the representation is specified. An implementation is
not required to use 754 arithmetic. This was intentional, since VHDL
does not give access to INF, NAN, etc. Also, its not clear that every
computer architecture/OS fully supports all arithmetic requirements
imposed by 754/854.

Second, the IEEE 754 (and 854) standards require support for +,-,*,/
and square root, but not exponentiation. This means that
exponentiation may be implemented by a function, not by hardware. The
accuracy of such a function is implementation dependent.

Finally, the ISAC interprets the words in clause 7.2.7, including: "if
the exponent is negative, then the result is the reciprocal of that
obtained with the absolute value of the exponent." as the mathematical
description of the operation, not as the specification of the
algorithm for implementing exponentiation. If this wording were interpreted
literally, then, since 2.0**1025 produces overflow the result would
have to be zero.

Also, note that Annex C of the LRM specifically identifies as nonportable:

-- The comparison of floating point values

-- Events on floating-point-vlaued signals

-- The use of explicit type conversion to convert floating point
   values to integer values

In conclusion, the ISAC believes that the results of the
exponentiation operator are implementation dependent.


VASG-ISAC Recommendation for IEEE Std 1076-2002
-----------------------------------------------

No change to the language is needed.

VASG-ISAC Recommendation for Future Revisions
---------------------------------------------

No change to the language is needed.


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