-------------BEGINNING OF IR---------------- VHDL Issue Number: 2083 Language_Version VHDL-2002 Classification Language Definition Problem Summary Generate index specification should be of same subtype as generate parameter Relevant_LRM_Sections 1.3.1 Block configuration 9.7 Generate statements 12.4.2 Generate statements Related_Issues Key_Words_and_Phrases generate parameter, block configuration, index specification Authors_Name Peter Ashenden Authors_Phone_Number +61 414 709 106 Authors_Fax_Number Authors_Email_Address peter@ashenden.com.au Authors_Affiliation Ashenden Designs Authors_Address1 Authors_Address2 Authors_Address3 Current Status: VASG-Approved Superseded By: ------------------------ Date Submitted: 31 January 2006 Date Analyzed: 15 March 2006 Author of Analysis: Chuck Swart Revision Number: 4 Date Last Revised: 04 May 2006 Description of Problem ---------------------- I've just been looking at generate statements, and am having trouble finding rules that I thought should exist. A for-generate statement specifies values for the generate parameter with a discrete range. The implicit type of the generate parameter is the base type of the discrete range. In a block configuration for the generate statement, you can write a block specification that determines which occurrences of the generate get configured. The block specification can be either a discrete range or an expression. I would expect the type of the discrete range or expression to be that of the generate parameter, and that values in the discrete range or the value of the expression be in the discrete range of the generate statement. However, I can't find rules that state this. Proposed Resolution ------------------- If no such rule exists anywhere, add a rule to 1.3.1 specifying that the value or values of the index specification be of the type of the corresponding generate parameter and lie within the discrete range specified for the generate parameter. VASG-ISAC Analysis & Rationale ------------------------------ The submitter is correct. The rules he describes do not exist in the LRM. VASG-ISAC Recommendation for IEEE Std 1076-2002 ----------------------------------------------- Interpret the LRM as if the Recommendation for Future Revisions had been adopted. VASG-ISAC Recommendation for Future Revisions --------------------------------------------- In clause 1.3.1 there is a paragraph which reads: "If the block specification of a block configuration contains a generate statement label, and if this label contains an index specification, the it is an error if the generate statement denoted by the label does not have a generation scheme including the reserved word for." Add to the end of this paragraph: "In addition, the value (or values) of the index specification must be of the type of the corresponding generate parameter and this value (or these values) must belong to the discrete range specified for the generate parameter." -------------END OF IR----------------