VHDL Issue Number:      0076
Classification:         Language Definition Problem
Language Version:       VHDL-87
Summary:                Definition of package elaboration not valid in certain
                        cases.
Related Issues:         
Relevant LRM Sections:  12.1
Key Words and Phrases:  Elaboration, package
Current Status:         ISAC-Approved
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  This has been resolved in the numbered list 
                        (and following paragraph) of section 12.1
Superseded By:          N/A
-----------------------
Date Submitted:         1989/02/10
Author of Submission:   Doug Dunlop
Author's Affiliation:   Intermetrics, Inc.
Author's Post Address:  4733 Bethesda Ave #415
                        Bethesda, MD  20814
Author's Phone Number:  (301) 657-3775
Author's Fax Number:    
Author's Net Address:   dunlop@inmet.inmet.com
-----------------------
Date Analyzed:          1990/06/15
Author of Analysis:     Doug Dunlop
Revision Number:        $Revision: 1.8 $
Date Last Revised:      $Date: 1995/05/13 19:34:42 $


Description of Problem
----------------------
LRM 12.1 implies that a package body is elaborated
immediately after to the elaboration of the corresponding package declaration.
This is impossible for cases such as

        package p1 is
           ...
        end p1;
        package p2 is
           ...
        end p2;
        use work.p1.all;
        package body p2 is
           ...
        end p2;
        use work.p2.all;
        package body p1 is
           ...
        end p1;

Note this is legal VHDL and there exists a valid order of analysis for these
units.


Proposed Resolution
-------------------
The rule in LRM 12.1 is relaxed to the extent that the elaboration
of a package body follows the elaboration of its package declaration but it
does not necessarily follow it immediately.  More specifically, if a given
package declaration or body "uses" (see LRM 12.1) a second package, only the
declaration of the second package need be elaborated prior to the elaboration
of the given package declaration or body.


VASG-ISAC Analysis & Rationale
------------------------------
The ISAC is split about whether or not the current wording implies that
a package body is elaborated immediately after the package declaration.

If there is any doubt about the wording, however, the interpretation
suggested above appears to be the sensible reading of the LRM.

In discussing this issue, the ISAC observed that the ending "if any" to
the sentence beginning "Elaboration of a package additionally ..." from
LRM 12.1 could be read as either "if any exists" or as "if any is
required".  These are not necessarily the same (due to the case
where a package declaration is revised in such a way that it no longer
requires a package body but a package body for the old one had
already been put into the library).

Does VHDL need functionality similar to that provided by the Ada
ELABORATE pragma?


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
The interpretation suggested above by the submitter is accepted.  When the LRM
wording is revised, it is suggested that the sentence beginning "Elaboration
of a package additionally ..." from LRM 12.1 be modified to not use the
phrase "consists of" and merely to say that both the package-declaration
declarative part and the package-body declarative part get elaborated and
the only constraint on this elaboration is that the elaboration of the
declarative part in the package declaration occurs before the elaboration
of the declarative part of the package body.

Also, the ending "if any" to the above-referenced sentence should be read
as "if any is necessary".  This is consistent with the wording of the "Note:"
in LRM 2.5.


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
Contemplate the need for functionality similar to that provided by the
Ada ELABORATE pragma.