VHDL Issue Number:      0120
Classification:         Terminology, Grammar, and Typographical Errors
Language Version:       VHDL-87
Summary:                Extraneous '.' in Section 9.2.
Related Issues:         0002
Relevant LRM Sections:  9.2
Key Words and Phrases:  Wait Statement, Typographical error
Current Status:         ISAC-Approved
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  No LRM changes were required.
Superseded By:          N/A
-----------------------
Date Submitted:         1989/06/21
Author of Submission:   Ken Scott
Author's Affiliation:   Vantage Analysis Systems, Inc.
Author's Post Address:  42840 Christy St., Suite 201
                        Fremont, CA   94538
Author's Phone Number:  (415) 659-0901
Author's Fax Number:    
Author's Net Address:   N/A
-----------------------
Date Analyzed:          1990/10/10
Author of Analysis:     Paul J. Menchini (mench@clsi.com)
Revision Number:        $Revision: 1.10 $
Date Last Revised:      $Date: 1995/08/03 18:45:58 $


Description of Problem
----------------------
In the 2nd paragraph of Section 9.2, there is an extra "." character in the
phrase:

       "...; this implicit wait statement.is of the form"
                                         ^
                                         |
       -----------------------------------


Proposed Resolution
-------------------
Fix the typo.


VASG-ISAC Analysis & Rationale
------------------------------
The ISAC can find no such typographical error.  The issue author's copy of the
LRM may have a reproduction fault.


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
No change in the interpretation of the 1076-1987 LRM is required.


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
No changes to future LRMs are required.