VHDL Issue Number: 0129 Classification: Language Definition Problem Language Version: VHDL-87 Summary: Name space in named associations is unnecessarily complex. Related Issues: Relevant LRM Sections: 4.3.3.2 Key Words and Phrases: Named Associations, Formal Parameters Current Status: Submitted 1076-1993 Disposition: Closed (All Issues Completely Addressed) Disposition Rationale: Section 10.3 was revised. Superseded By: N/A ----------------------- Date Submitted: 1989/06/21 Author of Submission: Rod Farrow Author's Affiliation: Vantage Analysis Systems, Inc. Author's Post Address: 42840 Christy St., Suite 201 Fremont, CA 94538 Author's Phone Number: (415) 659-0901 Author's Fax Number: Author's Net Address: N/A ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.9 $ Date Last Revised: $Date: 1995/08/04 01:36:30 $ Description of Problem ---------------------- In a named association, before the association operator "=>", the names of the formal parameters of the subprogram/entity share the namespace with all other names normally in the namespace, and neither displace homonyms nor cause errors if there already exist homonyms. This can be especially bothersome to implement for overloaded subprograms because until the overloading is resolved one doesn't know what formal parameter names are legitimately in the namespace, but one must know what names mean (and hence what is legitimately in the namespace) in order to do overload resolution. Proposed Resolution ------------------- We propose that the names of formal parameters be legitimately referenced ONLY as the leading simple name of a formal designator, and that they not be generally visible in the source text immediately before the association operator. VASG-ISAC Analysis & Rationale ------------------------------ VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- VASG-ISAC Recommendation for Future Revisions ---------------------------------------------