VHDL Issue Number: 0132 Classification: Language Definition Problem Language Version: VHDL-87 Summary: REVERSERANGE should be a keyword in the language. Related Issues: ? Relevant LRM Sections: 13.9, 14.1 Key Words and Phrases: Current Status: Submitted 1076-1993 Disposition: Superseded (ISAC Issues Outstanding) Disposition Rationale: N/A Superseded By: 1027 ----------------------- Date Submitted: 1989/06/21 Author of Submission: Rod Farrow Author's Affiliation: Vantage Analysis Systems, Inc. Author's Post Address: 42840 Christy St., Suite 201 Fremont, CA 94538 Author's Phone Number: (415) 659-0901 Author's Fax Number: Author's Net Address: N/A ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.9 $ Date Last Revised: $Date: 1995/07/26 19:20:58 $ Description of Problem ---------------------- Identifier REVERSERANGE should be a keyword of the language, as is RANGE, in order to prevent it from being redefined to be something else, especially to keep it from being redefined to be a user-defined attribute. This is an acute implementation problem in the following context: X( A'REVERSERANGE ) would be an array reference if REVERSERANGE has been declared as a user- defined attribute and has been specified for A, otherwise it could be a slice if A is an array object. Proposed Resolution ------------------- Make REVERSERANGE a reserved word in the language. VASG-ISAC Analysis & Rationale ------------------------------ VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- VASG-ISAC Recommendation for Future Revisions ---------------------------------------------