VHDL Issue Number: 0134 Classification: Language Definition Problem Language Version: VHDL-87 Summary: The restriction that subprogram association elements may not have input or output conversion functions for signal parameters means that conversion functions for signals can't be used in concurrent_procedure_call statements. Related Issues: ? Relevant LRM Sections: 4.3.3.2 Key Words and Phrases: Conversion Functions, Concurrent Procedure Calls Current Status: Submitted 1076-1993 Disposition: Bugs Fixed, Enhancements Outstanding (No ISAC Issues) Disposition Rationale: Non-ISAC issues outstanding. Superseded By: N/A ----------------------- Date Submitted: 1989/06/21 Author of Submission: Rod Farrow Author's Affiliation: Vantage Analysis Systems, Inc. Author's Post Address: 42840 Christy St., Suite 201 Fremont, CA 94538 Author's Phone Number: (415) 659-0901 Author's Fax Number: Author's Net Address: N/A ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.9 $ Date Last Revised: $Date: 1995/08/04 01:37:53 $ Description of Problem ---------------------- The restriction that subprogram association elements may not have input or output conversion functions for signal parameters means that conversion functions for signals can't be used in concurrent\_procedure\_call statements. Further the utility of conversion functions for variable parameters is marginal at best: these could always be simulated by an assignment before the procedure call, followed by an assignment after the procedure call. Proposed Resolution ------------------- We propose that all conversion functions on subprogram parameters be disallowed, as a simplification to the language. VASG-ISAC Analysis & Rationale ------------------------------ VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- VASG-ISAC Recommendation for Future Revisions ---------------------------------------------